KR101775669B1 - Method for forming fine pattern for semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a fine pattern of a semiconductor device, and in particular, to a method of forming a fine pattern of a semiconductor device, in which a first spacer pattern extending in a first direction is formed into an etching barrier Etching the sacrificial layer to form a first sacrificial layer pattern; Removing the first spacer pattern; Forming a gap fill material filling between the first sacrificial film patterns; Forming a first sacrificial film pattern and a second spacer pattern on the gap fill material, the second spacer pattern extending in a second direction intersecting the first direction; Etching the first sacrificial layer pattern with the second spacer pattern to form a second sacrificial layer pattern; Removing the second spacer pattern; And embedding an insulating material between the second sacrificial film pattern and the gap fill material, and removing the second sacrificial film pattern to form a hard mask pattern. In the semiconductor device according to the present invention, According to the fine pattern formation method, it is possible to form a hard mask film pattern having a uniform fine pattern interval while forming a fine pattern exceeding the limit resolution of the conventional exposure equipment. In addition, the line width of the hard mask film pattern can be easily controlled.

Description

[0001] METHOD FOR FORMING FINE PATTERN FOR SEMICONDUCTOR DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a manufacturing technique of a semiconductor device, and more particularly, to a method of forming a fine pattern of a semiconductor device.

As the degree of integration of a semiconductor device increases, design rules are rapidly reduced, and the size of a semiconductor device formed in a cell gradually decreases. Accordingly, a high resolution of a photolithography exposure apparatus is required to form a fine photoresist pattern, and thus a great deal of difficulty arises in manufacturing a semiconductor device constituting a cell.

In order to overcome the optical limit of the photolithography for the fine pattern exceeding the critical resolution of the exposure apparatus, a photoresist pattern is formed and then the photoresist pattern is heated to a temperature higher than the glass transition temperature of the photoresist film and reflowed to form a fine photoresist pattern And a process using RELACS (Resist Enhancement Lithography Assisted by Chemical Shrink) material.

However, in the case of the photoresist film reflow or RELACS process, it is almost impossible to form a fine pattern of 30 nm level due to the resolution limit and the decrease in the photoresist film volume.

On the other hand, a process of forming two photoresist pattern patterns such as a comprehensive patterning process including an etching process or a double patterning process such as SPT (Spacer Pattern Technology) has been developed, but the profile characteristic of the fine pattern is deteriorated have.

Hereinafter, problems of the prior art will be described with reference to the drawings.

FIGS. 1A to 1D are diagrams for explaining a conventional method of forming a fine pattern of a semiconductor device, particularly for explaining a method of forming a fine pattern by an SPT process.

1A, the first hard mask films 12 and 13 are formed on the etching layer 11 on which a fine pattern is to be formed. Here, the first hard mask films 12 and 13 have a laminated structure of the amorphous carbon film 12 and the silicon oxynitride film 13.

Then, the second hard mask film 18 is laminated on the first hard mask films 12, 13. As the second hard mask film 18, a polysilicon film is used.

Subsequently, a photoresist film 15 is formed by a photo-lithography process, a photoresist film material is applied, and a photoresist pattern 16 is formed through an exposure and development process.

The spacer material 17 is formed along the step on the entire surface of the photoresist pattern 16 after removing the antireflection film 15 remaining between the photoresist pattern 16 as shown in FIG.

As shown in FIG. 1C, the spacer material 17 is front-etched to expose the photoresist pattern 16 and the second hard mask film 18. Subsequently, the photoresist pattern 16 remaining between the photoresist pattern 16 is stripped to form the spacer pattern 17A.

As shown in Fig. 1D, the second hard mask film 18 is etched by the spacer pattern 17A with the etching barrier to form the second hard mask film pattern 18A.

Recently, a hard mask film patterning method for forming a fine pattern, for example, a contact hole, has been studied by conducting the SPT process twice as described above. However, the second SPT process affects the first SPT process, It is difficult to control the width. Since the SPT process described above forms the second hard mask film pattern 18A by using the etching process, the limit of the second hard mask film pattern 18A of the etching process can not be formed vertically .

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and it is an object of the present invention to provide a method of forming a fine pattern of a semiconductor device having uniform characteristics and easy adjustment of the interval between fine patterns, The purpose is to provide.

According to an aspect of the present invention, there is provided a method of forming a fine pattern of a semiconductor device, comprising: forming a first sacrificial layer pattern by etching a sacrificial layer with a first spacer pattern extending in a first direction; Removing the first spacer pattern; Forming a gap fill material filling between the first sacrificial film patterns; Forming a first sacrificial film pattern and a second spacer pattern on the gap fill material, the second spacer pattern extending in a second direction intersecting the first direction; Etching the first sacrificial layer pattern with the second spacer pattern to form a second sacrificial layer pattern; Removing the second spacer pattern; And embedding an insulating material between the second sacrificial film pattern and the gap fill material, and removing the second sacrificial film pattern to form a hard mask pattern.

According to the method of forming a fine pattern of a semiconductor device according to the present invention, it is possible to form a hard mask film pattern having a uniform fine pattern interval while forming a fine pattern exceeding the limit resolution of the conventional exposure equipment. In addition, the line width of the hard mask film pattern can be easily controlled.

1A to 1D are diagrams for explaining a conventional method of forming a fine pattern of a semiconductor device
2A to 2O are views for explaining a method of forming a fine pattern of a semiconductor device according to an embodiment of the present invention

Hereinafter, the most preferred embodiment of the present invention will be described. In the drawings, the thickness and the spacing are expressed for convenience of explanation, and can be exaggerated relative to the actual physical thickness. In this specification, the expression 'after step' or 'following step' means that, not only the meaning of performing another step directly after performing one step but also the third step can be further performed after performing one step .

FIGS. 2A to 2O are views for explaining a method of forming a fine pattern of a semiconductor device according to an embodiment of the present invention, wherein II and I and II in each drawing are cross-sectional views taken along the line X-X '.

Referring to FIG. 2A, a first hard mask film is formed on a substrate (not shown) having a pattern layer 21 on which a fine pattern is to be formed. The first hard mask film is exemplified by a laminated structure of the amorphous carbon film 22 and the silicon oxynitride film 23. The etching layer 21 is a region where a fine pattern is to be formed using the patterned first hard mask film after patterning the first hard mask film.

Then, a sacrificial film 24 is formed on the first hard mask films 22 and 23. The sacrificial film 24 is a support for forming the second hard mask film pattern in the subsequent process, and the sacrificial film 24 is patterned and removed in the subsequent process. A polysilicon film is exemplified by this sacrificial film (24) material.

Next, a first antireflection film 25 is formed on the sacrifice film 24, and a photoresist film material is applied on the first antireflection film 25. Next, the photosensitive film material is patterned by an exposure and development process to form a photosensitive film pattern 26. [ Here, the photoresist pattern 26 may be formed in a line shape extending in the first direction. (See also II in Fig. 2A)

Referring to FIG. 2B, the first antireflection film 25 exposed between the photoresist pattern 26 is removed to form the first antireflection film pattern 25A. Subsequently, the spacer material film 27 is deposited along the entire step of the photoresist pattern 26 and the first antireflection film pattern 25A. The material film 27 for a spacer may be formed of an oxide film or preferably an ultro low-temperature oxide (ULTO) film. Since the cryogenic oxide film is excellent in step coverage, the cryogenic oxide film can reflect the step of the photoresist pattern 26 as it is.

Referring to FIG. 2C, first spacers 27A are formed on both side walls of the photoresist pattern 26 and the first antireflection film pattern 25A. More specifically, the method for forming the first spacer 27A will be described in detail. The spacer material film 27 is etched frontally to expose the upper surface of the photoresist pattern 26. In this case, the upper surface of the photoresist pattern 26 is exposed, and the lower polysilicon film 24 is exposed together with the upper surface of the photoresist pattern 26. Here, when the spacer material 27 is a cryogenic oxide film, the etching gas is preferably an etch gas containing CHF3, CH2F2 and O2.

Referring to FIG. 2D, the first spacer pattern 27B is formed by removing the remaining photoresist pattern 26 and the first antireflection film pattern 25A between the first spacers 27A by a stripping process.

Referring to FIG. 2E, the first sacrificial layer pattern 24A is formed by etching the sacrificial layer 24 with the first spacer pattern 27B with the etching barrier. At this time, in a preferred embodiment of the present invention, when the polysilicon film is formed by the first sacrificial pattern 24A and the hard mask film 23 formed under the first sacrificial pattern 24A is formed of a silicon oxynitride film Can be exemplified. In this case, since the polysilicon film and the silicon oxynitride film have a large etch selectivity difference, there is an advantage that the first sacrificial film pattern 24A can be easily formed so as to have a vertical profile. At this time, the etching gas preferably includes Hbr, Cl2, and O2.

Referring to FIG. 2F, the first spacer pattern 27B formed on the first sacrificial pattern 24A is removed. The method of removing the first spacer pattern 27B may be a cleaning process. At this time, in a preferred embodiment of the present invention, when the first sacrificial pattern 24A is a polysilicon film and the first spacer pattern 27B is a cryogenic oxide film, the cleaning process may use a BOE solution. The cleaning process using the BOE solution has an advantage that damage to the first sacrificial film pattern 24A formed under the first spacer pattern 27B can be minimized.

Referring to FIG. 2G, a gap fill material 29 is buried between the first sacrificial film patterns 24A. If the first sacrificial film pattern 24A is a polysilicon film, the gap fill material 29 is an oxide film or a nitride film is exemplified . If necessary, after filling the gap fill material 29, a planarization process (CMP or etch-back process) can be further performed.

2H, a second antireflection film 35 is formed on the first sacrificial film pattern 24A and the gap fill material 29, and then a second photoresist film material 36 is formed on the second antireflection film 35. Next, .

Referring to FIG. 2I, a second photoresist pattern 36A having a line shape extending in a second direction is formed by performing an exposure and a development process. Here, the second direction is preferably a direction intersecting with the first direction. (See also Fig. 2I)

Referring to FIG. 2J, the second antireflection film 35 exposed through the second photoresist pattern 36A is removed to form a second antireflection film pattern 35A. Subsequently, the second spacer material film 37 is formed along the stepped surface of the second photoresist pattern 36A and the second antireflection film pattern 35A. The material film 37 for the second spacer may be an oxide film or a cryogenic oxide film.

Referring to FIG. 2K, the second spacer material film 37 is etched through a spacer etching process to form a second spacer 37A remaining only on the sidewalls of the second photoresist pattern 36A and the second antireflection film pattern 35A . At this time, the concrete formation method of the second antireflection film pattern 35A is the same as that of the first antireflection film pattern 25A described above.

Referring to FIG. 21, a strip process is performed to remove the second photoresist pattern 36A and the second antireflection film pattern 35A remaining between the second spacer patterns 37A. The second spacer pattern 37A is a line type extending in the second direction and has a first sacrificial film pattern 24A in a line shape extending in a first direction formed under the second spacer pattern 37A and a second sacrificial film pattern Is used as an etching barrier of the gap fill material 29 formed between the film patterns 24A.

At this time, the second spacer pattern 37A as the etching barrier is a line type having a width "W1" in the second direction, and is distinguished from the line-shaped first sacrificial pattern 24A having the width "W2 & do. More specifically, the thickness "W1" of the second spacer pattern 37A is determined by the thickness of the second spacer material film 37 formed on the side wall of the second photoresist pattern 36A and the second antireflection film 35A And is not affected by the first sacrificial film pattern 24A. Similarly, the thickness "W2" of the first sacrificial film pattern 24A is not affected by the second spacer pattern 37A. That is, according to one embodiment of the present invention, there is an advantage that the thicknesses of the line-shaped patterns formed in the first direction and the second direction can be adjusted independently without being influenced by each other.

Referring to FIG. 2M, a second sacrificial film pattern 24B is formed by etching the first sacrificial film pattern 24A and the gap fill material 29 with the second spacer pattern 37A as an etching barrier. According to a preferred embodiment of the present invention, when the first sacrificial pattern 24A is a polysilicon film, the gap fill material 29 is an oxide film, and the first hard mask film 23 is a silicon oxynitride film, Using HBr as a main component, Cl2 / O2 added etch gas can selectively remove only the polysilicon film without damaging the oxide film and the silicon oxynitride film.

Then, the second spacer pattern 37A on the second sacrificial film pattern 24B is removed using a cleaning process. According to a preferred embodiment of the present invention, when the second spacer pattern 37A is a cryogenic oxide film and the gap fill material 39 is an oxide film, the gap fill material 39 is also removed during the cleaning process of the second spacer pattern 37A Can be removed.

Thus, the columnar second sacrificial film pattern 24B having a square top surface is exposed.

Referring to FIG. 2N, a second hard mask 38 is buried in a space between the second sacrificial film patterns 24B. The second hard mask layer 38 is preferably a material having the second sacrificial layer pattern 24B and etching selectivity, and the second hard mask layer 38 may be an oxide layer or a nitride layer.

After the second hard mask film 38 is buried, a planarization process (CMP or etch-back process) can be further performed if necessary.

Referring to FIG. 20, the second sacrificial film pattern 24B is selectively removed by a cleaning process, so that the second hard mask film 38 remains. At this time, in a preferred embodiment of the present invention, when the second hard mask 38 is an oxide film and the second sacrificial film pattern 24B is a polysilicon film, a cleaning solution to which HF is added as a main component of nitric acid can be used . The cleaning solution has an advantage in that only the second sacrificial film pattern 24B can be selectively removed without damaging the second hard mask film 38 because the etching selectivity of the polysilicon film to the oxide film is very high (about 100: 1) have.

At this time, the second hard mask layer 38 provides a hole pattern having a square top surface (a position where the second sacrificial pattern is removed), wherein the cross section of the hole pattern has a vertical profile. This is a profile that is difficult to form by a general etching process, and is an advantage of the cleaning process described above.

As a result, the second hard mask layer 38 having a good profile can be formed. Although not shown in the figure, the second hard mask layer 38 may be formed of the first hard mask layer 22, And a first hard mask film pattern (not shown) can be formed by etching. At this time, since the second hard mask film 38 has a vertical profile, the profile of the second hard mask film 38 is transferred to the first hard mask film pattern (not shown) to form a fine pattern having a vertical profile . In particular, the first hard mask film pattern (not shown) can be used as the storage node contact mask of the memory device, and with the storage node contact mask, it is possible to form a storage node contact hole with a good profile.

It is to be noted that the technical idea of the present invention has been specifically described in accordance with the above embodiments, but it should be noted that the above embodiments are for explanation purposes only and not for the purpose of limitation. In addition, it will be understood by those of ordinary skill in the art that various embodiments are possible within the scope of the technical idea of the present invention.

21: substrate 22, 23: first hard mask film
24: sacrificial film 25: first antireflection film
26: first photosensitive film 27: material film for first spacer
29: Gap fill material 35: Second anti-reflection film
36: second photosensitive film 37: material film for second spacer
38: second hard mask film

Claims (11)

Forming a first hard mask layer on the etching layer;
Forming a sacrificial layer on the first hardmask layer;
Forming the sacrificial layer into a first sacrificial film pattern through a first SPT (Space Partten Technology) process extending in a first direction;
Forming a gap fill material filling between the first sacrificial film patterns;
The first sacrificial film pattern and the second sacrificial film pattern are formed on the second sacrificial film pattern by a second SPT process that extends on the gap fill material in a second direction intersecting the first direction, Pattern;
Forming a second hard mask material between the second sacrificial film patterns;
Removing the second sacrificial film pattern to form a second hard mask pattern having a hole pattern; And
And etching the first hardmask layer exposed by the hole pattern to form a first hardmask pattern
A method for forming a fine pattern of a semiconductor device.
The method according to claim 1,
Wherein the sacrificial film comprises a polysilicon film and the second hard mask material comprises an oxide film or a nitride film.
delete delete 3. The method of claim 2,
Wherein the first hard mask layer is a structure in which an amorphous carbon film and a silicon oxynitride film are stacked.
delete The method according to claim 1,
And etching the etching layer with the first hard mask pattern using an etching barrier.
The method according to claim 1,
The method of claim 2, wherein the removal of the second sacrificial film pattern is performed by a cleaning process using a cleaning solution containing nitric acid.
The method according to claim 1,
Wherein the removal of the second sacrificial film pattern is performed in a cleaning step.
The method according to claim 1,
Further comprising the step of performing a planarization process after the step of forming a gap fill material filling between the first sacrificial film patterns.
The method according to claim 1,
And forming a second hard mask material between the second sacrificial pattern and a second hard mask material to fill the gap between the second sacrificial pattern.

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