KR101766813B1 - Digital input overflow processing device - Google Patents

Abstract

An overflow detection unit for detecting an overflow of a digital signal input from a digital / analog converter for converting an analog signal into a digital signal, wherein the digital part is mounted on a relay apparatus for relaying a mobile communication signal Thereby performing digital processing necessary for the relay signal; And a control unit that is disposed on a signal transmission path of the digital signal and controls the overdrive digital signal based on at least one of the overdelivery and overdelivery levels transmitted as a detection result of the overdrive detection unit There is provided a digital input overflow processing apparatus including a digital gain control section for controlling gain.

Description

[0001] DIGITAL INPUT OVERFLOW PROCESSING DEVICE [0002]

The present invention relates to a digital input overflow processing apparatus, and more particularly, to a digital input overflow processing apparatus capable of solving a digital input overflow and a digital spurious problem by monitoring whether or not a signal inputted from an analog to digital converter To a digital input overflow processing device.

In general, a repeater is installed in a mobile communication system to expand a service area of a base station or to resolve a shadow area. In particular, in a digital mobile communication system, rather than a method of simply amplifying the power of an RF signal by receiving an RF signal, a digital signal is extracted from the received RF signal, digital signal processing is performed on the extracted digital signal, Digital repeater is applied.

In such a digital repeater, an analog-to-digital converter that converts an analog signal into a digital signal is indispensable. At this time, when the input and the input are applied to the input of the analog / digital converter, bit overflow may cause problems in the system and the service due to signal distortion and digital spurious emission.

Therefore, it is required to monitor the input and the input of the digital part from the analog / digital converter to prevent signal distortion and digital spurious emission according to the over input.

The present invention provides a digital input overflow processing apparatus capable of solving a digital input overflow and a digital spurious problem by monitoring whether a signal input from a digital to analog converter (A / D)

According to an aspect of the present invention, there is provided an over and over detection unit for detecting overflow of a digital signal input from a digital / analog converter for converting an analog signal into a digital signal, And performing digital processing necessary for the relay signal; And a control unit that is disposed on a signal transmission path of the digital signal and controls the overdrive digital signal based on at least one of the overdelivery and overdelivery levels transmitted as a detection result of the overdrive detection unit There is provided a digital input overflow processing apparatus including a digital gain control section for controlling gain.

In one embodiment, the digital gain control section includes:

Wherein a transmission delay from a signal detection point of the over-input detection unit to a placement position of the digital gain control unit is longer than a transmission delay time of the over- And a value larger than the delay.

In one embodiment, a transmission delay, which is disposed on the signal transmission path, is located at a rear end of the input detection section and at a front end of the digital gain control section, and from the signal detection point of the over-detection detection section to the placement position of the digital gain control section, And a delay element for giving a time delay to be larger than the time delay required for overdetection detection in the input detection section.

In one embodiment, the over-

Detecting whether or not a digital signal input from the analog / digital converter to the digital part exceeds a predetermined maximum bit overflow or whether an output level of the digital signal exceeds a predetermined peak value, Or not.

In one embodiment, the digital filter may further include a digital filter that removes signals other than the frequency band of the relay signal in order to remove digital spurious signals generated by the overflow of the digital signal output from the analog / digital converter have.

In one embodiment, the digital filter may be disposed at a rear end of the digital gain control unit with respect to the signal transmission path.

According to the embodiment of the present invention, it is possible to solve the digital input overflow and digital spurious problem by monitoring whether or not a signal input from the analog to digital converter into a digital part is input and output, Damage to PAU due to saturation of parts and digital spurious emission, system characteristics and / or deterioration of service can be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a digital repeater to which the present invention is applicable. Fig.
2 is a diagram for explaining a digital input overflow processing apparatus according to the first embodiment of the present invention.
3 is a diagram for explaining a digital input overflow processing apparatus according to a second embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. In addition, numerals (e.g., first, second, etc.) used in the description of the present invention are merely an identifier for distinguishing one component from another.

Also, in this specification, when an element is referred to as being "connected" or "connected" with another element, the element may be directly connected or directly connected to the other element, It should be understood that, unless an opposite description is present, it may be connected or connected via another element in the middle.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically illustrating an example of a digital repeater to which the present invention is applicable.

Referring to FIG. 1, a down-converter 10, an analog-to-digital converter (ADC) 12, and a digital signal processor (not shown) are connected to a downlink signal transmission path A DAC (Digital to Analog Converter) 14, an up converter 16, and a PAU (Power Amplification Unit) 18 are disposed. (Low Noise Amplifier) 28, a downconverter 26, an ADC 24, a digital signal processor (not shown), and the like, along its signal propagation path on an uplink signal path (i.e., a reverse path) 30, a DAC 22, and an up-converter 20 are disposed.

The down-converter 10 on the downlink signal transmission path receives a radio frequency (RF) signal transmitted from a base station (not shown) by wire or radio, down-converts the RF signal into an IF (Intermediate Frequency) Conversion is performed. The frequency down-converted IF signal is sampled by the ADC 12 and converted into a digital signal having a specific number of bits (for example, 14 bits). The digital signal converted by the ADC 12 is subjected to signal processing by the digital signal processing unit 30 and the digital signal processed signal is input to the DAC 14 and can be converted into an analog signal again. The analog signal output from the DAC 14 is frequency up-converted to an RF signal by the up-converter 16, and the RF up-converted RF signal is amplified by the PAU 18 and transmitted through a service antenna May be output to user terminals within the coverage.

The uplink signal propagation path may be configured to have the same function as that of the downlink signal propagation path described above, which differs from the signal propagation direction. That is, the LNA 28 on the uplink signal transmission path low-noise amplifies the RF signal input through the service antenna (not shown) and transmits the RF signal to the down converter 26. The down converter 26 converts the RF signal into an IF signal Frequency downconversion. The frequency down-converted IF signal is converted into a digital signal by the ADC 24, and the converted digital signal is subjected to digital signal processing by the digital signal processing unit 30 and then input to the DAC 22. [ The DAC 22 converts a digital signal into an analog signal, and the converted analog signal of the IF band can be frequency-up-converted to an RF signal by the up-converter 20 and transmitted to a base station (not shown).

As described above, in the digital repeater, there is a digital signal processing unit 30 for digital signal processing, and the digital signal processing unit 30 can be implemented by an FPGA (Field Programmable Gate Array) as shown in FIG. 1, the digital signal processing section 30 may be implemented separately on the downlink and uplink, although the digital signal processing section 30 is shown as being implemented in common on the downlink and uplink signal propagation paths.

The digital signal processing unit 30 applies image processing such as image rejection, blocking of DC (direct current) components, digital filtering, frequency allocation (FA), and the like by applying a preprogrammed processing algorithm to a digital signal. Or digital signal processing such as signal processing, gain control, and multiplexing for each sector. The digital signal processed by the digital signal processing unit 30 is output to the output device at the end of the digital signal transmission path (in the case of FIG. 1, at the end of the downlink signal transmission path and the digital signal transmission on the uplink signal transmission path) (I.e., each of the DACs 14 and 22 arranged) is output to the outside (i.e., the terminal or the base station).

Hereinafter, a digital input overflow processing apparatus according to each embodiment of the present invention will be described in detail. 2 and 3, the digital input overflow processing device according to each of the embodiments includes the digital repeater described above (i.e., the service antenna for transmitting the downlink relay signal of the forward path to the outside and the uplink relay signal of the reverse path To a digital repeater including both link antennas that transmit signals in the direction of an equipment station). Also, at this time, an analog-to-digital converter will be provided in each of the forward path and the reverse path, so that a digital input overflow processing apparatus according to an embodiment of the present invention to be described below can be implemented in both a forward path and a reverse path. Although not shown and described in the present specification, the present invention can also be applied to each relay unit in a distributed antenna system (Distributed Antenna System) including a main unit and a plurality of distributed remote units .

2 is a diagram for explaining a digital input overflow processing apparatus according to the first embodiment of the present invention.

Referring to FIG. 2, the digital input overflow processing apparatus according to the first embodiment of the present invention may include an over input detector 210, a digital gain controller 220, and a digital filter 230. At this time, the digital input overflow processing device can be implemented in the digital part 200 mounted in the relay device and responsible for the digital processing required for the relay signal (that is, the downlink or uplink mobile communication signal).

And an input detection unit 210 are disposed at the front end of the digital part 200 on the basis of the signal transmission path and output the digital signal to the digital part 200 from the analog / digital converter 110, And detects an overflow of the signal.

 When the analog signal input to the analog-to-digital converter 110 is an overflow, the processing capability of the analog-to-digital converter 110 is saturated and an overflow occurs in the converted digital signal output from the A / D converter 110 . In addition, when the processing capability of the A / D converter 110 is saturated, an overflow may occur in a digital signal to be output, and a digital spurious wave may be generated. An example of this is shown in FIG. 2 (a).

Therefore, the over-input detection unit 210 determines whether an overflow has occurred in the digital signal input from the analog-to-digital converter 110 located in the preceding stage of the digital part 200 to the digital part 200 based on the signal transmission path Lt; / RTI >

At this time, the detection as to whether or not the over-input detection by the over-input detection unit 210 can be performed, for example, by monitoring whether or not the input digital signal exceeds a predetermined (i.e., allowed) maximum bit overflow. For example, when the digital signal output from the A / D converter 110 is a 14-bit signal, whether or not an overflow has occurred in the total 13 bits of data excluding the 1-bit sign bit, Or not. As another example, the detection as to whether or not the over-input detection by the over-input detection unit 210 may be performed by monitoring whether or not the digital output level output from the analog-to-digital converter 110 exceeds a predetermined peak value.

 In the above-described manner, the over-input detection unit 210 can determine whether or not the input digital signal is over-input. If it is determined that the over-input is present, The gain control unit 220 can output a gain change control signal. Also, depending on the implementation method, the over-input detection unit 210 may detect the degree of input and the degree of input (i.e., the input level) as to how much the input digital signal is input. In this case, as the determination result, the over-input detection section 210 may output the variable gain change control signal according to the over-input level exceeding the allowable range to the digital gain control section 220. [

The input detection unit 210 may be implemented as a separate component for only the corresponding function, but may be implemented in a digital signal processor (DSP), a field programmable gate array (FPGA), or a central processing unit (CPU) The corresponding function may be implemented.

The digital gain control unit 220 is disposed on the downstream side of the above-described input detection unit 210 on the basis of the signal transmission path of the digital signal. Based on the gain change control signal transmitted from the over-input detection unit 210, And performs gain control so that the digital signal is gain-changed below a predetermined allowable level.

As a gain control method through the digital gain controller 220, the following methods can be applied. For example, the digital gain control unit 220 may apply a fixed attenuation rate to lower the signal level of the digital signal. At this time, if the signal level can not be lowered below the predetermined allowable level by only a single gain change using the fixed signal attenuation rate, the gain changing operation may be repeatedly performed. In another example, the digital gain control unit 220 may be implemented as a variable attenuator so that the signal attenuation can be made as much as the input level exceeding the allowable level according to the variable gain change control signal transmitted from the over- have. In this case, the digital gain controller 220 may be implemented as a variable attenuator.

The digital gain control unit 220 may control the transmission delay from the signal detection point of the over-input detection unit 210 to the placement position of the digital gain control unit 220 in consideration of the signal transmission delay on the signal transmission path of the digital signal (See Delay A in FIG. 2) has a value larger than a time delay (see Delay B in FIG. 2) required for over-input detection in the over-input detecting section 210. [ This is to increase the effectiveness of the gain control on the input digital signal.

Although it is shown in FIG. 2 that other digital components are absent between the over-input detection unit 210 and the digital gain control unit 220, other digital components may exist between them. In the latter case, the delay time required for the digital operation in the other digital constituent units, which may be interposed between the input detection unit 210 and the digital gain control unit 220, It is sufficient that the total transmission delay has a larger value than the detection delay by the input detection section 210. [ Therefore, the arrangement position of the digital gain control section 220 can be selected as an appropriate position on the signal transmission path in consideration of the detection delay by the over-input detection section 210.

When the gain control process is performed through the digital gain controller 220, a signal in which overflow of the overdriven digital signal is removed can be obtained. An example of this is shown in FIG. 2 (b).

The digital signal output in a state in which the over and input problems are solved through the gain control process of the digital gain controller 220 is input to the digital filter 230 disposed at the rear stage of the digital gain controller 220, .

 As described above, the digital filter 230 performs a role of overflowing the digital signal from the A / D converter 110 according to the input of the overflow and eliminating the digital spurious generated. For example, the digital filter 230 may be implemented to remove unwanted waves existing in a band other than the frequency band of the relay signal that should normally be transmitted. An example of this is shown in FIG. 2 (c).

2 shows a case where the digital filter 230 is disposed at the rear end of the digital gain control unit 220 in FIG. 2, but the digital filter 230 is disposed at a position different from that in FIG. 2 It is possible. For example, it may be disposed between the signal detection point by the over-input detection unit 210 and the digital gain control unit 220 based on the signal transmission path. However, in a state where an excessive overflow has occurred, the filter function may also deteriorate. In FIG. 2, the digital filter 230 is disposed at the rear end of the digital gain controller 220 in consideration of this case.

The digital input overflow processing apparatus according to the first embodiment of the present invention can appropriately remove the digital input signal and the digital input signal from the digital part 200 d)), deterioration of the PAU and the like in the rear stage, deterioration of the system and / or service can be prevented.

3 is a diagram for explaining a digital input overflow processing apparatus according to a second embodiment of the present invention.

In the following description of the second embodiment of the present invention, the same elements as those in the first embodiment are not described again, and the following description will focus on functions and roles related to the components added through the second embodiment do. Referring to Fig. 3, in the second embodiment of the present invention, a delay element 215 is further added as compared with the digital input overflow processing apparatus of the first embodiment illustrated in Fig.

The delay element 215 is disposed between the signal detection point of the input and detection section 210 and the digital gain control section 220 on the basis of the signal transmission path and forcibly gives a delay of a predetermined time to the digital signal to be transmitted. The reason for this is as follows.

The delay of the self-transmission according to the path between the signal detection point of the over-input detection unit 210 and the digital gain control unit 220 is greater than the detection delay of the over- , Long) may be difficult to implement. The transmission delay from the signal detection point of the over-input detection section 210 to the digital gain control section 220 is controlled by the over-input detection section 210, Can be made larger than the detection delay in the case of FIG.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the following claims And changes may be made without departing from the spirit and scope of the invention.

110: Analog-to-digital converter
200: Digital Part
210: an input detector
215: Delay element
220: digital gain control section
230: Digital filter

Claims (6)

delete An overflow detection unit for detecting an overflow of a digital signal input from a digital / analog converter for converting an analog signal into a digital signal, wherein the digital part is mounted on a relay apparatus for relaying a mobile communication signal Thereby performing digital processing necessary for the relay signal; And
And a gain control unit which is disposed on a signal transmission path of the digital signal and outputs a gain control signal for changing the overdriven digital signal based on at least one of the over- A digital gain control section
, ≪ / RTI &
Wherein the digital gain control unit comprises:
Wherein a transmission delay from a signal detection point of the over-input detection unit to a placement position of the digital gain control unit is longer than a transmission delay time of the over- Wherein the digital input overflow processing unit is arranged at a position that has a larger value than the delay.
An overflow detection unit for detecting an overflow of a digital signal input from a digital / analog converter for converting an analog signal into a digital signal, wherein the digital part is mounted on a relay apparatus for relaying a mobile communication signal Thereby performing digital processing necessary for the relay signal;
And a gain control unit which is disposed on a signal transmission path of the digital signal and outputs a gain control signal for changing the overdriven digital signal based on at least one of the over- A digital gain control unit for controlling the digital gain; And
A transmission delay from the signal detection point of the over-input detection unit to the arrangement position of the digital gain control unit is provided on the signal input path of the over- A delay element for giving a time delay to be larger than a time delay required for input detection;
And the digital input overflow processing unit.
The method according to claim 2 or 3,
The over-
Detecting whether or not a digital signal input from the analog / digital converter to the digital part exceeds a predetermined maximum bit overflow or whether an output level of the digital signal exceeds a predetermined peak value, Wherein the digital input overflow processing unit determines whether the digital input overflow processing unit determines that the digital input overflow processing unit
The method according to claim 2 or 3,
Further comprising a digital filter for removing signals other than the frequency band of the relay signal in order to eliminate digital spurious signals generated by an overflow of the digital signal output from the analog- Device.
6. The method of claim 5,
Wherein the digital filter is disposed at a rear end of the digital gain control unit with respect to the signal transmission path.

Images