KR101763485B1 - A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV - Google Patents

A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV Download PDF

Info

Publication number
KR101763485B1
KR101763485B1 KR1020150162787A KR20150162787A KR101763485B1 KR 101763485 B1 KR101763485 B1 KR 101763485B1 KR 1020150162787 A KR1020150162787 A KR 1020150162787A KR 20150162787 A KR20150162787 A KR 20150162787A KR 101763485 B1 KR101763485 B1 KR 101763485B1
Authority
KR
South Korea
Prior art keywords
radio frequency
low
signal
conversion gain
amplifier
Prior art date
Application number
KR1020150162787A
Other languages
Korean (ko)
Other versions
KR20170058761A (en
Inventor
오남진
Original Assignee
한국교통대학교산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한국교통대학교산학협력단 filed Critical 한국교통대학교산학협력단
Priority to KR1020150162787A priority Critical patent/KR101763485B1/en
Publication of KR20170058761A publication Critical patent/KR20170058761A/en
Application granted granted Critical
Publication of KR101763485B1 publication Critical patent/KR101763485B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/163—Special arrangements for the reduction of the damping of resonant circuits of receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/18—Input circuits, e.g. for coupling to an antenna or a transmission line

Abstract

The present invention relates to a single double-balanced radio frequency receiving circuit, wherein by using a series LC resonator (Series LC Resonator), the output impedance at low frequencies and the intermediate frequency component of the output signal are high and by using a double- It is possible to provide a single double balanced radio receiving circuit which has high power efficiency and can control the conversion gain by using the conversion gain control section.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a low-power single-balanced RF receiver circuit having a variable gain function and a variable gain controllable double-balanced LMV

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single double-balanced high-frequency receiving circuit, and more particularly to a high-frequency receiving circuit incorporating a low-noise amplifier (LNA), a voltage controlled oscillator and a mixer.

Low power, low voltage, and high integration are always an important challenge in integrated circuit design, especially in mobile wireless communications systems that rely on limited battery power. To meet such requirements as low power, high integration, a single radio frequency receiver circuit is introduced that integrates mixers and oscillators into a single circuit.

1 is a circuit diagram showing a single radio frequency receiving circuit 10 according to the prior art.

1, a conventional radio frequency receiving circuit 10 includes an amplifier 110 receiving a signal of a radio frequency band and a voltage controlled oscillator 120 connected to a drain of the amplifier 110 The voltage controlled oscillator 120 includes an oscillation circuit 121 in which a gate and a drain are mutually crossed, and a PLC resonator 122 in which an inductor, a resistor, and a capacitor are connected in parallel.

The operation of the single radio frequency receiving circuit 10 according to the related art will be described. The amplifier 110 is a current source of the voltage controlled oscillator 120, And adjusts the amount of current supplied to the oscillator 120. The voltage controlled oscillator 120 generates an oscillation signal having a constant frequency according to the characteristics of the oscillation circuit 121 in which the gate and the drain are mutually crossed. The frequency of the oscillation signal generated by the voltage control oscillator 120 is controlled by the oscillation circuit 121 And the resonance frequency of the PLC resonance circuit 122 connected to the resonance circuit.

In this case, the voltage-controlled oscillator 120 generates a local oscillator frequency signal generated according to the oscillation circuit 121 and the PLC resonator 122, a radio frequency (RF) signal input by the current- It is possible to output a mixed signal. That is, the conventional single-frequency receiving circuit 10 includes the amplifier 110 and the voltage-controlled oscillator 120 connected to the drain of the amplifier to provide a single circuit in which the oscillator and the mixer are integrated.

The current outputted by the single radio frequency receiving circuit 10 according to the prior art can be expressed by the following Equation 1 and the maximum voltage value of the output signal can be expressed by Equation 2 below.

Figure 112015113145915-pat00001

Figure 112015113145915-pat00002

Here, Ics is by the direct current value is, g m is the transconductance (transconductance), and, R L is cheulryeok resistance, ω LO is a voltage-controlled oscillator 120 of the amplifier 110 to the amplifier 110 is supplied RF RF is the radio frequency of the signal input to the amplifier 110. < RTI ID = 0.0 >

The first term in Equation 1 represents a resonance frequency component (LO component) of the voltage controlled oscillator 120, and the second term represents an intermediate frequency component.

The impedance of the inductor L is reduced to a short state due to a decrease in impedance at a low frequency with reference to the resonance frequency and the impedance of the capacitor Cvar is shortened due to a decrease in impedance at a high frequency with reference to the resonance frequency do. Since the capacitor Cvar and the inductor L are connected in parallel to the PLC resonator 122, the low frequency and high frequency components of the output signal are weakened.

Since the single radio frequency receiving circuit 10 according to the related art uses the PLC resonator 122, the impedance value of the output terminal at the low frequency is small, so that the intermediate frequency component of the output signal is smaller than the radio frequency component There is a problem in that the power efficiency is deteriorated.

In addition, since a single radio frequency receiving circuit 10 according to the related art has a small impedance value at a low frequency, a capacitor having a large value is required to sufficiently form a pass band of a low pass filter, Thereby increasing the size of the semiconductor device.

In addition, the conventional radio frequency receiving circuit 10 can not control the conversion gain and thus can not control the power consumption according to the use environment.

It is an object of the present invention to provide a single double balanced radio frequency receiving circuit with high output impedance at low frequencies.

It is a further object of the present invention to provide a single double balanced radio frequency receiving circuit with a high intermediate frequency component of the output signal.

Another object of the present invention is to provide a single, double balanced radio frequency receiving circuit with high power efficiency.

It is also an object of the present invention to provide a single dual balanced radio frequency receiving circuit capable of regulating the conversion gain.

According to an aspect of the present invention, there is provided a single dual balanced radio frequency receiving circuit, wherein output terminals of the first and second single balanced radio frequency receiving circuits are connected in parallel, The single-balanced LMV includes an amplifier for receiving a signal of a radio frequency band, a resonant frequency generator connected to the amplifier for generating a resonant frequency using a series LC resonator, A low-pass filter for passing a low-frequency band of a signal mixed with the resonance frequency, a conversion circuit for adjusting a conversion gain of the voltage-controlled oscillator according to the conversion gain control signal, A gain control unit, and an output resistance unit for preventing an output terminal and a power terminal from being short-circuited.

The conversion gain control unit may include an oscillation circuit in which gates and drains of two or more transistors cross each other and a current source that adjusts an amount of current supplied to the oscillation circuit in accordance with the conversion gain control voltage.

The low pass filter may be an RC low pass filter, and the first and second single balanced radio frequency receiving circuits may share a capacitor of the RC low pass filter.

Also, the first and second single balanced radio frequency inputs may share an inductor of the series LC resonator.

In addition, the series LC resonator may further include a variable capacitor connected in parallel with the inductor.

In addition, the amplifier may include a low noise amplifier including an inductor connected to the gate and the source.

A single double balanced radio frequency receiving circuit according to an embodiment of the present invention provides a single double balanced radio frequency receiving circuit having a high output impedance at a low frequency and a high intermediate frequency component of an output signal by using a series LC resonator can do.

In addition, the single double balanced radio frequency receiving circuit according to the embodiment of the present invention can provide a single double balanced radio frequency receiving circuit with high power efficiency by using a double-balanced circuit.

In addition, the single double balanced radio frequency receiving circuit according to the embodiment of the present invention can provide a single double balanced radio receiving circuit capable of adjusting the conversion gain by using the conversion gain control unit including the oscillation circuit.

1 is a circuit diagram showing a single radio frequency receiving circuit 10 according to the prior art.
2 is a diagram illustrating a single dual balanced radio frequency receiver circuit in accordance with an embodiment of the present invention.
3 is a circuit diagram showing a single balanced radio frequency receiving circuit according to an embodiment of the present invention.
4 is a diagram showing a frequency spectrum of a signal output from the voltage-controlled oscillator.
5 is a diagram illustrating impedance characteristics at an input node and an output node of a voltage controlled oscillator according to an embodiment of the present invention.
6 is a diagram illustrating frequency characteristics at an input node and an output node of a voltage controlled oscillator according to an embodiment of the present invention.
7 is a graph showing frequency characteristics of a resonant frequency output node and an output terminal of a single double balanced radio frequency receiving circuit according to an embodiment of the present invention.
8 is a diagram showing waveforms for a radio frequency input signal RF Input and an intermediate frequency signal IF Output.
9 is a diagram illustrating the conversion gain of a single dual balanced radio frequency receiver circuit according to an embodiment of the present invention.
10 is a diagram illustrating phase noise characteristics of a single dual balanced radio frequency receiver circuit according to an embodiment of the present invention.
11 is a diagram illustrating the overall noise figure of a single dual balanced radio frequency receiver circuit according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

2 is a diagram illustrating a single dual balanced radio frequency receiver circuit 20 in accordance with an embodiment of the present invention.

2, a single dual balanced radio frequency receiving circuit 20 according to an embodiment of the present invention includes an output stage (not shown) of first and second single balanced LMVs 21 and 22 IF + and IF- are connected in parallel and the single balanced radio frequency receiving circuits 21 and 22 are connected to an amplifier 210 receiving a signal of a radio frequency band and a series LC resonator A voltage controlled oscillator 220 for generating a resonance frequency using an LC resonator 222, receiving a signal of a radio frequency band amplified by the amplifier 210 and mixing the received signal with a resonance frequency, A conversion gain control unit 240 for adjusting the conversion gain of the voltage-controlled oscillator 220 in accordance with the conversion gain control signal Vvga, and an output stage IF +, IF- (VDD) from being short-circuited And an output resistance unit 250 for outputting the output voltage.

Since the second single balanced radio frequency receiving circuit 22 has the same structure as the first single balanced radio frequency receiving circuit 21, a detailed description of the second single balanced radio frequency receiving circuit 22 will be omitted.

The amplifier 210 may include a first transistor M1 of a first conductivity type. A signal of a radio frequency (RF) band may be input to the gate of the first transistor M1, a source may be coupled to a ground terminal, and a drain may be coupled to the voltage controlled oscillator 220. [

At this time, the amplifier 210 may be a low noise amplifier including an inverter Lg connected to the gate of the first transistor M1 and an inverter Ls connected to the source.

The voltage controlled oscillator 220 may include a first oscillation circuit 221 in which a gate and a drain are mutually crossed and a series LC resonator 222 in which a capacitor and an inductor are connected in series. The first oscillation circuit 221 may include second and third transistors M2 and M3 of a first conductivity type whose source is connected to the amplifier 210 and the gate of the second transistor M2 may include a third transistor M2, The gate of the third transistor M3 may be connected to the drain of the second transistor M2, and the gate of the third transistor M3 may be connected to the drain of the second transistor M2. The series LC resonator 222 has a structure in which one electrode is connected between the first and second capacitors Ccpl1 and Ccpl2 and the first and second capacitors Ccpl1 and Ccpl2 connected to the drains of the second and third transistors M2 and M3 And an inductor 2L connected in series.

At this time, the first and second capacitors Ccpl1 and Ccpl2 may be formed of a metal-insulator-metal (MIM) device.

The low pass filter 230 may be coupled between the voltage controlled oscillator 220 and the output resistor section 250. The low pass filter 230 is an RC low pass filter and includes a first and a second resistor R FT 1 and R FT 2 and a first and a second resistor a capacitor connected between R FT 1, R FT 2) ( may include a C FT).

At this time, the first and second single balanced radio frequency receiving circuits 21 and 22 may share the capacitors of the low pass filter 230. That is, the first and second single balanced radio frequency receiving circuits 21 and 22 may be connected in parallel around the capacitor C FT of the low pass filter 230.

The conversion gain control unit 240 includes a second oscillation circuit 241 in which two or more transistors are mutually cross-connected with each other at a gate and a drain, and a current source (not shown) that adjusts the amount of current supplied to the second oscillation circuit 241 according to the conversion gain control voltage 242).

The second oscillation circuit 241 may include fourth and fifth transistors M4 and M5 of the second conductivity type whose source is connected to the current source 242 and the gate of the fourth transistor 4 may include a fifth transistor And the gate of the fifth transistor M5 may be connected to the drain of the fourth transistor M4.

The source of the current source 242 is connected to the power supply terminal VDD and the conversion gain control signal may be applied to the gate.

The second oscillation circuit 241 may have a structure complementary to the first oscillation circuit 221 of the voltage controlled oscillator 220 to improve the conversion gain of the voltage controlled oscillator 220. At this time, the current source 242 adjusts the current supplied to the second oscillation circuit 241 in accordance with the conversion gain control signal, and the second oscillation circuit 241 adjusts the current supplied from the current source 242, The degree of conversion gain enhancement of the oscillator 220 can be controlled.

The output resistance unit 250 may include one or more resistors R L and is connected between the power supply terminal VDD and the output terminals IF + and IF- so that the output terminals IF + and IF- are connected to the power supply terminal VDD (Short).

The specific operation of the dual balanced radio frequency receiving circuit 20 according to the embodiment of the present invention will be described with reference to FIG.

3 is a circuit diagram showing a single balanced radio frequency receiving circuit 21, 22 according to an embodiment of the present invention.

As shown in FIG. 3, the amplifier 210 is a current source that supplies a current to the voltage-controlled oscillator 220, and adjusts the current supplied to the voltage-controlled oscillator according to an input radio frequency (RF) signal.

The voltage-controlled oscillator 220 generates a local oscillator frequency using the first oscillation circuit 221 and the series LC resonator 222. Since the source of the voltage controlled oscillator 220 is connected to the drain of the amplifier 210, the current supplied to the voltage controlled oscillator 220 is adjusted according to a signal of the radio frequency band inputted to the amplifier 210. Therefore, the signal output from the voltage-controlled oscillator 220 is a signal obtained by mixing a signal of a radio frequency band input to the amplifier 210 and a resonance frequency generated by using the serial LC resonator 222.

The low frequency pass filter 230 remarkably attenuates the frequency components higher than the pass band set by the resistor R FT and the capacitor C FT among the signals mixed in the resonance frequency in the voltage controlled oscillator 220. Therefore, an intermediate frequency signal of a low frequency band can be output to the output stages IF + and IF-.

The conversion gain control unit 240 may have a structure complementary to the first oscillation circuit as described above to improve the conversion gain of the voltage controlled oscillator 220. [

The output resistance unit 250 is connected in parallel to the conversion gain control unit 240 so that the conversion gain control unit 240 removes the influence on the function of improving the conversion gain of the voltage control oscillator 220, VDD) and a short can be prevented.

Since the single balanced radio frequency receiving circuit 20 and the single balanced radio frequency receiving circuit 21 and 22 are connected in parallel, the conversion gain is doubled, and the intermediate frequency component IF component The voltage can be expressed by the following equation (3).

Figure 112015113145915-pat00003

Where g m is the transconductance of the amplifier 210, V RF is the voltage of the incoming radio frequency signal, and R L is the output resistance value.

The signal mixed by the voltage-controlled oscillator 220 will be described with reference to FIG.

4 is a diagram showing a frequency spectrum of a signal output from the voltage-controlled oscillator 220. As shown in FIG.

4, when the frequency components of the signals output from the output nodes Vd + and Vd- of the first and second oscillation circuits 221 and 241 are viewed, the resonance frequency signal f LO and the radio frequency signal And the signals converted into the low frequency band (DC) are output together. In contrast, since the signals through the low-pass filter 230 are output to the output stages IF + and IF-, the resonance frequency signal f LO higher than the pass band is filtered and the low frequency band DC signal is output.

5 is a diagram showing impedance characteristics at input nodes (Vg +, Vg-, FIG. 3) and output nodes (Vd +, Vd-, see FIG. 3) of the voltage controlled oscillator 220 according to the embodiment of the present invention .

As shown in FIG. 5, the impedance of the low-frequency and high-frequency bands is significantly reduced in the PLC resonator 122 based on the resonance frequency. On the other hand, the series LC resonator 222 increases in impedance as the frequency is lowered on the basis of the resonance frequency. That is, the single double balanced radio receiving circuit 20 according to the embodiment of the present invention can have increased impedance in the low frequency band by using the series LC resonator 222. [

Therefore, the single double balanced radio frequency receiving circuit 20 according to the embodiment of the present invention can reduce the size of the capacitor C FT of the low pass filter 230 due to the increased impedance in the low frequency band, Can be improved.

In the resonance frequency band, the first and second capacitors Ccpl1, Ccpl2, Ccpl3, and Ccpl4 operate as if the impedance decreases and is short-circuited. The resonance frequency of the voltage controlled oscillator 220 is determined by the inductor 2L of the series LC resonator 222 and the PLC resonator composed of the parasitic capacitor component at the gate node of the first oscillation circuit 221. [

At this time, the first and second capacitors Ccpl1, Ccpl2, Ccpl3 and Ccpl4 of the series LC resonator 222 can be sized to have the same resonance frequency as the PLC resonator 122, ) Can be reduced.

6 is a diagram showing frequency characteristics at input nodes (Vg +, Vg-, FIG. 3) and output nodes (Vd +, Vd-, see FIG. 3) of a voltage controlled oscillator 220 according to an embodiment of the present invention .

6, the frequency components at the input nodes (Vg +, Vg-) have the intermediate frequency component (IF component) at the output nodes (Vd +, Vd-) Is not weakened.

7 shows the frequency characteristics of the resonant frequency output node (LO +, LO-, see FIG. 2) and the output stage (IF +, IF-, see FIG. 2) of a single double balanced radio frequency receiving circuit 20 according to an embodiment of the present invention. Fig.

7, the frequency components of the resonant frequency output nodes (LO +, LO-) have the highest magnitude at 3.2 GHz, which is the resonant frequency band, while the frequency components of the output stages (IF +, IF-) The harmonic components of the high frequency as well as the resonant frequency band LO freq are weakened.

8 is a diagram showing waveforms for a radio frequency input signal RF Input and an intermediate frequency signal IF Output.

As shown in FIG. 8, the single double balanced radio frequency receiving circuit 20 according to the embodiment of the present invention can confirm that a clean output signal is extracted without components leaked at the resonance frequency.

9 is a diagram illustrating the conversion gain of a single dual balanced radio frequency receiver circuit 20 in accordance with an embodiment of the present invention.

9, a single double balanced radio frequency receiving circuit 20 according to an embodiment of the present invention includes a dual-balanced radio frequency receiving circuit 20 having a conversion gain of 23dB to 51dB linearly when the conversion gain control signal Vvga decreases from 0.7V to 0.4V. It can be ascertained increasingly.

10 is a diagram illustrating phase noise characteristics of a single dual balanced radio frequency receiving circuit 20 according to an embodiment of the present invention.

10, a single dual balanced radio frequency receiving circuit 20 according to an embodiment of the present invention has -67.7dBc / Hz at 10kHz, -91.1dBc / Hz at 100kHz, and -111.8dBc / Hz at 1MHz. The phase noise characteristic is improved by confirming the phase noise characteristic.

11 is a diagram illustrating the overall noise figure of a single dual balanced radio frequency receiving circuit 20 according to an embodiment of the present invention.

11, a single double balanced radio frequency receiving circuit 20 according to an embodiment of the present invention has a double-sideband noise figure of both sides of 6.3 dB at a 1 MHz offset frequency, And the characteristics of the noise are improved.

The features, structures, effects and the like described in the foregoing embodiments are included in at least one embodiment of the present invention and are not necessarily limited to one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified in other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be construed as limiting the scope of the present invention. It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments may be modified and implemented. It is to be understood that the present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics thereof.

10: Single radio frequency receiving circuit
110: amplifier
120: Voltage controlled oscillator
20: Single dual balanced radio frequency receiver circuit
21, 22: single balanced radio frequency receiving circuit
210: Amplifier
220: Voltage Controlled Oscillator
221: first oscillation circuit
222: series LC resonator
230: Low-pass filter
240: Conversion gain control section
241: Second oscillation circuit
242: current source
250: Output resistance part

Claims (6)

The output terminals of the first and second single balanced radio frequency receiving circuits are connected in parallel,
The single balanced radio frequency receiver circuit (single-balanced LMV)
An amplifier receiving a signal of a radio frequency band;
A voltage controlled oscillator connected to the amplifier for generating a resonant frequency using a series LC resonator, receiving a signal of a radio frequency band amplified by the amplifier, and mixing the received signal with a resonant frequency;
A low-pass filter for passing a low-frequency band of a signal mixed with the resonance frequency;
A conversion gain controller for adjusting a conversion gain of the voltage controlled oscillator according to a conversion gain control signal; And
And an output resistor section for preventing the output terminal and the power supply terminal from being short-circuited.
The method according to claim 1,
Wherein the conversion gain control unit comprises:
An oscillation circuit in which gates and drains of two or more transistors cross each other; And
And a current source for adjusting an amount of current supplied to the oscillation circuit in accordance with the conversion gain control signal.
The method according to claim 1,
Wherein the low-pass filter is an RC low-pass filter,
Wherein the first and second single balanced radio frequency receive circuits share capacitors of the RC low pass filter.
The method according to claim 1,
Wherein the first and second single balanced radio frequency inputs share an inductor of the series LC resonator.
The method according to claim 1,
Wherein the series LC resonator further comprises a variable capacitor connected in parallel with the inductor.
The method according to claim 1,
Wherein the amplifier includes a low noise amplifier including an inductor coupled to a gate and a source.
KR1020150162787A 2015-11-19 2015-11-19 A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV KR101763485B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020150162787A KR101763485B1 (en) 2015-11-19 2015-11-19 A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020150162787A KR101763485B1 (en) 2015-11-19 2015-11-19 A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV

Publications (2)

Publication Number Publication Date
KR20170058761A KR20170058761A (en) 2017-05-29
KR101763485B1 true KR101763485B1 (en) 2017-08-01

Family

ID=59053630

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020150162787A KR101763485B1 (en) 2015-11-19 2015-11-19 A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV

Country Status (1)

Country Link
KR (1) KR101763485B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI762292B (en) * 2020-08-21 2022-04-21 群邁通訊股份有限公司 User equipment and communication method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101481467B1 (en) * 2013-12-17 2015-01-16 한국교통대학교산학협력단 Low phase noise CMOS voltage-controlled oscillator with series LC resonator
KR101562212B1 (en) 2014-10-06 2015-10-21 한국교통대학교산학협력단 Differential colpitts voltage controled oscillator with a linearized tuning range

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101481467B1 (en) * 2013-12-17 2015-01-16 한국교통대학교산학협력단 Low phase noise CMOS voltage-controlled oscillator with series LC resonator
KR101562212B1 (en) 2014-10-06 2015-10-21 한국교통대학교산학협력단 Differential colpitts voltage controled oscillator with a linearized tuning range

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Nam-Jin Oh. Single-Stage, Single-Ended Input Double-Balanced LMV in 65 nm CMOS. 대한전자공학회, ITC-CSCC, 2015.6, 673-674 (2 pages)*

Also Published As

Publication number Publication date
KR20170058761A (en) 2017-05-29

Similar Documents

Publication Publication Date Title
US7239209B2 (en) Serially RC coupled quadrature oscillator
US11646697B2 (en) Resonator circuit
US7463106B2 (en) Push-push voltage controlled oscillator for obtaining differential signals
US9531323B1 (en) Low-power balanced crystal oscillator
US6680657B2 (en) Cross-coupled voltage controlled oscillator with improved phase noise performance
US20120249250A1 (en) Quadrature Voltage Controlled Oscillator
US10505525B2 (en) Series-resonance oscillator
US20100164595A1 (en) Down-converter mixer
US20120319787A1 (en) Voltage controlled oscillator having a resonator circuit with a phase noise filter
KR101763485B1 (en) A Low-Power Single-Stage RF Receiver Fron-end : Variable Gain-Controlled Double-balanced LMV
US7616937B2 (en) Subharmonic mixer capable of reducing noise and enhancing gain and linearlty
CN101106354A (en) Ultra wide band signal generator
KR101703452B1 (en) A single-stage double-balanced LMV
US9106179B2 (en) Voltage-controlled oscillators and related systems
US20030228849A1 (en) Dual frequency voltage controlled oscillator circuit
US8219054B2 (en) Oscillating circuit and radio communication apparatus
US8543078B2 (en) Harmonic mixer circuit
US11641190B2 (en) Ring oscillator with resonance circuits
Zheng et al. Design and analysis of a current-reuse transmitter for ultra-low power applications
US8195111B2 (en) Harmonic generation of a fundamental frequency system and method
JP4495532B2 (en) Frequency converter and RF receiver using the same
Venkatesh et al. Active Inductance based Relaxation Oscillator for 2.41 GHz ISM Receivers
KR20230129752A (en) A Differential Voltage-controlled Oscillator as a Single-balanced Mixer
WO2002023714A1 (en) Resistive mixer
KR20140048623A (en) Frequency mixer

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant