KR101754786B1 - flat display device and method of driving the same - Google Patents

Abstract

The present invention provides a display device comprising: a display panel; A plurality of source driver ICs for generating data voltages corresponding to image data using a plurality of gamma voltages and transmitting the generated data voltages to the display panel; And a timing controller for transmitting the image data to the plurality of source driver ICs, wherein each of the plurality of source driver ICs generates a gamma voltage of the plurality of gamma voltages, To the rest of the source driving ICs of the flat panel display.

Description

[0001] The present invention relates to a flat display device and a method of driving the same,

The present invention relates to a flat panel display, and more particularly, to a flat panel display and a driving method thereof.

2. Description of the Related Art [0002] With the development of an information society, demands for a display device for displaying images have been increasing in various forms. Recently, a liquid crystal display (LCD), a plasma display panel (PDP) Various flat display devices such as an organic light emitting diode (OLED) have been utilized.

These flat panel display devices generate and use a gamma voltage to convert digital image data into analog image data.

A conventional integrated circuit (IC) such as a programmable gamma integrated chip (IC) is further configured to generate a gamma voltage.

As described above, since a separate integrated circuit is formed to generate the gamma voltage, there is a problem that parts and production cost are increased.

There is a problem in providing a flat panel display device and a driving method thereof that generate a gamma voltage in the source driving IC S_IC to eliminate a separate integrated circuit for generating a gamma voltage to reduce parts and production costs.

According to an aspect of the present invention, there is provided a display device comprising: a display panel; A plurality of source driver ICs for generating data voltages corresponding to image data using a plurality of gamma voltages and transmitting the generated data voltages to the display panel; And a timing controller for transmitting the image data to the plurality of source driver ICs, wherein each of the plurality of source driver ICs generates a gamma voltage of the plurality of gamma voltages, To the rest of the source driving ICs of the flat panel display.

The gamma voltage supply unit generates the plurality of gamma voltages by combining the generated gamma voltages.

The gamma voltage supply unit performs I2C communication with the timing control unit.

A method of driving a flat panel display device including a plurality of source driver ICs for generating a data voltage corresponding to image data using a plurality of gamma voltages and a timing controller for transmitting the image data, Generating a partial gamma voltage of the plurality of gamma voltages, and transmitting the generated partial gamma voltage to the other source driving ICs; And generating the plurality of gamma voltages by combining the generated gamma voltage and the gamma voltage received from the other source driver IC.

Each of the plurality of source driver ICs includes a gamma voltage supplier for generating the gamma voltage and receiving the gamma voltage generated by the other source driver IC.

The gamma voltage supply unit and the timing control unit perform I 2 C communication.

A signal controller receiving image data; A DAC unit for generating a data voltage corresponding to the image data using a plurality of gamma voltages; And a gamma voltage supplier for generating the plurality of gamma voltages and transmitting the gamma voltages to the DAC unit, wherein the gamma voltage supplier generates a gamma voltage of the plurality of gamma voltages, And provides the source driving IC receiving the remainder.

The gamma voltage supply unit generates the plurality of gamma voltages by combining the generated gamma voltage and the remainder of the plurality of gamma voltages except for the gamma voltage.

The gamma voltage supply unit performs I 2 C communication with the timing control unit.

A gamma voltage is generated in the source driver IC, so that a separate integrated circuit for generating the gamma voltage is not required. This provides an effect of reducing the number of parts of the flat panel display device.

Further, it provides an effect of increasing the productivity of the flat panel display device and reducing the production cost.

1 is a schematic cross-sectional view illustrating a flat panel display device according to an embodiment of the present invention.
2 is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.
3 is a schematic cross-sectional view of a timing control section and a source driving IC according to an embodiment of the present invention.
4 is a graph showing an example of a gamma voltage curve;
5 is a schematic cross-sectional view illustrating an example of a timing control unit and a gamma voltage supply unit according to an embodiment of the present invention;
6 is a schematic cross-sectional view of a source driver IC according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic view of a flat panel display according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

First, for convenience of explanation, a liquid crystal display device 100 among the flat panel display devices will be described as an example.

As shown in the figure, the liquid crystal display 100 according to the embodiment of the present invention includes a display panel 200 and a driving circuit portion D.

In the display panel 200, a plurality of gate lines GL extend in the row direction in the first direction, for example. A plurality of data lines DL extend in a second direction that crosses the first direction, for example, in the column direction. The plurality of gate lines GL and the plurality of data lines DL intersecting each other define a plurality of pixels P arranged in a matrix form.

Referring to FIG. 2, each pixel P includes a thin film transistor T, a liquid crystal capacitor Clc, and a storage capacitor Cst.

The thin film transistor T is formed at the intersection of the gate line GL and the data line DL. The thin film transistor T is connected to the pixel electrode. On the other hand, a common electrode is formed corresponding to the pixel electrode. When a data voltage is applied to the pixel electrode and a common voltage is applied to the common electrode, an electric field is formed therebetween to drive the liquid crystal. The pixel electrode, the common electrode, and the liquid crystal located between these electrodes constitute a liquid crystal capacitor Clc. Each pixel P further includes a storage capacitor Cst, which serves to store the data voltage applied to the pixel electrode until the next frame.

Each pixel P may be composed of R, G, and B subpixels displaying red, green, and blue, for example. That is, the neighboring R, G, and B sub-pixels constitute a pixel that is a unit of image display.

Referring back to FIG. 1, the backlight 800 functions to supply light to the display panel 200. As the backlight 800, a cold cathode fluorescent lamp (CCFL), an external electrode fluorescent lamp (EEFL), a light emitting diode (LED), or the like can be used.

The driving circuit portion D includes a timing control portion 300, a gate driving portion 400, a data driving portion 500 including a plurality of source driving ICs (S_IC), a power source generating portion 700).

Here, the timing controller 300 receives image data Data, a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a clock signal CLK, and a data enable signal from an external system such as a TV system or a video card And a control signal TCS such as a control signal DE. Although not shown, these signals may be input through the interface configured in the timing controller 300. [

The timing control unit 300 uses the input control signal TCS to control the gate control signal GCS for controlling the gate driving unit 400 and the data control signal DCS for controlling the data driving unit 500 .

The gate control signal GCS includes a gate start pulse GSP, a gate shift clock GSC and a gate output enable signal GOE.

The data control signal DCS includes a source start pulse (SSP), a source sampling clock (SSC), a source output enable (SOE) signal, a polarity signal (POL) . ≪ / RTI >

The gate shift clock GSP serves to notify the start line of the screen in one vertical period and the gate shift clock GSC is a signal to be supplied to the thin film formed on the pixel P of the display panel 200 And specifies the time at which the transistor (T in FIG. 2) is turned on. In addition, the gate output enable signal GOE serves to control the output of the gate driver 400.

The source start pulse SSP informs the start point of the data, that is, the first pixel P in one horizontal period, and the source sampling clock SSC has a function of outputting data based on rising and falling edges. It latches. The polarity signal POL controls the data voltage of the display panel 200 to be a positive polarity or a negative polarity, ) It is a signal that tells the polarity to drive with polarity.

In addition, the timing controller 300 receives the image data (Data) from an external system, aligns the image data, and transmits the image data to the data driver 500.

In addition, the timing control unit 300 allows each of the plurality of source driver ICs S_IC of the data driver 500 to generate a part of the plurality of gamma voltages through the I2C communication, and controls the respective source driver ICs S_IC The generated gamma voltages are combined and controlled so that they can be used at the time of data voltage generation.

More specifically, the timing controller 300 transmits serial data (SDA) and serial clock (SCL) to a plurality of source driver ICs (S_IC) using I2C communication, The function of the driving IC S_IC can be tuned.

Here, I2C communication is one of the serial interface protocols, and is mainly used for communication between an integrated circuit (IC) and an integrated circuit.

In I2C communication, devices such as an integrated circuit are connected by two wirings, and serial data (SDA) and serial clock (SCL) are respectively transmitted through two wirings.

The serial data SDA is serial data and is 0 or 1 digital data having 8 bits as one byte. The serial clock SCL is rising and falling, 1 < / RTI > bits.

Using I2C communication, one device can fetch data (read: read) from another device, and write data to another device (write: write).

For example, the timing controller 300 and the plurality of source driver ICs S_IC can be connected to two I2C wires and controlled using I2C communication.

A device that generates a serial clock SCL is called a master device and a device that receives a serial clock SCL is called a slave device. A slave device has a unique address, (One frame), which is the leading one.

Such a master device and a slave device can be connected in a daisy chain format in which two wires are connected in parallel to each device.

That is, when the master device transmits the serial data (SDA) and the serial clock (SCL), the slave device counts the serial clock (SCL) Thus, the master device can grasp the data of the slave device or write data to the slave device.

In the embodiment of the present invention, the timing controller 300 may be a master device, and a plurality of source driver ICs S_IC may be slave devices.

The gate driver 400 sequentially scans a plurality of gate lines GL in response to a gate control signal GCS supplied from the timing controller 300. For example, a plurality of gate lines GL are sequentially selected for every frame, and a gate voltage is output to the selected gate line GL. By the gate voltage, the thin film transistor T located on the corresponding row line is turned on. On the other hand, a turn-off voltage is supplied to the gate line GL until the scan of the next frame, and the thin film transistor T maintains the turn-off state.

The power generating unit 700 generates various driving voltages necessary for driving the liquid crystal display device 100. For example, a power supply voltage supplied to the timing controller 300, the data driver 500 and the gate driver 400, a gate high voltage and a gate low voltage supplied to the gate driver 400, and the like.

Each of the plurality of source driver ICs S_IC of the data driver 500 generates a part of a plurality of gamma voltages and transmits them to the other source driver IC S_IC. Further, the data voltage is generated by using the generated gamma voltage and the gamma voltage transmitted from another source driving IC S_IC.

The plurality of source driver ICs S_IC supply the data voltages to the plurality of data lines DL in response to the data control signal DCS and the video data Data supplied from the timing controller 300 . That is, the data voltage corresponding to the image data Data is generated using the gamma voltage, and the generated data voltage is output to the data line DL corresponding to each source driving IC S_IC.

Hereinafter, with reference to FIG. 3, a plurality of source driver ICs S_IC according to an embodiment of the present invention will be described in more detail.

3 is a schematic diagram illustrating a timing controller 300 and a plurality of source driver ICs S_IC according to an embodiment of the present invention.

First, as shown in FIG. 3, each of the plurality of source driver ICs S_IC may include a gamma voltage supplier 600.

Each of the plurality of gamma voltage supply units 600 generates a part of a plurality of gamma voltages through the I 2 C communication with the timing control unit 300 and transfers the same to another gamma voltage supply unit 600.

In addition, the gamma voltage supplier 600 combines the generated gamma voltage and the gamma voltage received from the different gamma voltage supplier 600 so that the generated gamma voltage can be used at the time of generating the data voltage.

That is, each of the plurality of gamma voltage supplies 600 generates a plurality of gamma voltages, and a plurality of gamma voltages generated in each of the plurality of gamma voltage supplies 600 are combined to form a plurality of gamma voltages.

The gamma voltage generated by the gamma voltage supplier 600 and transmitted to the other gamma voltage supplier 600 is referred to as an output gamma voltage GMA_O and the gamma voltage supplied from the other gamma voltage supplier 600 The voltage is referred to as an input gamma voltage GMA_I.

Here, the gamma voltage Vgamma is a voltage supplied to the pixel electrode of the liquid crystal display device 100 and applied to the liquid crystal layer. The transmittance of the liquid crystal display device 100 changes according to the gamma voltage Vgamma, do.

The gamma is a slope indicating the input / output relationship of the converter. In the liquid crystal display device 100, the relationship between the digital image data (Data) and the transmittance by the analog image data is shown. It is known that an optimal viewing angle and luminance characteristic can be obtained from the gamma of the pixel.

The gamma voltage Vgamma may be represented by a gamma curve indicating the relationship between the digital image data Data and the analog image data, which will be described with reference to the drawings.

FIG. 4 is a graph showing a gamma curve of the normally black mode liquid crystal display device 100, and shows a change in the gamma voltage Vgamma with respect to digital image data (Data in FIG. 1).

As shown in FIG. 4, when the digital image data Data is represented by, for example, 8 bits expressed by a hexadecimal code (HEX), the gamma voltage Vgamma ) Can be divided into 256 gradations.

That is, the plurality of source driver ICs S_IC of the liquid crystal display 100 decode the digital image data Data, select the gamma voltage Vgamma corresponding to the decoded information, and supply the gamma voltage Vgamma to the pixel electrodes An image of 256 gradations can be displayed.

Generally, the gamma voltage Vgamma has a value between a high potential power supply voltage VDD and a low potential power supply voltage VSS, and some of them correspond to a plurality of gamma reference voltages.

At this time, the positive gamma voltages GMA1 to GMA9 have values between a high potential power supply voltage VDD and a half half voltage (VDD / 2) of the high potential power supply voltage VDD, The voltages GMA10 to GMA18 have values between the half half voltage (VDD / 2) of the high potential supply voltage (VDD) and the low potential supply voltage (VSS). Here, the low-potential power supply voltage VSS may be grounded to 0 V, for example.

This gamma voltage Vgamma is generated, for example, by dividing the power supply voltage VDD and the base voltage VSS into a plurality of resistors connected in series.

Hereinafter, with reference to FIG. 5, the gamma voltage supplier 600 will be described in more detail.

5 is a schematic diagram illustrating a plurality of gamma voltage supply units 600 to 630 of the data driver 500. The plurality of gamma voltages are applied to the first to sixth gamma voltages GMA1 to GMA6, As an example.

First, as described above, each of the first to third gamma voltage supplies 610 to 630 generates a part of the first to sixth gamma voltages GMA1 to GMA6 and transmits them to another gamma voltage supplier 600 do.

Specifically, for example, the first gamma voltage supply unit 610 generates the first and second gamma voltages GMA1 and GMA2 of the first to sixth gamma voltages GMA1 to GMA6 and outputs them to the second and third Gamma voltage supply units 620 and 630, respectively. That is, the output gamma voltage GMA_O of the first gamma voltage supplier 610 becomes the first and second gamma voltages GMA1 and GMA2.

The second gamma voltage supply unit 620 generates the third and fourth gamma voltages GMA3 and GMA4 of the first to sixth gamma voltages GMA1 to GMA6 and supplies them to the first and third gamma voltage supplies 610 and 630 ). That is, the output gamma voltage GMA_O of the second gamma voltage supplier 620 becomes the third and fourth gamma voltages GMA3 and GMA4.

The third gamma voltage supply unit 630 generates the fifth and sixth gamma voltages GMA5 and GMA6 of the first to sixth gamma voltages GMA1 to GMA6 and supplies them to the first and second gamma voltage supplies 610, 620). That is, the output gamma voltage GMA_O of the third gamma voltage supplier 630 becomes the fifth and sixth gamma voltages GMA5 and GMA6.

Accordingly, the first gamma voltage supplier 610 receives the third to sixth gamma voltages GMA3 to GMA6 as the input gamma voltage GMA_I, and the second gamma voltage supplier 620 receives the first gamma voltage GMA1 The second gamma voltage GMA2, the fifth gamma voltage GMA5 and the sixth gamma voltage GMA6 as the input gamma voltage GMA_I, and the third gamma voltage supplier 630 receives the first through fourth And receives the gamma voltages GMA1 to GMA4 as the input gamma voltage GMA_I.

As described above, the timing controller 300 controls the first to third gamma voltage supply units 610 to 630 through the I2C communication so that each of the first to third gamma voltage supply units 610 to 630 performs gamma And generates some gamma voltages of voltages GMA1 to GMA6. It can be transmitted to the other gamma voltage supplying units 610 to 630.

Although not shown, the first to third gamma voltage supplies 610 to 630 include a control interface, a channel register, a voltage source, and an output buffer to generate a gamma voltage can do.

The first to third gamma voltage supplying units 610 to 630 may further include wiring corresponding to each data to transmit the output gamma voltage GMA_O and the input gamma voltage GMA_I to each other have. In addition, the output gamma voltage GMA_O and the input gamma voltage GMA_I can be transmitted to each other according to a control signal through one wiring. In this case, the first to third gamma voltage supplying units 610 to 630 supply the storage medium . In this case, an EEPROM may be used as a storage medium.

Hereinafter, the source driver IC S_IC according to the embodiment of the present invention will be described in more detail with reference to FIG.

6 is a schematic diagram of a source driver IC S_IC according to an embodiment of the present invention.

6, the source driver IC S_IC includes a signal control unit 510, a shift register 520, a latch unit 530, a DAC unit 540, an output buffer unit 550, And a gamma voltage supplier 600.

The signal control unit 510 controls the data control signal DCS and the image data Data received from the timing control unit 300 to be output as corresponding elements.

More specifically, the source start pulse SSP and the source sampling clock SSC are output to the shift register 520 and the source output enable signal SOE and the video data Data are output to the latch unit 530 do.

The shift register 520 generates the sampling signal SAM in response to the source start pulse SSP and the source sampling clock SSC. Specifically, the shift register 520 generates the sampling signal SAM by shifting the source start pulse SSP according to the source sampling clock SSC, and sequentially supplies the sampled signal SAM to the latch unit 530.

The latch unit 530 sequentially samples the video data Data in accordance with the sampling signal SAM supplied from the shift register 520. The DAC unit 540 stores the sampled data and simultaneously outputs the latched digital image data RData in response to the source output enable signal SOE.

The DAC unit 540 receives the gamma voltage Vgamma from the gamma voltage supply unit 600 and selects the gamma voltage corresponding to the input digital image data RData and outputs it as the analog image data AData .

The output buffer unit 550 receives the analog image data AData to prevent the analog image data AData input from the DAC unit 540 from being distorted in accordance with the resistance value of the data line DL ), And supplies the amplified data to the data line (DL in Fig. 1) as the data voltage Vdata. That is, the input data voltage is buffered and output to the data line DL.

The gamma voltage supply unit 600 generates a part of a plurality of gamma voltages through the I 2 C communication with the timing control unit 300 as described above.

In addition, the gamma voltage generated in the gamma voltage supplier 600 included in the other source driver IC S_IC is received, and the generated gamma voltage is combined with the received gamma voltage to generate a plurality of gamma voltages Vgamma ).

As described above, in the embodiment of the present invention, each of the plurality of source driver ICs S_IC may include a gamma voltage supplier 600 that generates some of the plurality of gamma voltages Vgamma.

Accordingly, it is possible to eliminate components such as the programmable gamma IC used for generating the gamma voltage from the outside, which reduces the production cost and increases the efficiency of the manufacturing process.

The embodiment of the present invention described above is an example of the present invention, and variations are possible within the spirit of the present invention. Accordingly, the invention includes modifications of the invention within the scope of the appended claims and equivalents thereof.

100: Flat panel display device 200: Display panel
S_IC: Source driving IC 600: Gamma voltage supply
GMA_I: Input gamma voltage GMA_O: Output gamma voltage

Claims (9)

A display panel;
A plurality of source driver ICs for generating a data voltage corresponding to the image data using a plurality of gamma voltages corresponding to each of a plurality of gradations of image data and transmitting the generated data voltage to the display panel;
And a timing controller for transmitting the image data to the plurality of source driver ICs,
Each of the plurality of source driving ICs generates a gamma voltage of the plurality of gamma voltages and transmits the generated gamma voltage to the other source driving ICs
Flat panel display.
The method according to claim 1,
Wherein each of the plurality of source driving ICs includes a gamma voltage supply unit for generating the plurality of gamma voltages by combining the generated gamma voltages
Flat panel display.
3. The method of claim 2,
Wherein the gamma voltage supply unit is configured to perform I2C communication with the timing control unit
Flat panel display.
A plurality of source driver ICs for generating a data voltage corresponding to the image data using a plurality of gamma voltages corresponding to each of a plurality of gradations of image data, and a timing controller for transmitting the image data, In the method,
Wherein each of the plurality of source driver ICs generates a gamma voltage of the plurality of gamma voltages and transmits the generated gamma voltage to the other source driver ICs;
And generating the plurality of gamma voltages by combining the generated gamma voltage with the gamma voltage received from the other source driver IC
A method of driving a flat panel display device.
5. The method of claim 4,
Wherein each of the plurality of source driver ICs includes a gamma voltage supplier for generating the gamma voltage and receiving the gamma voltage generated by the other source driver IC
A method of driving a flat panel display device.
6. The method of claim 5,
The gamma voltage supply unit and the timing control unit perform I 2 C communication
A method of driving a flat panel display device.
A signal controller receiving image data;
A DAC unit for generating a data voltage corresponding to the image data using a plurality of gamma voltages corresponding to each of a plurality of gradations of the image data;
And a gamma voltage supplier for generating the plurality of gamma voltages and transmitting the generated gamma voltages to the DAC unit,
The gamma voltage supply unit generates a gamma voltage of the plurality of gamma voltages, and receives the remaining gamma voltages excluding the gamma voltage
Source driving IC.
8. The method of claim 7,
The gamma voltage supply unit generates the plurality of gamma voltages by combining the generated gamma voltage and the remainder of the plurality of received gamma voltages, excluding the gamma voltage
Source driving IC.
8. The method of claim 7,
The gamma voltage supply unit may perform the I 2 C communication with the timing control unit
Source driving IC.

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