KR101746842B1 - Light emitting device, method for fabricating the same and light emitting device package - Google Patents

Abstract

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, and a light emitting device package.
A light emitting device according to an embodiment includes a first conductive semiconductor layer, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer; A dielectric layer formed in the cavity inside the light emitting structure and in contact with the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer; A second electrode layer below the dielectric layer; And a first electrode on the dielectric layer.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a light emitting device, a method of manufacturing the same,

Embodiments relate to a light emitting device, a method of manufacturing a light emitting device, and a light emitting device package.

A light emitting device (LED) can be produced by combining p-n junction diodes having the characteristic that electrical energy is converted into light energy by elements of Group III and Group V on the periodic table. LEDs can be implemented in various colors by controlling the composition ratio of compound semiconductors.

Meanwhile, according to the related art, a current flows in a reverse direction at the time of electrostatic discharge (ESD), causing damage to the active layer, which is a light emitting region. To solve this problem, a zener diode There is a problem that absorption of a light amount occurs when mounting.

In addition, according to the related art, light emitted below the n-type electrode has a problem that luminous efficiency is reduced due to reflection of the n-type electrode. In addition, according to the related art, there is a problem that heat is generated by reabsorption of light reflected by the n-type electrode.

Further, according to the related art, there is a problem that the lifetime and the reliability due to the current crowding are lowered.

Embodiments provide a light emitting device, a method of manufacturing a light emitting device, and a light emitting device package that can prevent damage due to electrostatic discharge without loss of light quantity absorption.

Also, embodiments of the present invention provide a light emitting device, a method of manufacturing the light emitting device, and a light emitting device package that can improve the current spreading efficiency as well as light extraction efficiency.

A light emitting device according to an embodiment includes a first conductive semiconductor layer, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer; A dielectric layer formed in the cavity inside the light emitting structure and in contact with the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer; A second electrode layer below the dielectric layer; And a first electrode on the dielectric layer.
The embodiment may include a third electrode disposed on the upper surface of the first conductive semiconductor layer. The first electrode may be physically separated from or electrically connected to the third electrode. For example, the first electrode contacting the upper surface of the dielectric layer may be physically separated from and electrically connected to the third electrode.
The dielectric layer formed in the cavity may include a first dielectric layer formed on the cavity from which the light emitting structure is partially removed and a second dielectric layer formed on the exposed first dielectric layer after the light emitting structure is removed from the first dielectric layer . The first electrode may be in contact with the upper surface of the second dielectric layer.

A method of manufacturing a light emitting device according to an embodiment of the present invention includes forming a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; Forming a cavity by partially removing the light emitting structure; Forming a dielectric layer on the cavity; Forming a second electrode layer below the dielectric layer; And forming a first electrode on the dielectric layer.

In addition, the light emitting device package according to the embodiment may include a light emitting structure including a first conductive semiconductor layer, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer, A light emitting element formed in the cavity, the light emitting element including a dielectric layer in contact with the first conductive type conductor layer, the active layer, and the second conductive type semiconductor layer, a second electrode layer below the dielectric layer, and a first electrode on the dielectric layer; And a package body in which the light emitting device is disposed.

According to the light emitting device, the method of manufacturing the light emitting device, and the light emitting device package according to the embodiment, electrostatic discharge (ESD) of the LED can be prevented without loss of light quantity absorption.

In addition, according to the embodiment, a capacitor is formed in an LED chip to prevent static electricity damage, thereby simplifying the package cost and process, and minimizing the absorption of the light amount.

In addition, according to the embodiment, it is possible to increase light extraction efficiency with efficient current flow control.

In addition, according to the embodiment, current spreading can improve the reliability of the light emitting device.

1 is a sectional view of a light emitting device according to a first embodiment;
FIG. 2 and FIG. 3 are conceptual diagrams of electric field formation at the time of electrostatic discharge of the light emitting device according to the related art. FIG.
4 is a conceptual diagram of electric field formation at the time of electrostatic discharge of the light emitting device according to the embodiment.
5 is a circuit example of a light emitting device according to an embodiment.
Fig. 6 is a waveform diagram of a light emitting device according to an embodiment during electrostatic discharge; Fig.
7 to 12 are process sectional views of a method of manufacturing a light emitting device according to the first embodiment.
13 is a sectional view of a light emitting device according to the second embodiment.
14 is a sectional view of a light emitting device package according to an embodiment.

In describing embodiments according to the present invention, it is to be understood that each layer (film), area, pattern or structure may be referred to as being "on / over" or "under" quot; on " and "under" are to be understood as being "directly" or "indirectly & . In addition, the criteria for above or below each layer will be described with reference to the drawings.

(Example)

1 is a cross-sectional view of a light emitting device according to a first embodiment.

The light emitting device 100 according to the embodiment includes the light emitting structure 110 including the first conductive semiconductor layer 112, the active layer 114 and the second conductive semiconductor layer 116, A first electrode 142 formed on the dielectric layer 132 and a second electrode layer 120 formed below the dielectric layer 132 and on the dielectric layer 132. [

In an embodiment, the second electrode layer 120, the dielectric layer 132, and the first electrode 142 may function as metal insulator metal (MIM) capacitors.

The dielectric layer 132 may include a first dielectric layer 132a formed on the cavity and a second dielectric layer 132b formed on the first dielectric layer 132a.

The second electrode layer 120 may include a reflective layer 122 formed under the dielectric layer 132 and a conductive layer 124 formed under the reflective layer 122.

The first dielectric layer 132a may also be formed between the second electrode layer 120 and the light emitting structure 110 to increase capacity.

The reflective layer 122 may be formed on at least a part of the cavity, but is not limited thereto.

The first electrode 142 and a part of the cavity may be spatially overlapped, but the present invention is not limited thereto. The light emitted from the lower side of the first electrode 142 can be minimized when the first electrode 142 and the cavity are spatially overlapped with each other, Can be minimized.

The first electrode 142 may be formed in contact with the dielectric layer 132, but the present invention is not limited thereto.

The cavity may be formed by removing a part of the lower side of the light emitting structure 110, but the present invention is not limited thereto.

The cavity may be a cavity in which the first conductivity type semiconductor layer 112 is partially removed from the second conductivity type semiconductor layer 116 until a portion of the first conductivity type semiconductor layer 112 is removed have.

An embodiment is a method for protecting the electrostatic discharge (ESD) of an LED. A dielectric layer is formed in a local area in an LED chip, and a metal is deposited thereon to form a capacitor with a light emitting diode in parallel Can be configured. In this case, current flows to the active region at the positive voltage to generate light. However, since the energy of the high-frequency component passes through the dielectric layer in the pulse-type ESD shock caused by discharging, the active layer can be protected.

Accordingly, according to the light emitting device according to the embodiment, electrostatic discharge (ESD) of the LED can be prevented without loss of light quantity absorption.

According to the embodiment, when the voltage is a constant voltage, a current flows to the active layer to cause light emission by recombination of carriers. However, when ESD impact occurs, the energy of the high frequency component passes through the path of the capacitor, .

In addition, according to the embodiment, a capacitor is formed in an LED chip to prevent static electricity damage, thereby simplifying the package cost and process, and minimizing the absorption of the light amount.

In addition, according to the embodiment, it is possible to increase light extraction efficiency with efficient current flow control.

In addition, according to the embodiment, current spreading can improve the reliability of the light emitting device.

FIG. 2 and FIG. 3 are conceptual diagrams of electric field formation at the time of electrostatic discharge of the light emitting device according to the prior art, and FIG. 4 is a conceptual diagram of electric field formation at the time of electrostatic discharge of the light emitting device according to the embodiment.

Generally, LED breakdown due to electrostatic discharge occurs during semiconductor reverse voltage. 2 and 3, a strong electric field is induced in the LED active region by the charge charged at the time of the reverse voltage.

Then, as shown in FIG. 3, the carriers (electrons, holes) are accelerated to collide with atoms to produce another carriers, and the generated carriers generate numerous carriers. This phenomenon is called avalanche breakdown. If a strong periodic field is induced by the charged charge and further static electricity that the semiconductor can withstand is applied, the electric field breakdown eventually results in the LED semiconductor breakdown.

Therefore, in the embodiment, as shown in FIG. 4, the embodiment can improve the immunity to electrostatic discharge by inserting a capacitor structure of MIM type to induce an electric field inside the LED active layer to some MIM capacitors to relax the electric field of the active region .

That is, according to the related art, a strong electric field (Q ₀ ) due to the charged electric charge is all led to the LED active region, and LED breakdown occurs due to the electric field surplus. On the other hand, according to the embodiment, a portion (Q ₂ ) of the electric field Q ₀ due to the charged charges can be induced to the region of the dielectric layer 132 to reduce the electric field intensity Q ₁ in the LED active region.

5 is a circuit diagram of a light emitting device according to an embodiment.

In an embodiment, the second electrode layer 120, the dielectric layer 132, and the first electrode 142 may function as a capacitor C _D.

As shown in FIG. 5, the circuit diagram of the light emitting device according to the embodiment is possible. When the voltage is Forward according to the constant voltage, the current flows through the LED to emit light. When the voltage is reverse according to the electrostatic discharge, And flows through the MIM capacitor C _D.

In this case, when the voltage is reverse according to the electrostatic discharge, the larger the total capacitance (C _tot ), the less the current flowing to the active layer due to the ESD stress becomes, and the shock can be mitigated.

The formula is described below.

Q _Dis = C _ESD V _ESD (Q _Dis is the amount of charge at discharging, C _ESD is the capacitance at discharging)

C ' _Tot = C _Diode + C _D (with MIM Capacitor)

C _Tot = C _Diode (without MIM Capacitor)

I = dQ / dt = Q / τ = Q _Dis / (RC _Tot ) ∴C _Tot ↑ -> I ↓

Q _Dis / (RC ' _Tot ) <I = Q _Dis / (RC _Tot ), C' _Tot > C _Tot

That is, as the total capacitance ( _Ctot ) increases when the voltage is reverse due to the electrostatic discharge, the current (I) flowing to the active layer due to the ESD stress becomes smaller and the impact can be mitigated.

Fig. 6 is a waveform diagram of the light emitting device according to the embodiment at the time of electrostatic discharge.

As shown in FIG. 6, when the Fourier transform is performed on the pulse waveform, a high frequency component is obtained. As the rising time (t _r ) increases, the magnitude of the high frequency component increases.

As the frequency increases, the impedance due to the capacitance becomes smaller as shown in the following equation. Accordingly, when the voltage is reverse due to the electrostatic discharge, the high frequency current can flow to the MIM capacitor as the impedance of the MIM capacitor becomes small.

Impedance: Z = Z _R + jZ _Im (Z _{R Im} Impedance due to Capacitor, Real Impedance, j Impedance Factor, Z _Im Impedance due to Capacitor)

Capacitor: Z _{Im , C} = 1 / (jωC) (where ω = 2πf)

That is, when the voltage is reverse due to the electrostatic discharge, the high frequency current can flow to the MIM capacitor as the impedance of the MIM capacitor becomes small.

According to the embodiment, since the cavity region below the first electrode 142 does not have the active layer 114, light generation due to coupling of carriers (electrons and holes) may not occur.

In addition, the embodiment may etch the light emitting structure starting from the second conductive type semiconductor layer 116 and etching the first conductive type semiconductor layer 112 through the active layer 114. Accordingly, since the dielectric layer 132 is formed on the cavity, the current is not smoothly supplied to the region where the cavity is formed, so that light emission does not occur in the cavity, and thus the first electrode 142 can be minimized.

According to an embodiment, a dielectric layer is formed in a local region in an LED chip and an electrode is formed thereon to include a capacitor together with an LED diode. In this case, since the energy of the high-frequency component passes through the dielectric layer of the capacitor in the pulse-type ESD shock caused by discharging, the light emitting layer can be protected have.

In addition, according to the embodiment, the first electrode 142 may serve as a pad electrode, but the present invention is not limited thereto. Accordingly, it is possible to prevent the current from being concentrated under the pad electrode and smooth the current flow around the pad electrode, thereby improving the reliability of the light emitting device by current spreading.

Hereinafter, a method of manufacturing a light emitting device according to an embodiment will be described with reference to FIGS. The light emitting device in the embodiment may be formed of a III-V material such as GaN, GaAs, GaAsP, or GaP, but is not limited thereto.

First, the first substrate 105 is prepared as shown in FIG. The first substrate 105 may be a sapphire (Al ₂ O ₃ ) substrate, a SiC substrate, or the like, but is not limited thereto. The first substrate 105 may be wet-cleaned to remove impurities on the surface.

A light emitting structure 110 including a first conductive semiconductor layer 112, an active layer 114 and a second conductive semiconductor layer 116 is formed on the first substrate 105.

The first conductive semiconductor layer 112 may be formed by a CVD method or molecular beam epitaxy (MBE), sputtering, or vapor phase epitaxy (HVPE). . The first conductive semiconductor layer 110 may be formed by depositing a silane containing an n-type impurity such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ) Gas (SiH ₄ ) may be implanted and formed.

In this embodiment, an undoped semiconductor layer (not shown) may be formed on the first substrate 105, and a first conductive semiconductor layer 112 may be formed on the un-acted semiconductor layer . For example, an undoped GaN layer may be formed on the first substrate 105, and an n-type GaN layer may be formed to form the first conductivity type semiconductor layer 112.

Thereafter, the active layer 114 is formed on the first conductive semiconductor layer 112. Electrons injected through the first conductive type semiconductor layer 112 and holes injected through the second conductive type semiconductor layer 116 formed after the first and second conductive type semiconductor layers 116 and 116 are mutually combined to form an energy band unique to the active layer Which emits light having an energy determined by &lt; RTI ID = 0.0 &gt;

The active layer 114 may have a quantum well structure in which nitride semiconductor thin film layers having different energy bands are alternately laminated one or more times. Alternatively, it may have a quantum wire structure or a quantum dot structure.

For example, the active layer 114 is formed by injecting trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) into the InGaN / GaN, InGaN / InGaN structure May be formed, but the present invention is not limited thereto.

Thereafter, a second conductive semiconductor layer 116 is formed on the active layer 114. For example, the second conductive semiconductor layer 116 may include p-type impurities such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and magnesium (Mg) Bisei butyl cyclopentadienyl magnesium _{(EtCp 2 Mg) {Mg (} C 2 H 5 C 5 H 4) 2} is injected may be a p-type GaN layer formed, but are not limited to.

Next, a part of the second conductivity type semiconductor layer 116, the active layer 114, and the first conductivity type semiconductor layer 112 is removed to form a cavity A. Next, as shown in FIG. The cavity A may include the meaning of dents, grooves, ditches, trenches, and the like. On the other hand, the cavity in the embodiment is not limited to the cavity shape A shown in Fig.

For example, the etching may proceed from the portion of the second conductive semiconductor layer 116 vertically below the first electrode 142 to be formed until the first conductive semiconductor layer 112 is exposed . The etching for forming the cavity can be performed by dry etching or wet etching.

In addition, according to an embodiment, the cavity may be formed by etching from the second conductivity type semiconductor layer 116 to a portion of the first conductivity type semiconductor layer 112.

According to the embodiment, since the current is not supplied smoothly in the region where the cavity is formed, light emission does not occur on the upper side of the cavity, thereby minimizing the absorption of light by the first electrode 142 existing on the upper side of the cavity . Also, in the embodiment, since the cavity region below the first electrode 142 vertically has no active layer 114, light generation due to coupling of carriers (electrons and holes) may not occur.

Next, a first dielectric layer 132a is formed on the cavity as shown in FIG. For example, SiO _2, TiO _2, Al ₂ O _3, it is possible to form the first dielectric layer (132a) on the cache by using the oxide film, a nitride film such as Si ₃ N ₄ cavity.

The first dielectric layer 132a may be partially formed on the second conductivity type semiconductor layer 116 in addition to the cavity side surface and the bottom surface of the cavity so that the first dielectric layer 132a is firmly held .

Also, the first dielectric layer 132a may be formed between the light emitting structure and the second electrode layer 120 to be formed thereafter to increase the capacitance.

Then, a second electrode layer 120 is formed on the second conductive type semiconductor layer 116 and the first dielectric layer 132a.

The second electrode layer 120 may include an ohmic layer (not shown), a reflective layer 122, a bonding layer (not shown), a conductive layer 124, and the like. The second electrode layer 120 may be formed of a metal such as Ti, Cr, Ni, Al, Pt, Au, T, As shown in FIG.

For example, the second electrode layer 120 may include an ohmic layer, and may be formed by laminating a single metal, a metal alloy, a metal oxide, or the like so as to efficiently inject holes. For example, the ohmic layer may be formed of ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al- Ga ZnO), IGZO , RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, Ag, and Ni.

When the second electrode layer 120 includes the reflective layer 122, the second electrode layer 120 may include a metal layer including Al, Ag, or an alloy including Al or Ag. In addition, when the second electrode layer 120 includes a bonding layer, the reflective layer may function as a bonding layer, or may be formed of nickel (Ni), gold (Au), or the like.

In addition, the second electrode layer 120 may include a conductive layer 124. If the first conductive semiconductor layer 112 is thick enough to be 50 mu m or more, the step of forming the conductive layer may be omitted. The conductive layer 124 may be formed of a metal, a metal alloy, or a conductive semiconductor material having excellent electrical conductivity so as to efficiently inject holes. For example, the conductive layer 124 may be copper (Cu), copper alloy (Cu Alloy), or Si, Mo, SiGe, Ge, GaN, The conductive layer 124 may be formed using an electrochemical metal deposition method, a bonding method using a eutectic metal, or the like.

Next, as shown in FIG. 9, the first substrate 105 is removed so that the first conductive semiconductor layer 112 is exposed. The first substrate 105 may be removed by separating the first substrate using a high-power laser or by using a chemical etching method. Also, the first substrate 105 may be removed by physically grinding. The removal of the first substrate exposes the first conductivity type semiconductor layer 112 or the undoped semiconductor layer.

Then, the first conductive type semiconductor layer 112 remaining on the upper side of the cavity of the first conductive type semiconductor layer 112 exposed by the removal of the first substrate 105 is removed to form the first dielectric layer 132a.

For example, a mask pattern (not shown) for exposing the first conductive semiconductor layer 112 on the upper side of the cavity is formed, and the first conductive semiconductor layer 112 is formed on the upper side of the cavity by dry or wet etching, The conductive semiconductor layer 112 may be removed to expose the first dielectric layer 132a.

Next, as shown in FIG. 11, a second dielectric layer 132b may be formed on the exposed first dielectric layer 132a to complete the dielectric layer 132. FIG.

The exposed second dielectric layer 132b may be the same material as the first dielectric layer 132a. For example, the second dielectric layer (132b) may be formed using an oxide film, a nitride film such as _{SiO 2, TiO 2, Al 2} O 3, Si 3 N 4.

The step of forming the dielectric layer 132 is not limited to the above description, and etching may be performed to expose the first substrate 105 when the light emitting structure is partially removed in the cavity process of FIG. 7, When the first substrate 105 is removed, the dielectric layer 132 may be exposed when the first conductive semiconductor layer 112 of the light emitting structure is exposed, so that the additional dielectric layer forming process may not be performed.

Next, a first electrode 142 is formed on the dielectric layer 132 as shown in FIG. Meanwhile, the first electrode 142 may be formed on the dielectric layer 132 so as to be spatially overlapped with the cavity. The third electrode 144 may be formed on the active layer 114 when the first electrode 142 is formed.

The first electrode 142 and the third electrode 144 are electrically connected to each other. The first electrode 142 and the third electrode 144 may serve as pad electrodes.

In the embodiment, since the cavity region below the first electrode 142 vertically has no active layer 114, light generation due to coupling of carriers (electrons and holes) may not occur.

In the embodiment, the cavity, which is the etched region, is filled with the dielectric layer 132, so that current does not flow but current spreads to other regions. That is, the cavity is covered with a dielectric layer and functions as a current blocking layer (CBL). Therefore, not only the reliability can be improved by the efficient current flow, but also the light absorption by the first electrode can be minimized, thereby increasing the light amount.

According to an embodiment of the present invention, there is provided a method of protecting electrostatic discharge (ESD) of an LED by forming a dielectric layer in a local region in an LED chip, depositing a metal on the dielectric layer, Capacitors can be configured in parallel with the light emitting diodes. In this case, current flows to the active region at the positive voltage to generate light. However, since the energy of the high-frequency component passes through the dielectric layer in the pulse-type ESD shock caused by discharging, the active layer can be protected.

Accordingly, according to the light emitting device according to the embodiment, electrostatic discharge (ESD) of the LED can be prevented without loss of light quantity absorption.

According to the embodiment, when the voltage is a constant voltage, a current flows to the active layer to cause light emission by recombination of carriers. However, when ESD impact occurs, the energy of the high frequency component passes through the path of the capacitor, .

In addition, according to the embodiment, a capacitor is formed in an LED chip to prevent static electricity damage, thereby simplifying the package cost and process, and minimizing the absorption of the light amount.

In addition, according to the embodiment, it is possible to increase light extraction efficiency with efficient current flow control. In addition, according to the embodiment, current spreading can improve the reliability of the light emitting device.

13 is a cross-sectional view of a light emitting device according to the second embodiment.

The second embodiment can employ the technical features of the first embodiment.

In the second embodiment, the first electrode 142 may be formed in the light emitting structure 110 to minimize the absorption of light by the first electrode 142.

10, the first electrode 142 may be formed on the first dielectric layer 132a and the third electrode 144 may be formed on the light emitting structure 110. In this case, As shown in FIG. The first electrode 142 and the third electrode 144 are electrically connected to each other.

For example, after forming the second dielectric layer 132b in the process of FIG. 11, a portion of the second dielectric layer 132b is removed to expose the first dielectric layer 132a, and the exposed first dielectric layer 132a The third dielectric layer 132c may be formed on the third dielectric layer 132c.

14 is a cross-sectional view of a light emitting device package according to an embodiment.

Referring to FIG. 14, a light emitting device package according to an embodiment includes a body 200, a fourth electrode layer 210 and a fifth electrode layer 220 provided on the body 200, A light emitting device 100 provided on the first electrode layer 210 and the fifth electrode layer 220 and electrically connected to the fourth electrode layer 210 and the fifth electrode layer 220 and a molding member 400 surrounding the light emitting device 100.

The body portion 200 may be formed of a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the light emitting device 100.

The fourth electrode layer 210 and the fifth electrode layer 220 are electrically isolated from each other and provide power to the light emitting device 100. The fourth electrode layer 210 and the fifth electrode layer 220 may reflect the light generated from the light emitting device 100 to increase the light efficiency. And may serve to discharge heat to the outside.

The light emitting device 100 may be a vertical type light emitting device as illustrated in FIG. 1 or 13, but the present invention is not limited thereto. The light emitting device 100 may be mounted on the body 200 or on the fourth electrode layer 210 or the fifth electrode layer 220.

The light emitting device 100 may be electrically connected to the fourth electrode layer 210 and / or the fifth electrode layer 220 through the wire 300. In an embodiment, the vertical type light emitting device 100 may include It is exemplified that one wire 300 is used. As another example, when the light emitting device 100 is a horizontal type light emitting device, two wires 300 may be used. When the light emitting device 100 is a flip chip type light emitting device, It may not be used.

The molding member 400 surrounds the light emitting device 100 to protect the light emitting device 100. In addition, the molding member 400 may include a phosphor to change the wavelength of light emitted from the light emitting device 100.

At least one of the light emitting devices of the above-described embodiments may be mounted on one or more than one light emitting device package, but the present invention is not limited thereto.

A light guide plate, a prism sheet, a diffusion sheet, and the like, which are optical members, may be disposed on the light path of the light emitting device package. Such a light emitting device package, a substrate, and an optical member can function as a light unit. Still another embodiment may be implemented as a display device, an indicating device, a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, for example, the lighting system may include a lamp, a streetlight .

The features, structures, effects and the like described in the embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects and the like illustrated in the embodiments can be combined and modified by other persons skilled in the art to which the embodiments belong. Accordingly, the contents of such combinations and modifications should be construed as being included in the scope of the embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (17)

A light emitting structure including a first conductive semiconductor layer, an active layer below the first conductive semiconductor layer, and a second conductive semiconductor layer below the active layer;
A dielectric layer in contact with the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer in a cavity inside the light emitting structure;
A second electrode layer disposed under the dielectric layer;
A first electrode disposed in contact with an upper surface of the dielectric layer; And
And a third electrode disposed on an upper surface of the first conductive type semiconductor layer,
The first electrode contacting the upper surface of the dielectric layer is physically separated from the third electrode and electrically connected to the third electrode,
And a dielectric layer formed inside the cavity,
A first dielectric layer formed on the cavity from which a part of the light emitting structure is removed; And
And a second dielectric layer formed on the exposed first dielectric layer after the light emitting structure on the first dielectric layer is removed,
Wherein the first electrode is in contact with the upper surface of the second dielectric layer. delete The method according to claim 1,
Wherein the first electrode comprises:
Wherein the first conductive semiconductor layer is formed at a position lower than the upper surface of the first conductive semiconductor layer. 4. The method according to any one of claims 1 to 3,
And the second electrode layer
A reflective layer below the dielectric layer; And
And a conductive layer under the reflective layer. 5. The method of claim 4,
Wherein,
And a light emitting element formed on at least a part of the cavity. delete delete The method according to claim 1,
Wherein a current flows to the active layer to generate light at a positive voltage, and an electric field generated at the time of electrostatic discharge is induced to the dielectric layer. delete Forming a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a substrate;
Forming a cavity by partially removing the light emitting structure;
Forming a first dielectric layer on the cavity;
Forming a second electrode layer on the first dielectric layer to fill the cavity;
Removing the substrate to expose a bottom surface of the light emitting structure;
Exposing the first dielectric layer by removing a portion of the bottom surface of the exposed light emitting structure;
Forming a second dielectric layer on the exposed first dielectric layer; And
And forming a first electrode on the second dielectric layer. delete 11. The method of claim 10,
In the step of forming the first electrode,
Wherein the first electrode is formed after partially removing the second dielectric layer. 11. The method of claim 10,
And a cavity formed by removing a part of the light emitting structure,
And a portion of the first conductivity type semiconductor layer is removed from the second conductivity type semiconductor layer until a portion of the first conductivity type semiconductor layer is removed. 11. The method of claim 10,
Wherein forming the second electrode layer on the first dielectric layer comprises:
Forming a reflective layer on the first dielectric layer; And
And forming a conductive layer on the reflective layer. 15. The method of claim 14,
Wherein forming the reflective layer on the first dielectric layer comprises:
And the reflective layer is formed on at least a part of the cavity. 11. The method of claim 10,
Wherein the first electrode and a part of the cavity are spatially overlapped with each other. A light emitting device according to any one of claims 1 to 3, And
And a package body in which the light emitting device is disposed.

Images