KR101710154B1 - Power circuit for liquid crystal display device and liquid crystal display device including the same - Google Patents

Abstract

The present invention provides a liquid crystal display device comprising: a gate wiring and a data wiring which are formed in a liquid crystal panel and cross each other to define a pixel; A gate driver for outputting a gate voltage to the gate wiring; And a charge pump section for reducing the input voltage and outputting a gate low voltage to the gate driving section, wherein the charge pump section includes first and second transistors connected in series between an input terminal to which the input voltage is input and a ground terminal, A transistor; First and second diodes connected in series between an output terminal of the charge pump section and an input terminal to which a power supply voltage is input; And a capacitor connected between a contact between the first and second transistors and a contact between the first and second diodes, wherein the power supply voltage has a value higher than a ground voltage.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit for a liquid crystal display device and a liquid crystal display device including the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a power supply circuit for a liquid crystal display device and a liquid crystal display device including the same.

2. Description of the Related Art [0002] With the development of an information society, demands for a display device for displaying images have been increasing in various forms. Recently, a liquid crystal display (LCD), a plasma display panel (PDP) Various flat display devices such as an organic electroluminescent display device (OELD) have been utilized.

Of these flat panel display devices, liquid crystal display devices have recently been widely used because they have advantages of miniaturization, light weight, thinness, and low power driving.

As a liquid crystal display device, an active matrix type liquid crystal display device in which switching transistors are formed in each of pixels arranged in a matrix form is widely used.

In such an active matrix type liquid crystal display device, when the gate wiring is scanned, a scan pulse is applied to turn on the switching transistor. In synchronism with this, the data voltage is transmitted through the data line and applied to the corresponding pixel. Accordingly, the data voltage is applied to the pixel electrode of the pixel, and the corresponding light is emitted.

For such driving, the liquid crystal display device receives the necessary power from the power supply circuit. For example, the power supply circuit generates the power supply voltages (VDD and VCC), the gate low voltage (VGL) and the gate high voltage (VGH) and supplies them to the driving circuit portion of the liquid crystal display device.

Here, the gate-low voltage VGL is generated through a charge pump circuit of the power supply circuit. The charge pump circuit used to generate the gate-low voltage VGL in this way is called a negative charge pump circuit.

The negative charge pump circuit regulates the voltage charged to the capacitor through the switching operation of the transistor to generate the gate-low voltage (VGL) with respect to the input voltage VIN input thereto. Here, in adjusting the voltage charged in the capacitor, the operation of adjusting the resistance Rds of the channel such that the transistor Ids flows through the channel without being completely turned off is performed. Thus, the voltage difference between the source and the drain of the transistor, that is, the channel voltage Vds, is generated. Thus, the channel voltage Vds can be adjusted by adjusting the channel current Ids of the transistor, so that a voltage equal to the input voltage VIN minus the channel voltage Vds is charged to the capacitor.

In order to control the voltage charged in the capacitor as described above, a channel voltage must be generated in the transistor, which causes power loss as much as the generated channel voltage. That is, a power loss occurs as much as the channel current Ids * the channel voltage Vds, which is consumed as heat.

Disclosure of the Invention Problems to be Solved by the Invention The present invention has a problem in providing a power supply circuit for a liquid crystal display device capable of improving power consumption and a liquid crystal display device including the same.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a gate line and a data line which are formed in a liquid crystal panel and cross each other to define a pixel; A gate driver for outputting a gate voltage to the gate wiring; And a charge pump section for reducing the input voltage and outputting a gate low voltage to the gate driving section, wherein the charge pump section includes first and second transistors connected in series between an input terminal to which the input voltage is input and a ground terminal, A transistor; First and second diodes connected in series between an output terminal of the charge pump section and an input terminal to which a power supply voltage is input; And a capacitor connected between a contact between the first and second transistors and a contact between the first and second diodes, wherein the power supply voltage has a value higher than a ground voltage.

Here, the power supply circuit includes: a boost converter unit for boosting the input voltage; And a buck converter unit for reducing the input voltage, wherein the power supply voltage may be an output voltage of the buck converter unit.

The power supply circuit may further include another charge pump unit for boosting the input voltage to output a gate high voltage.

The charge pump unit may further include a control unit for controlling the switching of the first and second transistors. When the first transistor is turned on, the channel of the second transistor is partially opened, and when the second transistor is turned on, The first transistor may be turned off.

According to another aspect of the present invention, there is provided a charge pump circuit comprising: a charge pump unit that steps down an input voltage to output a gate low voltage, the charge pump unit including first and second transistors connected in series between an input terminal to which an input voltage is input and a ground terminal ; First and second diodes connected in series between an output terminal of the charge pump section and an input terminal to which a power supply voltage is input; And a capacitor connected between a contact between the first and second transistors and a contact between the first and second diodes. The power supply voltage has a value higher than a ground voltage.

A boost converter for boosting the input voltage; And a buck converter unit for reducing the input voltage, wherein the power supply voltage may be an output voltage of the buck converter unit.

And another charge pump unit for boosting the input voltage to output a gate high voltage.

The charge pump unit may further include a control unit for controlling the switching of the first and second transistors. When the first transistor is turned on, the channel of the second transistor is partially opened, and when the second transistor is turned on, The first transistor may be turned off.

In the present invention, by using the power supply voltage (VCC) having a voltage value higher than the ground voltage in generating the gate low voltage, the amount of the voltage charged in the capacitor is reduced. Thus, the channel voltage of the second transistor can be reduced. Therefore, power loss and heat generation due to the generation of the channel voltage can be reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic view illustrating a liquid crystal display according to an embodiment of the present invention. FIG. 2 is a schematic view illustrating a pixel structure according to an embodiment of the present invention. FIG. 3 is a cross- FIG. 4 is a view schematically showing a second charge pump section of a power supply circuit according to an embodiment of the present invention. FIG.

A liquid crystal display device 100 according to an embodiment of the present invention includes a liquid crystal panel 200, a driving circuit, a power supply circuit 400, and a backlight 500.

The liquid crystal panel 200 includes two substrates facing each other, for example, an array substrate and an opposite substrate, and a liquid crystal layer positioned between these two substrates.

A plurality of gate lines GL extending in the first direction and a plurality of data lines DL extending in the second direction intersect with each other on the array substrate of the liquid crystal panel 200 to form a matrix A plurality of arranged pixels P are defined.

Referring to FIG. 2, each pixel P is formed with a switching transistor TS connected to a gate line and a data line GL and DL. The switching transistor TS is connected to the pixel electrode. On the other hand, a common electrode is formed corresponding to the pixel electrode, and an electric field is formed between the pixel electrode and the common electrode to drive the liquid crystal. The pixel electrode, the common electrode, and the liquid crystal located between these electrodes constitute a liquid crystal capacitor Clc. Each pixel P further includes a storage capacitor Cst, which serves to store the data voltage applied to the pixel electrode until the next frame.

The driving circuit includes a timing control unit 310, a gate driving unit 320, a data driving unit 330, and a gamma reference voltage generating unit 340.

The timing controller 310 receives a control signal and image data Data from an external system such as a TV system or a video card.

The timing control unit 310 generates a gate control signal GCS for controlling the gate driving unit 320 and a data control signal DCS for controlling the data driving unit 330 using the input control signal.

The gamma reference voltage generator 340 divides the high voltage and the low voltage to generate a plurality of gamma reference voltages Vgamma and supplies the gamma reference voltages Vgamma to the data driver 330.

The gate driver 320 can sequentially apply the scan pulse to the plurality of gate lines GL in response to the gate control signal GCS supplied from the timing controller 310. [ For example, a plurality of gate lines GL are sequentially selected for each frame, and a scan pulse is output to the selected gate line GL. Accordingly, the switching transistor TS located in the corresponding row line is turned on by the gate high voltage VGH of the scan pulse. On the other hand, the gate line voltage VGL is supplied to the gate line GL until the scan of the next frame, so that the switching transistor TS maintains the turn-off state.

The data driver 330 supplies the data voltages to the plurality of data lines DL in response to the data control signal DCS supplied from the timing controller 310. [ For example, for the input gamma reference voltages Vgamma, it divides through the voltage dividing circuit to generate gradation voltages. Such gradation voltages correspond to the respective gradations that the image data Data can have. For example, when the image data Data is n-bit, ²ⁿ gradations (i.e., 0th to ^2n- 1th gradations) can be represented, thereby generating ²ⁿ gradation voltages Will be.

Accordingly, the data driver 330 outputs the gradation voltage corresponding to the gradation of the input image data Data as the data voltage to the data line DL. Such a data voltage is output in synchronization with the scan of the gate line GL, and is input to the corresponding pixel P located in the scanned row line.

The backlight 500 serves to supply light to the liquid crystal panel 200. As the backlight 500, a cold cathode fluorescent lamp (CCFL), an external electrode fluorescent lamp (EEFL), a light emitting diode (LED), or the like may be used.

The power supply circuit 400 is a power supply device that supplies driving voltages for driving components of the liquid crystal display device 100 such as power supply voltages VDD and VCC and a gate high voltage VGH, Thereby generating a voltage VGL. Here, the power supply voltages VDD and VCC are referred to as first and second power supply voltages (VDD and VCC) for convenience of explanation.

For example, the first and second power supply voltages VDD and VCC may be supplied to the data driver 330 and used as a driving voltage for driving the data driver 330. Here, the first power supply voltage VDD may have a voltage value higher than the second power supply voltage VCC. The second power supply voltage VCC may have a higher voltage value than the ground voltage.

The first and second power supply voltages VDD and VCC may be used as high and low potential voltages input to the gamma reference voltage generator 340.

The gate high voltage and the gate low voltages VGH and VGL are supplied to the gate driver 320 and the gate driver 320 uses the voltages VGH and VGL to apply a gate voltage . Here, the gate high voltage VGH corresponds to the turn-on voltage for turning on the switching transistor TS. The gate-low voltage VGL corresponds to a turn-off voltage for turning off the switching transistor TS.

As described above, the power supply circuit 400 that generates the driving voltages VDD, VCC, VGH, and VGL will be described in further detail with reference to FIGS. 3 and 4. FIG.

Referring to FIG. 3, the power supply circuit 400 includes a boost converter unit 410, a buck converter unit 420, and charge pump units 430 and 440.

The boost converter unit 410 boosts or boosts the input voltage VIN to generate the first power supply voltage VDD.

Meanwhile, the buck converter unit 420 bucks the input voltage VIN, that is, reduces the voltage to generate the second power supply voltage VCC. For example, assuming that a voltage of approximately 12 V is applied as the input voltage VIN, a voltage of approximately 3.3 V is generated as the second power supply voltage VCC.

The boost operation and the buck operation as described above are performed through the switching operation of the transistor and the current charging / discharging operation of the inductor in the boost converter unit 410 and the buck converter unit 420, respectively, although not shown. For example, the boost operation can be performed through the switching operation of the transistor connected between the input terminal and the output terminal, and the current charging / discharging operation of the inductor connected to the input terminal of the boost converter 410 according to the switching operation. have. Meanwhile, the buck operation may be performed through a switching operation of a transistor connected between an input terminal and an output terminal, and a current charging / discharging operation of an inductor connected to an output terminal of the buck converter unit 420 according to the switching operation. Here, the switching operation of the boost converter unit 410 and the buck converter unit 420 can be controlled through a pulse width modulation (PWM) method, that is, a pulse width modulation method.

The first and second power supply voltages VDD and VCC can be generated through the boost converter unit 410 and the buck converter unit 420 in the manner as described above. The first and second power supply voltages VDD and VCC thus generated may be used to drive the data driver 330.

On the other hand, the second power supply voltage VCC can be used to generate the gate-low voltage VGL, which will be described later.

Each of the charge pump units 430 and 440 of the power supply circuit 400, for example, the first and second charge pump units 430 and 440, generates a gate high voltage VGH and a gate low voltage VGL Can be used.

The first-order value pump unit 430 boosts the input voltage VIN to generate the gate high voltage VGH. As such, the first charge pump unit 430 is a charge pump circuit used to boost the input voltage VIN, and corresponds to a positive charge pump circuit. The charge pumping operation of the first charge pump unit 430 is performed through the switching operation of the transistor and the charge charging / discharging operation of the capacitor (not shown) in the first charge pump unit 430 .

On the other hand, the second charge pump unit 440 decreases the input voltage VIN to generate the gate low voltage VGL. As such, the second charge pump unit 440 is a charge pump circuit used to step down the input voltage VIN, and corresponds to a negative charge pump circuit. Furthermore, in the embodiment of the present invention, the second power supply voltage VCC is used to generate the gate-low voltage VGL through the second charge pump unit 440. With reference to FIG. 4, Will be described in more detail.

Referring to FIG. 4, the second charge pump unit 440 may include a control unit 441, a switch unit 442, a capacitor C, and diodes D1 and D2.

The switch portion 442 may include first and second transistors T1 and T2. The first and second transistors T1 and T2 are connected in series with each other. The drain electrode of the first transistor T1 is connected to the input terminal to receive the input voltage VIN. The source electrode of the second transistor T2 may be grounded. As described above, the first and second transistors T1 and T2 have a configuration in which they are connected in series between the input terminal of the input voltage VIN and the ground terminal.

The control unit 441 controls the switching operation of the switch unit 442. That is, the control unit 441 outputs the first and second switching signals S1 and S2, and each of the switching signals S1 and S2 is input to the gate electrodes of the first and second transistors T1 and T2 , The switching operation of the first and second transistors T1 and T2 can be controlled.

Here, when the first transistor T1 is turned on, the second transistor T2 is not turned off. For example, the channel of the second transistor T2 is in a state in which it is not completely closed and completely open, i.e., partially opened. Accordingly, the channel of the second transistor T2 has a channel resistance Rds of a certain degree. The controller 441 controls the second transistor T2 so that the second transistor T2 has a predetermined channel resistance Rds when the first transistor T1 is turned on . Furthermore, by adjusting the second switching signal S2, the value of the channel resistance Rds can be adjusted. With the adjustment of the channel resistance Rds, the voltage charged in the capacitor C can be adjusted.

On the other hand, when the first transistor T1 is turned off, the second transistor T2 is turned on.

The capacitor C is connected to the contacts of the first and second transistors T1 and T2, that is, the first node N1. For example, the first electrode of the capacitor C is connected to the first node N1. Such a capacitor C is called a flying capacitor.

As the diodes D1 and D2, for example, first and second diodes D1 and D2 may be used. The first electrode of the first diode D1 is connected to the output terminal of the second charge pump unit 440 and the second electrode of the first diode D1 is connected to the second electrode of the capacitor C. [ Here, the forward direction of the first diode D1 corresponds to the direction of the first electrode to the second electrode.

The first electrode of the second diode D2 is connected to the second electrode of the capacitor C. [ The second power source voltage VCC is applied to the second electrode of the second diode D2. For example, the second electrode of the second diode D2 is connected to the output terminal of the buck converter unit 420 to receive the second power supply voltage VCC. Here, the forward direction of the second diode D2 corresponds to the direction from the first electrode to the second electrode.

As described above, the first and second diodes D1 and D2 are connected in series between the output terminal and the input terminal of the second power supply voltage.

The first electrode of the capacitor C is connected to the first node N1 between the first and second transistors T1 and T2 and the second electrode of the capacitor C is connected to the first and second transistors T1 and T2, I.e., the second node N2, between the first and second nodes D1 and D2. Thereby, the capacitor C is charged with a voltage, and the gate-low voltage VGL is generated through the charged voltage, which will be described in detail.

First, the controller 441 turns on the first transistor T1 and controls the second transistor T2 to partially open the channel.

Accordingly, a channel resistance Rds exists between the source and drain electrodes of the second transistor T2. As a result, the channel current Ids flows between the source and drain electrodes of the second transistor T2, resulting in the generation of the channel voltage Vds.

In such a case, the first node N1 has a voltage that is equal to the input voltage VIN minus the channel voltage Vds. Therefore, a voltage obtained by subtracting the channel voltage (Vds) from the input voltage (VIN), that is, a voltage of (VIN - Vds) is applied to the first electrode of the capacitor (C).

Meanwhile, the second node N2 has a voltage corresponding to the second power supply voltage VCC. Therefore, the second power source voltage VCC is applied to the second electrode of the capacitor C. [

Accordingly, when the first transistor T1 is turned on and the channel of the second transistor T2 is partially opened, a voltage of (VIN - Vds - VCC) is charged in the capacitor C.

Next, the control section 441 turns off the first transistor T1 and turns on the second transistor T2. In such a case, the first electrode of the capacitor C is grounded through the second transistor T2. At this time, since the voltage difference between the first and second electrodes of the capacitor C is maintained as the previously charged voltage, (VIN - Vds - VCC), the second electrode of the capacitor C becomes - (VIN - Vds - VCC) = (-VIN + Vds + VCC).

Accordingly, the voltage at the output terminal of the second charge pump unit 440, that is, the gate low voltage VGL, has an output value of VGL = Vd + (-VIN + Vds + VCC). Here, Vd corresponds to the amount of forward voltage drop occurring in the diode located at the output terminal side, that is, the first diode D1. Accordingly, the voltage charged in the capacitor C can be adjusted by adjusting the Vds, thereby adjusting the value of the output gate-low voltage VGL.

Through the charge pumping operation as described above, it becomes possible to generate the gate-low voltage VGL from the input voltage VIN.

In the embodiment of the present invention, as described above, by using the second power supply voltage VCC in the process of generating the gate low voltage VGL, the channel voltage Vds of the second transistor T2 can be reduced do.

In this regard, if the second electrode of the second diode D2 is grounded, VGL = Vd + (-VIN + Vds'). Here, Vds' corresponds to the channel voltage of the second transistor T2 when the second electrode of the second diode D2 is grounded.

Here, assuming that Vd has a fixed value, it should have a value of Vds' = Vds + VCC. That is, Vds' should have a voltage value higher than Vds by VCC, for example, approximately 3.3V.

Therefore, when the second power supply voltage VCC is applied to the second electrode of the second diode D2, the power loss corresponding to about 3.3 V can be reduced as compared with the case where the second electrode is grounded. In addition, as the power loss is reduced, the heat generation of the power supply circuit 400 can be reduced.

In this connection, as a result of conducting an experiment on a liquid crystal display device in which the input voltage VIN is approximately 12 V and the gate low voltage is approximately -5 V to -7 V, the case of using the second power source voltage VCC, The temperature of the power supply circuit 400 is reduced by about 3 ° C to 4 ° C compared with the case where the power supply circuit 400 is turned on.

As described above, in the embodiment of the present invention, by using the power supply voltage VCC having a voltage value higher than the ground voltage in generating the gate low voltage, the amount of the voltage charged in the capacitor is reduced. Thus, the channel voltage of the second transistor can be reduced. Therefore, power loss and heat generation due to the generation of the channel voltage can be reduced.

The embodiment of the present invention described above is an example of the present invention, and variations are possible within the spirit of the present invention. Accordingly, the invention includes modifications of the invention within the scope of the appended claims and equivalents thereof.

1 is a view schematically showing a liquid crystal display device according to an embodiment of the present invention.

Figure 2 schematically illustrates a pixel structure according to an embodiment of the present invention;

3 schematically shows a power supply circuit according to an embodiment of the present invention.

4 is a schematic view of a second charge pump section of a power supply circuit according to an embodiment of the present invention.

Description of the Related Art

440: second charge pump unit 441:

442:

T1, T2: first and second transistors

D1, D2: first and second diodes

S1, S2: first and second switching signals

C: Capacitor

VIN: Input voltage

VCC: Second power supply voltage

VGL: Gate Low Voltage

N1, N2: first and second nodes

Claims (10)

A gate wiring and a data wiring which are formed on the liquid crystal panel and cross each other to define a pixel; A gate driver for outputting a gate voltage to the gate wiring; And a power supply circuit including a charge pump section for reducing the input voltage and outputting a gate low voltage to the gate driving section, The charge pump unit includes first and second transistors connected in series between an input terminal to which the input voltage is input and a ground terminal; First and second diodes connected in series between an output terminal of the charge pump section and an input terminal to which a power supply voltage is input; A capacitor coupled between a contact between the first and second transistors and a contact between the first and second diodes, Wherein the power supply voltage has a value higher than the ground voltage Liquid crystal display device. The method according to claim 1, The power supply circuit includes: A boost converter for boosting the input voltage; Further comprising a buck converter unit for reducing the input voltage, Wherein the power supply voltage is an output voltage of the buck converter unit Liquid crystal display device. 3. The method of claim 2, The power supply circuit may further include another charge pump section for boosting the input voltage to output a gate high voltage Liquid crystal display device. The method according to claim 1, The charge pump unit further includes a control unit for controlling switching of the first and second transistors, When the first transistor is turned on, the channel of the second transistor is partially opened, When the second transistor is turned on, the first transistor is turned off Liquid crystal display device. And a charge pump unit for outputting a gate-low voltage by stepping down the input voltage, The charge pump unit includes first and second transistors connected in series between an input terminal to which an input voltage is input and a ground terminal; First and second diodes connected in series between an output terminal of the charge pump section and an input terminal to which a power supply voltage is input; A capacitor coupled between a contact between the first and second transistors and a contact between the first and second diodes, Wherein the power supply voltage has a value higher than the ground voltage Power supply circuit for liquid crystal display device. 6. The method of claim 5, A boost converter for boosting the input voltage; Further comprising a buck converter unit for reducing the input voltage, Wherein the power supply voltage is an output voltage of the buck converter unit Power supply circuit for liquid crystal display device. The method according to claim 6, Further comprising another charge pump section for boosting the input voltage to output a gate high voltage Power supply circuit for liquid crystal display device. 6. The method of claim 5, The charge pump unit further includes a control unit for controlling switching of the first and second transistors, When the first transistor is turned on, the channel of the second transistor is partially opened, When the second transistor is turned on, the first transistor is turned off Power supply circuit for liquid crystal display device. The method according to claim 1, Wherein each of the first and second diodes is disposed at an output terminal of the charge pump unit with a forward direction of an input terminal through which the power supply voltage is input Liquid crystal display device. 6. The method of claim 5, Wherein each of the first and second diodes is disposed at an output terminal of the charge pump unit with a forward direction of an input terminal through which the power supply voltage is input Power supply circuit for liquid crystal display device.

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