KR101593107B1 - 메모리 요청들을 처리하기 위한 시스템들 및 방법들 - Google Patents

메모리 요청들을 처리하기 위한 시스템들 및 방법들 Download PDF

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KR101593107B1
KR101593107B1 KR1020127009174A KR20127009174A KR101593107B1 KR 101593107 B1 KR101593107 B1 KR 101593107B1 KR 1020127009174 A KR1020127009174 A KR 1020127009174A KR 20127009174 A KR20127009174 A KR 20127009174A KR 101593107 B1 KR101593107 B1 KR 101593107B1
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memory
processing unit
cache
probe
request
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KR20120060230A (ko
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필립 제이. 로저스
워렌 프리츠 크루거
마크 험멜
에릭 드메르스
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0831Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G06F12/0835Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means for main memory peripheral accesses (e.g. I/O or DMA)
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363Graphics controllers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2350/00Solving problems of bandwidth in display systems
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/12Frame memory handling
    • G09G2360/121Frame memory handling using a cache memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Multimedia (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Digital Computer Display Output (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
KR1020127009174A 2009-09-10 2010-09-10 메모리 요청들을 처리하기 위한 시스템들 및 방법들 Active KR101593107B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US24120309P 2009-09-10 2009-09-10
US61/241,203 2009-09-10
US12/878,223 2010-09-09
US12/878,223 US8615637B2 (en) 2009-09-10 2010-09-09 Systems and methods for processing memory requests in a multi-processor system using a probe engine
PCT/US2010/048428 WO2011031969A1 (en) 2009-09-10 2010-09-10 Systems and methods for processing memory requests

Publications (2)

Publication Number Publication Date
KR20120060230A KR20120060230A (ko) 2012-06-11
KR101593107B1 true KR101593107B1 (ko) 2016-02-11

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KR1020127009174A Active KR101593107B1 (ko) 2009-09-10 2010-09-10 메모리 요청들을 처리하기 위한 시스템들 및 방법들

Country Status (7)

Country Link
US (1) US8615637B2 (enExample)
EP (1) EP2476051B1 (enExample)
JP (1) JP6196445B2 (enExample)
KR (1) KR101593107B1 (enExample)
CN (1) CN102576299B (enExample)
IN (1) IN2012DN02863A (enExample)
WO (1) WO2011031969A1 (enExample)

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KR20220064230A (ko) * 2020-11-11 2022-05-18 삼성전자주식회사 다중 프로토콜에 기초하여 메모리에 액세스하기 위한 시스템, 장치 및 방법
CN115202892B (zh) * 2022-09-15 2022-12-23 粤港澳大湾区数字经济研究院(福田) 一种机密计算协处理器的内存扩展系统和内存扩展方法

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Publication number Publication date
KR20120060230A (ko) 2012-06-11
CN102576299B (zh) 2015-11-25
EP2476051A1 (en) 2012-07-18
CN102576299A (zh) 2012-07-11
JP6196445B2 (ja) 2017-09-13
US20110060879A1 (en) 2011-03-10
US8615637B2 (en) 2013-12-24
EP2476051B1 (en) 2019-10-23
IN2012DN02863A (enExample) 2015-07-24
JP2013504822A (ja) 2013-02-07
WO2011031969A1 (en) 2011-03-17

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