KR101580020B1 - Controlling system for multilevel inverter and controlling method for the same - Google Patents

Abstract

A multi-level inverter control system according to an aspect of the present invention which can uniformly control a DC voltage between cell inverters includes a multi-level inverter in which a plurality of cell inverters are connected in series; A main controller for calculating a voltage command value for outputting a target current value to the system; And a cell controller for detecting a phase value of the voltage command value and a phase delay value of the output voltage and calculating a final voltage command value by compensating the phase delay value for each of the plurality of cell inverters do.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multi-level inverter control system,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multi-level inverter control system,

A multi-level inverter is a high-voltage, large-capacity inverter that connects a plurality of single-phase inverters (hereinafter referred to as "cell inverters") for each phase in series and obtains a high voltage using a semiconductor for low-voltage power in each cell inverter .

A load such as an electric furnace in which reactive power fluctuates abruptly causes a severe current imbalance in the power system. Recently, the application of a STATCOM (STATCOM) to compensate reactive power to realize system stabilization has been demanded. The above-described multi-level inverter is applied to the reactive power compensator have.

1 is a diagram showing a conventional multi-level inverter control system.

Referring to FIG. 1, a conventional multi-level inverter control system 100 is connected to a system 160 to compensate for reactive power of the system 160, and includes a multi-level inverter 120, a reactor 130 ), A transformer 140, and a switching gear 150.

The multi-level inverter 120 is connected in parallel to the system 150 to improve the power factor of the system 150 by compensating for the reactive power of the system 150.

The multi-level inverter 120 is composed of an A phase 120a, a B phase 120b, and a C phase 120c, as shown in Fig. The A phase 120a, the B phase 120b, and the C phase 120c each include a plurality of cell inverters 122 connected in series to each other.

The plurality of cell inverters 122 constitute unit cells, and are connected in series with each other. The plurality of cell inverters 122 are connected to the transformer 140 through the reactor 130 provided for each phase and the transformer 140 is connected to the power system 160 through the switching gear 150 .

Each of the cell inverters 122 may be an H-Bridge type inverter, and the capacitors 125 are connected in parallel.

Since the capacitor 125 is independently connected to each of the plurality of cell inverters 122, the multi-level inverter generates the DC voltage imbalance between the cell inverters 122 in the same phase as well as the voltage unbalance between the phases.

The cause of the DC voltage imbalance between the cell inverters 122 is as follows. First, there is a power loss difference between the cell inverters 122. Second, there is a capacitance difference between the capacitor 125 and the discharge resistance. Third, there is a difference in the power factor between the cell inverters 122 due to the phase delay of the output voltage generated during the phase-shifted PWM (pulse width modulation).

Among the above-mentioned causes, the main cause of the imbalance of the DC voltage is the phase delay of the output voltage.

Phase-Shifted PWM (hereinafter referred to as "PSPWM") method, which is relatively easy to implement in a multi-level inverter and can be modularized in a controller, is widely applied.

The PSPWM method is a method of superimposing an output voltage by giving a phase difference to a carrier of each cell inverter 122. A switching frequency effect corresponding to a voltage level of the switching frequency of the cell inverter 122 can be obtained , Thereby providing a high output voltage at low THD (Total Harmonics Distortion).

2 is a diagram conceptually showing an output voltage phase according to a phase-shifted PWM method.

As shown in FIG. 2, the output voltage V _{C_real} of the cell inverter 122 has a delay in the actual output, unlike the voltage command value V _{C_ref} .

Such an output delay is different for each cell inverter 122, resulting in an unbalance between the cell inverters 122. [ This results in a phase delay for the output phase voltage as well.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and provides a multi-level inverter control system and a control method thereof that can compensate for DC voltage imbalance between cell inverters.

According to an aspect of the present invention, there is provided a multi-level inverter control system including: a multi-level inverter having a plurality of cell inverters connected in series; A main controller for calculating a voltage command value for outputting a target current value to the system; And a phase detector for detecting a phase value of the voltage command value and a phase delay value of an output voltage for each of the plurality of cell inverters and compensating for the phase delay value for each of the plurality of cell inverters, And a cell controller for calculating a final voltage command value of the battery.

According to another aspect of the present invention, there is provided a multi-level inverter control system including: a multi-level inverter having a plurality of cell inverters connected in series for each phase; A main controller for calculating a voltage command value for outputting the target current value to the system in the two-phase synchronous coordinate system and converting the calculated voltage command value into the two-phase stationary coordinate system; And a phase detector for detecting a phase value of the voltage command value and a phase delay value of an output voltage for each of the plurality of cell inverters and compensating for the phase delay value for each of the plurality of cell inverters, And a cell controller for controlling each of the cell inverters by converting the plurality of final voltage command values into three-phase stationary coordinates.

According to another aspect of the present invention, there is provided a method for controlling a multi-level inverter, comprising: calculating a voltage command value for outputting a target current value on a two-phase synchronous coordinate system; Transforming the coordinates into coordinates; Calculating a plurality of final voltage command values for each of the plurality of cell inverters by detecting a phase value of the voltage command value converted into the two-phase stationary coordinate and compensating the phase delay value for the detected phase value; And controlling the plurality of cell inverters for each phase by converting the plurality of final voltage command values into three-phase stationary coordinates.

According to the present invention, there is an effect that the voltage imbalance among the cell inverters can be compensated by compensating the phase delay of the output voltage according to the phase-shifted PWM in individual cells.

1 is a diagram showing a conventional multi-level inverter control system.
2 is a diagram conceptually showing an output voltage phase according to a phase-shifted PWM method.
3 is a diagram illustrating a multi-level inverter control system in accordance with an embodiment of the present invention.
4 is a block diagram illustrating the cell controller of FIG.
5 is a diagram illustrating a multi-level inverter control system according to another embodiment of the present invention.
6 is a diagram illustrating a multi-level inverter control system according to another embodiment of the present invention.
7 is a flowchart illustrating a method of controlling a multi-level inverter according to an embodiment of the present invention.

Prior to the description of the multilevel inverter control system 300, a description will be given of a multilevel inverter.

The multi-level inverter is connected in parallel to the system to compensate the reactive power of the system. These multilevel inverters are composed of phase A, phase B and phase C, and are connected to the system through a load.

On the other hand, each of the A-phase, B-phase and C-phase includes a plurality of cell inverters connected in series, and a high voltage can be obtained by connecting them in series. In this case, since each cell inverter has an independent DC power source, a constant voltage can be applied to the power device included in the cell inverter without a separate clamping circuit, and the output voltage of the cell inverter of a relatively low voltage So that a high-voltage output of several kV can be obtained.

Also, the output voltage and the voltage level can be easily adjusted according to the number of cell inverters, and a voltage waveform close to a sine wave can be obtained as the number of cell inverters increases.

On the other hand, the cell inverter has an independent DC power supply and includes a capacitor charged or discharged according to the phase of the output voltage.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a schematic diagram illustrating a multi-level inverter control system according to an embodiment of the present invention.

3, a multi-level inverter control system 300 according to an exemplary embodiment of the present invention includes a main controller 310, a plurality of cell controllers 330a to 330n, Cell < / RTI > inverters 360a through 360n.

The main controller 310 calculates a voltage command value for outputting a target current value to the system, and outputs the voltage command value to the cell controllers 330a to 330n. The main controller 310 can transmit and receive a voltage command value to and from a plurality of cell controllers 330a to 330n through a CAN (Controller Area Network) communication in synchronism with each phase, and can include a CAN driver have.

The main controller 310 includes a DC voltage controller for constantly controlling the DC voltage average of the three phases, a phase compensation controller for controlling the voltage of each phase to have a DC voltage average value, a load current detector for detecting a load current to generate a compensation reference value, And a current controller for controlling the output current.

The output values of the DC voltage controller, phase compensation controller, and load current detector are input to the current controller, and the current controller can output a voltage command value to output a desired current.

,

로 표현되며, 2상 정지좌표계

,

로 변환되어 각 상의 셀제어기(330a~330n)에 출력된다.At this time, the voltage command value output from the current controller is a 2-phase synchronous coordinate system

,

, And a two-phase stationary coordinate system

,

And output to the cell controllers 330a to 330n of the respective phases.

The main controller 310 also transmits a PWM synchronization command to each of the cell controllers 330a to 330n for synchronizing PWM (Pulse Width Modulation) control signals between the plurality of cell inverters 360a to 360n for each phase .

The cell controllers 330a to 330n are provided for each phase and control the plurality of cell inverters 360a to 360n so that a voltage corresponding to the voltage command value received from the main controller 310 can be output.

The cell controllers 330a to 330n included in each phase (A phase, B phase, C phase) have the same or similar characteristics. Therefore, for convenience of explanation, the cell controller 330a on the A side .

In the following description, it is assumed that six cell inverters are included on the A phase. However, the number of cell inverters is not limited thereto.

The cell controller 330a controls the operation of the cell inverters 360a included in A.

More specifically, the cell controller 330a receives the voltage command value from the main controller 310 and senses the DC voltage of the cell inverters 360a. At this time, the DC voltage is a voltage across the capacitor included in the cell inverter 360a.

The cell controller 330a generates a PWM control signal using the sensed DC voltage and the voltage command value, and outputs the PWM control signal to the cell inverters 360a. At this time, the PWM control signal may be a gating signal for driving the power devices included in the cell inverters 360a.

The cell controller 330a generates a PWM control signal using the PSPWM method. The PSPWM method is a method of superposing an output voltage by giving a phase difference to a carrier of the cell inverter 122. The controller of the multilevel inverter can be decentralized and modularized, which is advantageous in that the implementation is simple.

However, such a PSPWM method has a disadvantage in that the phase difference between the voltage command value of the main controller 310 and the actual output voltage of the cell inverter occurs, and the accuracy of the current control is deteriorated in the feedback control.

Hereinafter, the phase difference occurring between the voltage command value of the main controller 310 and the actual output voltage of the cell inverter will be described in more detail.

The cell controller 330a compares carriers generated based on the voltage command value and the DC voltage of the cell inverter to generate a PWM control signal. At this time, the voltage command value is applied to the plurality of cell inverters 360a with the same value, while the carrier for each of the plurality of cell inverters 360a generates a phase transition. Accordingly, the PWM control signals for each of the plurality of cell inverters 360a have different phases.

For example, the cell controller 330a can initialize an internal timer for PWM generation in synchronization with the synchronization command received from the main controller 310 via the CAN communication 320. [

The cell controller 330a outputs the PWM control signal for the first cell inverter #A01 without a phase delay. However, after the second cell inverter #A02, the cell controller 330a delays the phase using the internal timer and outputs the PWM control signal have.

Accordingly, the cell controller 330a multiplies the PWM control signal for the second cell inverter #A02 by 1/6 of the sampling period, the PWM control signal for the third cell inverter #A03 by 2/6 of the sampling period, The PWM control signal for the cell inverter (#A04) is set to 3/6 of the sampling period, the PWM control signal for the fifth cell inverter (#A05) is set to 4/6 of the sampling period, the PWM for the sixth cell inverter (#A06) The control signal can be output after delaying the phase by 5/6 of the sampling period.

As described above, when the PWM control signal is output, the cell inverters # A02 to # A06 except for the first cell inverter # A01 are caused to output a voltage value in excess of the voltage command value.

The cell controller 330a according to an exemplary embodiment of the present invention compensates the phase delay for the voltage command value calculated by the main controller 310 to solve the signal delay occurring in the output voltage.

Hereinafter, the cell controller 330a according to an embodiment of the present invention will be described in more detail with reference to FIG.

4 is a block diagram illustrating the cell controller of FIG.

4, a cell controller 330a according to an exemplary embodiment of the present invention includes a phase value detector 410, a signal delay value calculator 420, a phase delay value calculator 430, a phase value compensator 440, a final voltage command value calculation unit 450, a 2-phase to 3-phase conversion unit 460, and a PWM control signal generation unit 480. In one embodiment, the cell controller 330a may further include a cell voltage compensation unit 470. [

The phase value detector 410 detects the first phase value? Of the voltage command value received from the main controller 310.

The signal delay value calculator 420 calculates the signal delay value? _Delay between the PWM control signals output to the plurality of cell inverters 360a using Equation (1) below.

_Wherein T represents the signal delay value, T _s represents the sampling time, N represents the number of the cell inverters connected in series in one phase, and _e represents the angular velocity with respect to the grid voltage.

The signal delay value is generated by the phase transition of the carrier when generating the PWM control signal, and increases in proportion to the sampling time and the angular velocity with respect to the grid voltage.

The phase delay value calculator 430 calculates a phase delay value? _{Cell (k (k} )) for each of the plurality of cell inverters 360a using the signal delay value? _Delay calculated by the signal delay value calculator 420 _{) _delay} ).

More specifically, the phase delay value calculator 430 calculates the phase delay value? _{Cell (k) _delay} using Equation (2) below.

_{(K) _delay} represents a phase delay value of a Kth cell inverter, K represents an identification number of a cell inverter, and? _Delay represents a signal delay value.

Accordingly, the phase delay value? _{Cell (k) _delay} for each of the six cell inverters 360a included in the A phase can be calculated by Equation (3) below.

According to Equation (3), it can be seen that the phase delay value? _{Cell (k) _delay} for the six cell inverters increases in proportion to the identification number (K) of the cell inverter.

The phase value compensating unit 440 compensates the phase delay value calculated by the phase delay value calculating unit 430 to the first phase value? Of the voltage command value to calculate the second phase value? _K. The second phase value [theta] _K is calculated using the following equation (4).

Accordingly, the second phase value [theta] _K for each of the six cell inverters 360a included in the A phase can be calculated by Equation (5) below.

According to Equation (5), it can be seen that the phase delay values for the six cell inverters 360a included in the phase A are different from each other. Accordingly, the second phase values? _K are also different from each other.

The final voltage command value calculation unit 460 calculates a plurality of final voltage command values based on the second phase values calculated by the phase value compensation unit 450. [

,

을 아래 수학식 6에 대입하여 복수의 셀 인버터들(360a) 각각에 대한 최종 전압 지령값

,

을 산출한다.More specifically, the final voltage command value calculation unit 460 calculates the final voltage command value

,

To the following equation (6) to calculate the final voltage command value < RTI ID = 0.0 >

,

.

,

역시 서로 상이하게 된다.According to Equation (6), as the second phase values for the six cell inverters 360a included in the phase A are different from each other, the final voltage command value

,

Are also different from each other.

,

을 3상 정지좌표계

로 변환한다.The 2-phase to 3-phase converter 470 converts the final voltage command value

,

To a three-phase stationary coordinate system

.

The cell voltage compensating unit 470 calculates a cell compensation voltage reference value to compensate the final voltage instruction value in order to uniformly control the DC voltage of each of the plurality of cell inverters 360a connected in series on the A side.

More specifically, the cell voltage compensator 470 compares the DC voltage average value of the plurality of cell inverters 360a with the DC voltage of the individual cell inverter, and calculates the compensation power corresponding to the difference.

The cell voltage compensating unit 470 calculates the cell compensation voltage magnitude by dividing the compensation power by the rms value of the current sensed by the current sensor, and calculates the cell compensation voltage magnitude by multiplying the calculated cell compensation voltage magnitude by the in- The in-cell compensation voltage command value is calculated for each of the plurality of cell inverters 360a.

At this time, when the DC voltage of the corresponding cell inverter is higher than the DC voltage average value, the cell voltage compensator 470 calculates the cell compensation voltage command value that is opposite in phase to the current phase to the cell compensation voltage magnitude.

On the other hand, when the DC voltage of the corresponding cell inverter is lower than the DC voltage average value, the cell voltage compensator 470 calculates the cell compensation voltage command value that is in phase with the current phase in the cell compensation voltage magnitude.

The cell voltage compensation unit 470 compensates the cell compensation voltage command value to the final voltage command value and outputs the compensated voltage compensation value.

The PWM control signal generator 480 generates a PWM control signal using the final voltage command value and the DC voltage of the plurality of cell inverters 360a.

More specifically, the PWM control signal generator 480 generates a carrier having a magnitude corresponding to the DC voltage of the cell inverter, and compares the generated carrier with a final voltage command value to generate a PWM control signal.

The PWM control signal generator 480 generates a plurality of carriers for each of the plurality of cell inverters 360a included in the A phase, and the plurality of carriers are phase-shifted by the signal delay value calculated by Equation (1) A delay occurs.

The PWM control signal generator 480 outputs the PWM control signal to the cell inverter 360a to control the operation of the cell inverter 360a.

Referring again to FIG. 3, the plurality of cell inverters 360a to 360n constitute unit cells, and are connected in series with each other. That is, the multi-level inverter obtains a high voltage by connecting a plurality of cell inverters 360a to 360n in series for each phase.

In one embodiment, the plurality of cell inverters 360a to 360n may correspond to a single-phase H-bridge inverter configured with an IGBT (Insulated Gate Bipolar Mode Transistor).

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof.

For example, in FIG. 3, the cell controller 330a and the cell inverter 360a are connected by 1: n (for example, 1: 6), and one cell controller 330a controls the plurality of cell inverters 360a Respectively. However, in the modified embodiment, as shown in FIG. 5, the cell controller 330a and the cell inverter 360a are connected at a ratio of 1: 1, and one cell controller 330a is connected to one cell inverter 360a ). ≪ / RTI >

In FIG. 3, a plurality of cell inverters 360a included in each phase are controlled by one cell controller 330a. However, in the modified embodiment, as shown in FIG. 6, a plurality of cell controllers 330a may be included on one upper layer. For example, two cell controllers 330a may be included in one phase, and six cell inverters 360a may be connected to each cell controller 330a.

7 is a flowchart illustrating a method of controlling a multi-level inverter according to an embodiment of the present invention.

Referring to FIG. 7, first, the multi-level inverter control system 300 calculates a voltage command value for outputting a target current value to the system (S701). The multi-level inverter control system 300 calculates a voltage command value for outputting a desired current on the two-phase synchronous coordinate through the current controller.

Next, the multi-level inverter control system 300 converts the voltage command value on the two-phase synchronous coordinate into the two-phase stationary coordinate and outputs it to each cell controller (S702).

Next, the multi-level inverter control system 300 detects a first phase value of the draft command value and a phase delay value for each of the plurality of cell inverters 360 (S703).

In order to detect the phase delay value, the multi-level inverter control system 300 is based on the sampling time T _s , the number N of serially connected cell inverters in one phase and the angular speed ω _e on the grid voltage Lt; / RTI > At this time, the signal delay value is inversely proportional to the number N of the cell inverters, and has a value proportional to the sampling time T _s and the angular velocity ω _e . This can be expressed by the following equation (1).

The multi-level inverter control system 300 calculates different phase delay values for each of the plurality of cell inverters 360 using the calculated signal delay value. The multi-level inverter control system 300 calculates the phase delay value in proportion to the signal delay value and sequentially increases the multiple of the signal delay value. At this time, the multiple may correspond to the identification number (K) -1 of the cell inverter. This can be expressed by the following equation (2).

Next, the multi-level inverter control system 300 calculates a plurality of final voltage command values for each of the plurality of cell inverters 360 by compensating the phase delay value for the first phase value of the voltage command value (S704 and S705).

The multi-level inverter control system 300 calculates second phase values that compensate the phase delay value for each of the plurality of cell inverters 360 in the first phase value of the voltage command value. The multi-level inverter control system 300 determines the magnitude of the voltage command value and the second phase value as the final voltage command value.

Next, the multilevel inverter control system 300 converts the final voltage command value on the two-phase stationary coordinate into the three-phase stationary coordinate (S706).

Next, the multi-level inverter control system 300 generates a PWM control signal using the final voltage command value and the DC voltage of the plurality of cell inverters 360, and outputs the generated PWM control signal to the cell inverter (S707 ).

More specifically, the multi-level inverter control system 300 generates a carrier having a magnitude corresponding to the DC voltage of the cell inverter, and compares the generated carrier with a final voltage command value to generate a PWM control signal.

The multi-level inverter control system 300 generates a plurality of carriers for each of the plurality of cell inverters 360, and the plurality of carriers generates a phase delay by a signal delay value calculated by Equation (1).

Accordingly, the PWM control signals output to each of the plurality of cell inverters also have phase delay as much as the signal delay value. However, since the multi-level inverter control system 300 according to the embodiment of the present invention compensates for the phase value that has already been delayed to the final voltage command value, no phase delay occurs in the output voltage of the cell inverter.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit and scope of the present invention as set forth in the following claims It can be understood that

Claims (9)

A multi-level inverter in which a plurality of cell inverters are connected in series;
A main controller for calculating a voltage command value for outputting a target current value; And
A first phase value of the voltage command value and a phase delay value of an output voltage for each of the plurality of cell inverters is detected and the phase delay value for each of the plurality of cell inverters is set to the first phase value And a cell controller for calculating a compensated second phase value and calculating a plurality of final voltage command values for each of the plurality of cell inverters based on the second phase value,
Wherein the cell controller calculates the second phase value by adding the first phase value and the phase delay value to each of the plurality of cell inverters,
Wherein the cell controller compares a DC voltage average value of the plurality of cell inverters and a DC voltage of each of the plurality of cell inverters to calculate a compensation voltage value for compensating the difference and outputs the calculated compensation voltage value to the final voltage And a cell voltage compensating unit for compensating the reactive power by outputting the sum to the respective cell inverters in addition to the command value. A multilevel inverter in which a plurality of cell inverters are connected in series for each phase;
A main controller for calculating a voltage command value for outputting the target current value on the two-phase synchronous coordinate, and converting the calculated voltage command value into the two-phase stationary coordinate; And
A first phase value of the voltage command value and a phase delay value of an output voltage for each of the plurality of cell inverters is detected and the phase delay value for each of the plurality of cell inverters is set to the first phase value Calculates a plurality of final voltage command values for each of the plurality of cell inverters based on the second phase value, and outputs the plurality of final voltage command values as three-phase stationary coordinates And a cell controller for controlling each of the cell inverters,
Wherein the cell controller calculates the second phase value by adding the first phase value and the phase delay value to each of the plurality of cell inverters,
Wherein the cell controller compares a DC voltage average value of the plurality of cell inverters and a DC voltage of each of the plurality of cell inverters to calculate a compensation voltage value for compensating the difference and outputs the calculated compensation voltage value to the final voltage And a cell voltage compensating unit for compensating the reactive power by outputting the sum to the respective cell inverters in addition to the command value. 3. The apparatus of claim 1 or 2, wherein the cell controller comprises:
Equation

Wherein the signal delay value between the PWM (Pulse Width Modulation) control signals output to each of the plurality of cell inverters is calculated using the following equation, wherein θ _delay represents the signal delay value, and T _s represents a sampling time And N denotes the number of cell inverters connected in series in one phase. 4. The apparatus of claim 3, wherein the cell controller comprises:
Equation

_{(K) _delay} represents the phase delay value of the Kth cell inverter, K represents an identification number of the cell inverter, And the? _Delay represents the signal delay value. 3. The apparatus of claim 1 or 2, wherein the cell controller comprises:

,

To calculate the final voltage command value,

,

Represents the voltage command value,

,

Represents the final voltage command value for the Kth cell inverter,

Is a second phase value for a Kth cell inverter. delete Calculating a voltage command value for outputting the target current value on the two-phase synchronous coordinate, and converting the calculated voltage command value into the two-phase stationary coordinate;
A first phase value of the voltage command value converted into the two-phase stationary coordinate is calculated, a second phase value obtained by compensating the phase delay value to the detected first phase value is calculated, Calculating a plurality of final voltage command values for each of the plurality of cell inverters; And
And controlling the plurality of cell inverters for each phase by converting the plurality of final voltage command values into three-phase stationary coordinates,
Wherein the second phase value is calculated as a sum of the first phase value and the phase delay value in the step of calculating the plurality of final voltage command values,
Wherein the calculating of the plurality of final voltage command values comprises: comparing a DC voltage average value of the plurality of cell inverters and a DC voltage of each of the plurality of cell inverters and calculating a compensation voltage value for compensating the difference; And compensating the reactive power by outputting the calculated cell compensation voltage value to the plurality of cell inverters by summing the calculated cell compensation voltage value with the final voltage command value. 8. The method according to claim 7, wherein the calculating of the plurality of final voltage command values comprises:
Equation

And calculating a signal delay value between PWM (Pulse Width Modulation) control signals output to each of the plurality of cell inverters,
_Wherein, in the equation, θ _delay represents the signal delay value, T _s represents a sampling time, and N represents a number of cell inverters connected in series in one phase. 9. The method of claim 8,
Wherein the phase delay value corresponds to a multiple of the signal delay value and is proportional to the identification number of each cell inverter.

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