KR101552990B1 - Organic light emitting diode display device - Google Patents

Abstract

The present invention relates to an organic light emitting display capable of preventing image quality deterioration by maintaining a pulse width of a scan signal in an original state regardless of a frame frequency, and more particularly, to an organic light emitting display having a plurality of scan lines, a plurality of data lines, A display unit including pixels; A frame frequency controller for selecting one of a first frame frequency control signal and a second frame frequency control signal based on data signals from the outside and outputting the selected frame frequency control signal; And a second frame control unit for outputting a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputting a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit, An output section; And a second scan control signal output unit for sequentially outputting the A scan signals during the A frame period in response to the first scan control signal from the scan control signal output unit, And a gate driver for sequentially outputting scan signals; The B frame period is longer than the A frame period, and the width of the A scan signal and the pulse width of the B scan signal are the same.

An organic light emitting display, a scan signal, a frame period, a DRRS

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device capable of preventing image quality deterioration by maintaining a pulse width of a scan signal in an original state irrespective of a frame frequency.

In the liquid crystal display device, in order to lower the power consumption, a technique of lowering the frame frequency when the same image is held on the display part for a predetermined time is used. This technique is commonly called DRRS (Display, Refresh Rate Switching).

However, when such a DDRS technique is applied to an organic light emitting display device, the following problems arise.

That is, if the frame frequency of the display unit is reduced, the length of the frame period increases, and accordingly, the pulse width of the scan signal output in this frame period also increases. The value of the compensation voltage increases due to the increase of the pulse width of the scan signal, thereby decreasing the value of the drive current for driving the light emitting element. Then, the luminance of the display unit is reduced and the image quality is deteriorated.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an organic light emitting display device capable of preventing image quality deterioration by maintaining a pulse width of a scan signal in an original state irrespective of a frame frequency have.

According to an aspect of the present invention, there is provided an organic light emitting display including: a display unit including a plurality of scan lines, a plurality of data lines, and a plurality of pixels; A frame frequency controller for selecting one of a first frame frequency control signal and a second frame frequency control signal based on data signals from the outside and outputting the selected frame frequency control signal; And a second frame control unit for outputting a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputting a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit, An output section; And a second scan control signal output unit for sequentially outputting the A scan signals during the A frame period in response to the first scan control signal from the scan control signal output unit, And a gate driver for sequentially outputting scan signals; The B frame period is longer than the A frame period, and the width of the A scan signal and the pulse width of the B scan signal are the same.

Each pixel includes a pixel circuit for calculating a threshold voltage of a drive switching element in accordance with a scan signal from a scan line and generating a drive current based on the calculated threshold voltage and the data signal; And a light emitting element that emits light in accordance with a driving current from the pixel circuit.

And a dummy period corresponding to a difference between the B frame period and the A frame period is divided and located between adjacent scan signals.

And a dummy period corresponding to the difference between the B frame period and the A frame period is located between the start point of the B frame period and the output point of the first scan signal.

And a dummy period corresponding to a difference between the B frame period and the A frame period is located between the end point of the last scan signal and the end point of the B frame period.

And a frame frequency conversion unit for changing the frame frequency of the display unit in response to the first and second frame frequency control signals from the frame frequency control unit.

The organic electroluminescent display device according to the present invention has the following effects.

According to the present invention, even if the frame frequency is lowered, the pulse width of the scan signal output at this time is kept equal to the pulse width of the scan signal at the frame frequency of the normal steady state. Accordingly, since the sampling time can be maintained as it is, the increase of the compensation voltage (VDD-Vth) can be prevented and the driving current can be prevented from being reduced in size. As a result, the luminance can be prevented from lowering and the image quality can be improved.

1 is a view illustrating an organic light emitting display according to an embodiment of the present invention.

1, a liquid crystal display according to an exemplary embodiment of the present invention includes a display unit DP, a scan driver SD, a data driver DD, and a timing controller TC having a plurality of pixels PXL, .

The display unit DP includes a plurality of scan lines SL arranged in one direction and a plurality of data lines DL and a plurality of first drive voltage lines DPL1 crossing the scan lines SL do. Although not shown, a second driving voltage, which is transmitted through a plurality of second driving voltage lines, is supplied to each pixel PXL of the display unit DP.

The pixels PXL included in the display portion DP include a plurality of red pixels R for displaying a red image, a plurality of green pixels G for displaying a green image, And blue pixels (B).

The scan driver SD sequentially supplies scan signals to the scan lines SL so that the scan lines SL are sequentially driven. The scan driver SD drives each scan line SL for one horizontal period (one horizontal time). This one horizontal period corresponds to the pulse width of the scan signal.

The data driver DD supplies the data signal Vdata to each of the data lines DL every horizontal period. The driving power source for generating the first and second driving voltages includes a first driving voltage VDD and a second driving voltage line DPL1, And supplies the second driving voltage to the plurality of second driving voltage lines.

The timing controller TC generates various scan control signals necessary for generating a scan signal and supplies the generated scan control signals to the scan driver SD. The timing controller TC rearranges the data signals Vdata from the external system, .

Hereinafter, the structure of any one pixel PXL in the organic light emitting display according to the present invention will be described in more detail.

Fig. 2 is a diagram showing the structure of any one pixel (PXL) in Fig.

The pixel PXL includes a pixel driver circuit (PDC) and a light emitting element OLED, as shown in Fig.

The pixel driver circuit PDC receives a data signal Vdata from the data line DL in response to a scan signal from the scan line SL. A driving current corresponding to the magnitude of the data signal (Vdata) is generated using the first driving voltage (VDD) from the first driving voltage line (DPL1). To this end, the pixel driver circuit (PDC) includes a plurality of switching elements and capacitors therein.

The light emitting device OLED is an organic light emitting diode that generates light according to the driving current from the pixel driving circuit PDC and the light emitting device LED transmits the second driving voltage VSS The second driving voltage line PDL2 and the pixel driving circuit PDC. That is, the anode electrode of the light emitting element (LED) is connected to the pixel driving circuit (PDC), and the cathode electrode is connected to the second driving voltage line (PDL2).

The red pixel R includes a red light emitting element (LED) that emits red light, the green pixel G includes a green light emitting element (LED) that emits green light, and the blue pixel B includes a blue And a blue light emitting element (LED) for emitting light.

FIG. 3 is a diagram illustrating the components incorporated in the timing controller of FIG. 2. Referring to FIG.

The timing controller TC in the organic light emitting display according to an embodiment of the present invention includes a frame frequency controller (FRC), a scan control signal output unit (SCO), and a frame frequency converter (FRM). On the other hand, the frame frequency control unit, the scan control signal output unit, and the frame frequency conversion unit are not built in the timing controller, but may be separately provided outside.

The frame frequency control unit selects one of the first frame frequency control signal and the second frame frequency control signal based on data signals from the outside and outputs the selected signal. The second frame frequency control signal output from the frame frequency control unit is a signal for lowering the frame frequency of the display unit than normal. The frame frequency control unit may be embedded in the chipset installed in the main board of the external system. The first frame frequency and the second frame frequency control signal are output in a blank period located between adjacent frame periods. At this time, the frame frequency controller determines whether or not the same image is displayed for a predetermined time (preset frame period) based on the data signal supplied to the user. If it is determined that the same image is to be displayed for the predetermined time, Outputs a frame frequency control signal, and outputs a first frame frequency control signal when it is determined that the same image is not displayed for the predetermined time.

The scan control signal output unit outputs a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputs a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit do.

The frame frequency conversion unit changes the frame frequency of the display unit in response to the first and second frame frequency control signals from the frame frequency control unit. Here, the frame means one image displayed on the display unit DP, and the frame frequency means the number of frames driven per second.

4 is a diagram illustrating scan signals output from the scan driver of FIG.

As shown in FIG. 4, the scan driver sequentially outputs the A scan signals ASP1 to ASPn during the A frame period in response to the first scan control signal from the scan control signal output unit, And sequentially outputs the B scan signals BSP1 to BSPn during the B frame period in response to the second scan control signal from the output unit. At this time, the B frame period is longer than the A frame period, and the pulse width of the A scan signal and the pulse width of the B scan signal are the same. Here, the pulse width of the scan signal means a period during which the scan signal is maintained in the active state in order to turn on the switching element connected to the scan line. In FIG. 4, a period during which the scan signal remains in the low state Means the pulse width of the scan signal. Although not shown, if the active state of a scan signal for turning on a switching element connected to a scan line is defined as a high state, the pulse width of the scan signal described above means a period in which the scan signal remains high do.

The scan driver drives the scan lines using the A scan signals during a period in which the display unit normally displays an image, whereas when the same image is displayed on the display unit for a predetermined frame period, the scan driver uses B scan signals instead of A scan signals And drives the scan lines.

In order to reduce the power consumption of the organic light emitting display device, the display unit is driven using a frame frequency lower than a normal frame frequency when the same image is retained during a feature frame period set in advance on the display unit. Generally, as the frame frequency decreases, the pulse width of the scan signal increases. As the pulse width of the scan signal increases, the sampling time increases and the compensation voltage (VDD-Vth) increases. The value of the driving current flowing through the driven switching element is reduced. Then, the luminance of the display unit is lowered, and the picture quality is deteriorated. Here, Vth means the threshold voltage of the driving switching element.

In order to solve the above-described problem, the present invention maintains the pulse width of the scan signal output at this time to be equal to the pulse width of the scan signal at the frame frequency of the normal steady state, even if the frame frequency becomes low. However, when the display section is driven at a frame frequency lower than the frame frequency of the normal state, the length of one frame period (A frame period) when the display section is operated at the frame frequency of the normal state Therefore, when the pulse width of the A scan signal and the pulse width of the B scan signal are kept the same, an extra period, that is, a dummy period in which no scan signal is generated is generated in the B frame period. This dummy period is a period corresponding to a length obtained by subtracting the length corresponding to the A frame period from the length corresponding to the B frame period.

At this time, as shown in FIG. 4, the dummy period may be divided among adjacent scan signals. That is, the dummy period may be divided into a plurality of unit dummy periods, and each unit dummy period is located between two adjacent scan signals.

FIG. 5 is a diagram illustrating another form of the B scan signal output from the scan driver of FIG. 1. As shown in FIG. 5, the dummy period is between the start time of the B frame period and the output time of the first B scan signal .

FIG. 6 is a diagram illustrating another form of the B scan signal output from the scan driver of FIG. 1. As shown in FIG. 6, the dummy period is a period between the end of the last scan signal and the end of the B frame period .

As described above, in the present invention, even if the frame frequency is low, the pulse width of the scan signal output at this time is kept equal to the pulse width of the scan signal at the frame frequency of the normal steady state, .

The above-described pixel circuit can have the following configuration.

7 is a diagram showing a structure of a pixel circuit according to the first embodiment.

7, the pixel circuit of the first embodiment includes a driving switching element Tr_Dr, a compensation switching element Tr_Com, a light emission control switching element Tr_EM, a first switching element Tr1, (Tr2) and a storage capacitor (Cst).

The driving switching element is controlled according to the voltage of the first node N1 and is connected between the first driving voltage line and the second node N2.

The compensation switching element is controlled according to a scan signal (A scan signal or B scan signal) from the B scan line (SLB), and is connected between the first node and the second node.

The light emission control switching element is controlled in accordance with the light emission control signal from the light emission control line (EL), and is connected between the second node and the anode electrode of the light emission element.

The first switching element is controlled according to a scan signal (A scan signal or B scan signal) from the A scan line (SLA), and is connected between the data line and the third node (N3).

The second switching element is controlled in accordance with the emission control signal from the emission control line, and is connected between the reference voltage transmission line and the third node. A reference voltage Vref is supplied to the reference voltage transmission line.

The storage capacitor is connected between the first node and the third node.

The scan signal (A scan signal or B scan signal) supplied to the compensation switching element and the scan signal (A scan signal or B scan signal) supplied to the first switching element may be signals of the same type without phase difference, May be another signal having a phase difference of?

8 is a diagram showing a structure of a pixel circuit according to the second embodiment.

8, the pixel circuit of the second embodiment includes a driving switching element Tr_Dr, a compensation switching element Tr_Com, a light emission control switching element Tr_EM, a first switching element Tr1, (Tr2), a first storage capacitor (Cst1), and a second storage capacitor (Cst2).

The driving switching element is controlled according to the voltage of the first node, and is connected between the first driving voltage line and the second node.

The compensation switching element is controlled according to a scan signal (A scan signal or B scan signal) from the B scan line, and is connected between the first drive voltage line and the first node (N1).

The light emission control switching element is controlled in accordance with the light emission control signal from the light emission control line, and is connected between the second node N2 and the anode electrode of the light emitting element OLED.

The first switching element is controlled according to a scan signal (A scan signal or B scan signal) from the kth scan line (SLk), and is connected between the data line (DL) and the third node.

The second switching element is controlled according to a scan signal (A scan signal or B scan signal) from the (k-1) th scan line (SLk-1) and is connected between the sustain voltage transmission line and the third node. The holding voltage (Vsus) is supplied to the holding voltage transmission line.

Is controlled in accordance with the emission control signal from the emission control line, and is connected between the reference voltage transmission line and the third node. A reference voltage Vref is supplied to the reference voltage transmission line.

The first storage capacitor is connected between the first node and the third node (N3).

The second storage capacitor is connected between the third node and the first drive voltage line.

As described above, conventionally, when the frame frequency decreases, the frame period increases, and accordingly, the pulse width of the scan signal also increases. Therefore, the length of the sampling period occupying approximately 30% of the pulse width section increases, and the compensation voltage (VDD-Vth) of the first node increases. As a result, the driving current The current value is decreased. However, in the present invention, even if the frame frequency is decreased, the above-described problem can be prevented by keeping the pulse width of the B scan signal as it is. Here, Vth means the threshold voltage of the driving switching element.

In the present invention, the emission control signal can be controlled in the same manner as the B scan signal described above. That is, the emission control signal is a signal having a waveform in which the phase is inverted with respect to the scan signal, and the emission control signals supplied to the respective pixels are also in phase with respect to the A scan signal as shown in FIG. And the phase of the B scan signal may be inverted with respect to the B scan signal as shown in FIG.

In addition, the emission control signals supplied to each pixel may have a phase inverted with respect to the B scan signal as shown in FIG. 5 in the B frame period.

In addition, the emission control signals supplied to the respective pixels may have a phase inverted with respect to the B scan signal as shown in FIG. 6 in the B frame period.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

1 is a view illustrating an organic light emitting display device according to an embodiment of the present invention.

Fig. 2 is a diagram showing the structure of any one pixel in Fig. 1

3 is a diagram showing the components incorporated in the timing controller of FIG. 2;

4 is a diagram showing a scan signal output from the scan driver of FIG. 1;

FIG. 5 is a diagram showing another form of the B scan signal output from the scan driver of FIG. 1; FIG.

6 is a diagram showing another form of the B scan signal output from the scan driver of FIG.

7 is a diagram showing the structure of a pixel circuit according to the first embodiment

8 is a diagram showing the structure of a pixel circuit according to the second embodiment

Claims (6)

A display unit including a plurality of scan lines, a plurality of data lines, emission control lines, and a plurality of pixels; A frame frequency controller for selecting one of a first frame frequency control signal and a second frame frequency control signal based on data signals from the outside and outputting the selected frame frequency control signal; And a second frame control unit for outputting a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputting a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit, An output section; And a scan control signal output unit for sequentially outputting the A scan signals during the A frame period in response to the first scan control signal from the scan control signal output unit, And a gate driver for sequentially outputting scan signals; The B frame period is longer than the A frame period, the width of the A scan signal is equal to the pulse width of the B scan signal, Wherein the emission control signal supplied from the emission control lines has a waveform in which the phase is inverted with respect to the A scan signal or the B scan signal. The method according to claim 1, Each pixel includes a pixel circuit for calculating a threshold voltage of a drive switching element in accordance with a scan signal from a scan line and generating a drive current based on the calculated threshold voltage and the data signal; And a light emitting element that emits light in accordance with a driving current from the pixel circuit. The method according to claim 1, And a dummy period corresponding to a difference between the B frame period and the A frame period is divided between adjacent scan signals. A display unit including a plurality of scan lines, a plurality of data lines, emission control lines, and a plurality of pixels; A frame frequency controller for selecting one of a first frame frequency control signal and a second frame frequency control signal based on data signals from the outside and outputting the selected frame frequency control signal; And a second frame control unit for outputting a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputting a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit, An output section; And a scan control signal output unit for sequentially outputting the A scan signals during the A frame period in response to the first scan control signal from the scan control signal output unit, And a gate driver for sequentially outputting scan signals; The B frame period is longer than the A frame period, the width of the A scan signal is equal to the pulse width of the B scan signal, And a dummy period corresponding to a difference between the B frame period and the A frame period is located between a start time point of the B frame period and an output time point of the first scan signal. A display unit including a plurality of scan lines, a plurality of data lines, emission control lines, and a plurality of pixels; A frame frequency controller for selecting one of a first frame frequency control signal and a second frame frequency control signal based on data signals from the outside and outputting the selected frame frequency control signal; And a second frame control unit for outputting a first scan control signal in response to a first frame frequency control signal from the frame frequency control unit and outputting a second scan control signal in response to a second frame frequency control signal from the frame frequency control unit, An output section; And a scan control signal output unit for sequentially outputting the A scan signals during the A frame period in response to the first scan control signal from the scan control signal output unit, And a gate driver for sequentially outputting scan signals; The B frame period is longer than the A frame period, the width of the A scan signal is equal to the pulse width of the B scan signal, Wherein a dummy period corresponding to a difference between the B frame period and the A frame period is located between the end point of the last scan signal and the end point of the B frame period. The method according to claim 1, And a frame frequency conversion unit for changing the frame frequency of the display unit in response to the first and second frame frequency control signals from the frame frequency control unit.

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