KR101521470B1 - Method for substantially uniform copper deposition onto semiconductor wafer - Google Patents

Abstract

Disclosed are methods for performing in an electrochemical deposition apparatus having two or more electrodes as described in the foregoing inventions. These methods produce a uniform copper film having a WFNU of 2.5% or less on semiconductor wafers containing a resistive copper seed layer having a thickness of 50-900 A in a copper sulfate basic electrolyte having a conductivity of 0.02 to 0.8 S / cm do.

Description

[0001] METHOD FOR SUBSTANTIALLY UNIFORM COPPER DEPOSITION ONTO SEMICONDUCTOR WAFER [0002]

The present invention relates generally to an electrochemical deposition process for electrochemically preparing a uniform copper film on a semiconductor substrate containing a thin resistive seed layer as part of an interconnect configuration in ULSI (Very Large Scale Integration) circuit fabrication .

Semiconductor devices are fabricated or fabricated on semiconductor wafers using a number of different processing steps to form transistors and interconnection elements. Upon formation of device elements, the semiconductor wafers may be subjected to, for example, masking, etching, and deposition processes to form semiconductor transistors and the required electronic circuitry for connection to such transistor terminals. In particular, multiple masking, ion implantation, annealing, and the like are used to form connection line structures such as shallow trenches, transistor wells, gates, poly-silicon lines, and vias and trenches. Plasma etching and chemical and physical vapor deposition steps may be performed.

After vias and trenches are formed, a conductive material is deposited into this structure to electrically connect beneath the transistor. The excess conductive material is then removed to form a conductive structure within the next required network. When forming a conductive line during ULSI (Very Large Scale Integration) circuit fabrication, electrochemical deposition of a metal layer, which is predominantly copper on a substrate containing a thin resistive seed layer, is performed. This deposition process can be used to fill a via structure, a trench structure, or a combination thereof. When these structures are filled, copper is continuously deposited to form a film that covers the surface of the semiconductor wafer. Since subsequent processing steps, such as the planarization step (CMP), generally require a high level of uniformity in order to achieve equivalent electrical performance from the device to the device at the terminals of the product line in order to remove excess conductive copper, The final copper film is important. The film non-uniformity (WFNU), which is the ratio of the basic deviation of the film thickness to the average film thickness, is generally controlled to be below 2.5% in the improved processing technique.

The large WFNU has a negative effect on subsequent CMP processing steps through either local Cu residual or excess dielectric material loss after the end of Cu polishing. If the same amount of Cu is evenly removed across the wafer during polishing, the initial thicker Cu film surrounding the periphery of the wafer will cause Cu or barrier residues to remain there, and this incomplete removal process will result in an electrical short of the device . If a large amount of over-polishing is applied to remove the Cu or barrier material on the wafer periphery, the excess sulfur loss of the dielectric material will cause the area near the wafer center, the interconnect line across the wafer Resulting in different electrical resistances. Both effects can substantially affect the yield of the device.

The ohmic resistance of the seed layer on the surface of the semiconductor wafer significantly increases as the wafer size moves from 200 mm to 300 mm, and all generations of the manufacturing technology are improved to continuously decrease the seed layer thickness. In conventional electrochemical deposition processes, sometimes referred to as plating, a power source supplies an electrical current or potential to a wafer surface that holds a single working electrode and seed layer. The wafer substrate, working electrode, power supply, and electrolyte form an electrolytic cell. The current density across the resistive seed layer is nonuniform and becomes higher around the substrate due to a phenomenon called "terminal effect ". This current unevenness causes a higher plating rate at the edge of the semiconductor wafer and a lower plating rate at the center of the semiconductor wafer, resulting in a uniform thickness of the copper film deposited on the surface of the semiconductor wafer. Terminal effects are more pronounced in smaller seed layer thicknesses and larger wafer sizes. In the most severe embodiment, deposition occurs only around the wafer.

As shown in Figures 3a-3d, the terminal effect can be reduced by using an electrolyte solution having a relatively lower acid content. However, with advances in technology, low acid electrolytes alone can not resolve non-uniform plating as a result of the terminal effect. As shown in Figures 3c-3d, this non-uniformity can often be improved by doing films with higher thicknesses; This severely limits the productivity of the processing equipment and greatly increases the cost of removing excess material in the subsequent planarization step.

In earlier patents, designs addressed within processing devices have been incorporated to address the non-uniformity problems caused by terminal effects. U.S. Patent No. 6,391,166 (Jan. 15, 1999) discloses a plating apparatus and method that utilizes independent power regulation wherein the system of electrodes overcomes a non-uniform plating rate on a semiconductor wafer with a very thin seed layer. U.S. Patent No. 6,755,954 (Jan. 29, 2001) discloses an electroplating apparatus and method of copper film having a relatively small thickness deviation. This shows an example of forming a 0.6 탆 (6000 Å) copper film having a thickness variation of 394 Å on a 300 mm wafer containing a 400 Å thick seed layer.

The present invention discloses a method applied to an electrochemical deposition apparatus having multiple electrodes and a system of electric power control. Such a device is referred to as "the device" through the documents and drawings in the present invention. Examples of such devices are described in the aforementioned U.S. Patent No. 6,391,166 and PCT Patent Application No. PCT / CN2007 / 071008.

The disclosed method is applied to plating wafers containing a seed layer having a thickness of 50 to 900 A in a basic copper sulfate electrolyte having a conductivity in the range of 0.02 to 0.8 S / cm.

The disclosed method produces an electrochemically plated copper film within film unevenness as small as 0.33% (a deviation of 42 ANGSTROM) on a 350Å seed layer, with fewer recoveries than those disclosed in the preceding patents.

Figure 1 schematically depicts the device in the prior invention in which the method is performed.
Figure 2 is a schematic representation of a portion of a single-electrode plating apparatus.
Figures 3a-3d show the deposition profiles from a single-electrode plating apparatus.
4 is a schematic view of a portion of a plating apparatus having two electrodes disclosed in the foregoing invention.
5A and 5B show waveform diagrams applied to the two electrode plating apparatuses.
6A and 6B show deposition profiles from two electrode devices.
7 is a schematic view of a portion of a plating apparatus having three electrodes as disclosed in the foregoing invention.
8A and 8B show waveform diagrams applied to the three electrode plating apparatuses.
Figures 9a and 9b show the deposition profiles from three electrode devices.
10 is a schematic view of a portion of a plating apparatus having four electrodes disclosed in the foregoing invention.
11A and 11B show waveform diagrams applied to four electrode plating apparatuses.
12A and 12B show deposition profiles from four electrode devices.
Figure 13 shows the deposition profile from a de-electrode device.
Figure 14 shows the predicted deposition profile.

The present invention discloses a method applied to an electrochemical deposition apparatus having a system of multi-electrode and electric power source control. The disclosed method is applied to plating a wafer containing a seed layer having a thickness of 50 to 900 ANGSTROM in a copper sulfate basic electrolyte having a conductivity in the range of 0.02 to 0.8 S / cm. The disclosed method is carried out in an apparatus as recited in U.S. Patent No. 6391166. [

The method of the present invention comprises:

Introducing a basic copper sulfate basic electrolyte into the apparatus at an inlet rate of 1 to 20 LPM;

Transferring a semiconductor wafer to a semiconductor wafer holder having an electrically conductive path to the wafer;

Supplying a small bias voltage to the wafer;

Withdrawing the wafer into the electrolytic solution, and completely contacting the entire surface of the wafer with the electrolytic solution;

Supplying an electric current to each electrode; A power supply step associated with the electrode switch from a constant voltage mode to a constant current mode at a required time;

Providing a relatively small current or potential on each electrode, wherein the combinded current is between 2 and 10 A and the ratio of current density between the electrodes is between 0.5: 1 and 300: 1;

Providing a relatively large current or potential on each electrode, wherein the combinded current is between 10 and 40 A and the ratio of current density between the electrodes is between 0.5: 1 and 300: 1;

Switching the power supply to a small bias voltage mode and applying it to the semiconductor wafer;

And recovering the wafer from the outside of the electrolytic solution.

Stopping the power supply and cleaning the remaining electrolyte on the wafer surface.

In the above steps 6 and 7, the ratio of the current distribution on each electrode to the current density between the electrodes varies in the narrowed range depending on the number of electrodes used and the conductivity of the electrolyte. In a subsequent embodiment, this range is specified for a particular number of electrodes and for devices having a particular electrolyte conductivity.

In one embodiment, a method applied to the apparatus comprising two electrodes having an electrolyte conductivity of 0.02 to 0.2 S / cm is disclosed.

In one embodiment, a method applied to the apparatus comprising two electrodes having an electrolyte conductivity of 0.2 to 0.8 S / cm is disclosed.

In one embodiment, a method applied to the apparatus comprising three electrodes having an electrolyte conductivity of 0.02 to 0.2 S / cm is disclosed.

In one embodiment, a method applied to the apparatus comprising three electrodes having an electrolyte conductivity of 0.2 to 0.8 S / cm is disclosed.

In one embodiment, a method applied to the apparatus comprising four electrodes having an electrolyte conductivity of 0.02 to 0.2 S / cm is disclosed.

In one embodiment, a method applied to the apparatus comprising four electrodes having an electrolyte conductivity of 0.2 to 0.8 S / cm is disclosed.

In one embodiment, a method applied to the apparatus is disclosed that includes a tenor electrode having an electrolyte conductivity of 0.02 to 0.2 S / cm.

In one embodiment, a method applied to the apparatus is disclosed that includes a tenor electrode having an electrolyte conductivity of 0.2 to 0.8 S / cm.

A conventional plating apparatus having a single electrode 201 is shown in Fig. Figures 3a-3d are deposition profiles on the surface of a 300 mm semiconductor wafer with the single-electrode electroplating apparatus. More specifically, Figures 3a and 3b show the deposition profile of a 3000 A thick film on the semiconductor with a seed layer thickness varying from 350 A to 900 A in a low and high conducting electrolyte, respectively, whereas Figures 3C and 3D show the deposition profiles Lt; RTI ID = 0.0 > 3000A < / RTI > to 6000A on the semiconductor with a 350A thick seed layer in a low and high conducting electrolyte.

The WFNU values calculated from the thickness profiles in FIGS. 3A-3D are shown in Table 1. The WFNU value, which indicates a significant difficulty in depositing a uniform Cu film on the surface of a semiconductor wafer when the seed layer is thin, increases with decreasing thickness of the seed layer. And, if the thickness of the seed layer is less than 700 ANGSTROM, a WFNU value of less than 2.5% can no longer be achieved by conventional electroplating with a single electrode. This situation deteriorates as the conductivity of the electrolyte increases.

Seed layer thickness Electrolyte-WFNU High Conductivity Electrolyte - WFNU 350 Å 3.72% 13.91% 550 Å 2.95% 11.45% 700 Å 2.58% 10.19% 900 Å 2.21% 8.94%

As shown in FIGS. 3C-3D, on the same 350 A-thick seed layer, the WFNU is improved as the plating degree increases. The corresponding values are shown in Table 2 and this effect is due to the fact that the reduced ohmic resistance of the thickened film reduces the terminal effect during the deposition process. The WFNU value is greater than 2.5% at plating thicknesses of less than 5000 ANGSTROM and much greater than 2.5% in embodiments of high conductivity electrolytic solutions. The increased plating thickness can further improve the WFNU, but the high cost associated with removing this excess plated Cu in subsequent CMP steps of the IC process flow prohibits depositing a very thick film.

Deposition thickness Electrolyte-WFNU High Conductivity Electrolyte - WFNU 3000 Å 3.72% 13.91% 4000 Å 2.98% 11.25% 5000 Å 2.48% 9.93% 6000 Å 2.12% 8.83%

In the present invention, a thinner seed (350 ANGSTROM) and a plating thickness (3000 ANGSTROM) are used in all future analyzes. This combination gives a high sensitivity of the disclosed methods.

Embodiment 1

In one embodiment of the present invention, the disclosed method for uniform deposition of a copper film on the surface of a semiconductor wafer performed in the apparatus shown in Fig. 4 is an embodiment of the invention shown in Fig. 1; The device comprises a first electrode 401a and a second electrode 401b which can be positioned at the same or different vertical heights, and the area of the first electrode is 50 to 90% of the entire area of all the electrodes, The ratio of the total area of all the electrodes to the area of the electrode is greater than 0.85. The method comprises a set of the following steps:

Step 1: open the flow controllers 423a and 423b for controlling the flow rate individually in the operating region for each electrode; The flow rate in the operating range of 401a is in the range of 5 to 20 LPM and in the operating range of 401b is 1 to 15 LPM. In one embodiment of the invention, the flow controllers 423a, 423b are operated simultaneously. In another embodiment of the present invention, the flow controllers 423a, 423b are operated at different times.

Step 2: transferring the semiconductor wafer containing the seed layer to the wafer holder 421 in the apparatus; The wafer holder has an electrically conductive path in contact with the seed layer of the semiconductor wafer.

Step 3: Supply a small bias voltage within the range of 0.01 to 10 V to the semiconductor wafer.

Step 4: The semiconductor wafer is brought into contact with the electrolytic solution and fixed by the wafer holder until the entire surface of the wafer is precipitated in the electrolytic solution.

Step 5: A current is supplied to the electrodes 401a and 401b, and positive and negative potentials are maintained on the electrode 401a and the electrode 401b, respectively (the indication of the potential on each electrode is defined relative to the wafer through the body) do); The operating current of the electrode 401a is 5 to 20 A and the operating current of the electrode 401b is 0.01 to 10 A. The ratio of the current density on the electrode 401a to the electrode 201b is 1: 1 to 300: 1. This step lasts for 5 to 30 seconds to fill the vias and trenches on the surface of the semiconductor wafer 422. In one embodiment of the present invention, the power supply associated with electrodes 401a and 401b switches simultaneously in a constant voltage mode to a constant current mode. In another embodiment of the invention, the power supply associated with electrodes 401a and 401b switches at a constant voltage mode and at a different time in a constant current mode.

Step 6: The power supply connected to the electrodes 401a and 401b controls the positive potential on the electrode 401a and the positive or negative potential on the electrode 401b; The operating current on the electrode 401a is 15 to 40 A and the operating current on the electrode 401b is 0.01 to 20 A. [ The ratio of the current density on the electrode 401a to the electrode 401b is 1: 1 to 300: 1. This step increases the efficiency of the electrochemical deposition by applying a relatively large electrical current on the electrodes 401a and 401b. This step ends when the required deposition thickness is achieved.

Step 7: Supplying a small bias voltage on the semiconductor wafer. In one embodiment of the invention, electrodes 401a and 401b are simultaneously switched to a constant voltage mode in constant current mode. In another embodiment of the present invention, electrodes 401a and 401b are switched at a constant current mode and at a different time to a constant voltage mode.

Step 8: The semiconductor wafer is recovered to the outside of the electrolyte and the remaining electrolytic nuclei left on the wafer surface are spun off.

In the above steps 5 and 6, the indication of the potential on the electrode 401b is determined as a positive or negative potential based on the electrochemical deposition condition. For example, as shown in FIG. 5A, if the conductivity of the electrolyte is low and the conductive layer on the semiconductor wafer is thick, a positive potential is applied to both electrodes 401a and 401b; As shown in Fig. 5B, when the conductivity of the electrolytic solution is high and the conductive layer on the wafer is thin, a positive potential is applied to the electrode 401a and a negative potential is applied to the electrode 401b.

The current density used in the fifth step of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 200-2000 A thickness in an electrolyte solution having a conductivity of 0.02-0.2 S / cm and a conductivity of 0.2-0.8 S / A detailed set of ratios and potential indications on individual electrodes are shown in Table 3:

The display of the electrode 201a The display of the electrode 201b Current density ratio
(201a: 201b) Conductivity
0.02 to 0.2 S / cm + + 1: 1 to 30: 1 + - 15: 1 to 30: 1 Conductivity
0.2 to 0.8 S / cm + - 2: 1 to 15: 1

Step 6 begins when the plated thickness of the Cu film reaches 1500 Å. The current density used in step 6 of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 200-2000 A thickness in an electrolyte solution having a conductivity of 0.02-0.2 S / cm and a conductivity of 0.2-0.8 S / And a detailed set of potential indications on the individual electrodes are shown in Table 4. < tb > < TABLE >

The display of the electrode 201a The display of the electrode 201b Current density ratio
(201a: 201b) Conductivity
0.02 to 0.2 S / cm + + 1: 1 to 30: 1 + - 15: 1 to 30: 1 Conductivity
0.2 to 0.8 S / cm + - 10: 1 to 20: 1

Figures 6A and 6B show the deposition profiles of a 3000 A thick film deposited on a 350 A seed layer in a low and high conducting electrolyte, respectively; The profile of Method 2 was obtained with processing parameters out of the range defined in Tables 3 and 4, while the profile of Method 1 was obtained with the processing parameters shown in Tables 3 and 4. The WFNU values are shown in Table 5. As shown in FIGS. 6A to 6B and Table 5, the method disclosed in both low and high conductivity electrolytes greatly improves the WFNU of the deposited 3000 A film. The WFNU value of the profile on the surface of a 300 mm semiconductor wafer is obtained by subtracting 2.3 mm from the edge and is more aggressive compared to conventional practices that exclude 3.0 to 6.5 mm from the edge of the wafer.

Method 1 (disclosed) -WFNU Method 2 (conventional) -WFNU Also, 2.35% 3.65% High conductivity electrolyte 7.44% 12.94%

The disclosed method (Method 1) significantly improved WFNU compared to the conventional method (Method 2) in both low and high conductivity electrolytes. In embodiments of the low conductivity electrolyte, a WFNU of less than 2.5% is obtained.

Embodiment 2

In one embodiment of the present invention, the disclosed method for uniform deposition of a copper film on the surface of a semiconductor wafer performed in the apparatus shown in Figure 7 is an embodiment of the invention shown in Figure 1; The apparatus includes a first electrode 701a, a second electrode 701b, and a third electrode 701c that can be positioned at the same or different vertical heights, and the region of the first electrode is divided into 40 To 60%, and the ratio of the total area of all the electrodes to the area of the semiconductor wafer is larger than 0.85. The method comprises a set of the following steps:

Step 1: opening the flow controllers 723a, 723b and 723c for individually controlling the flow rate in the operating region for each electrode; The flow rate in the operating range of 701a is in the range of 5 to 20 LPM, 5 to 20 LPM in the operating range of 701b, and 1 to 15 LPM in the operating range of 701c. In one embodiment of the invention, the flow controllers 723a, 723b and 723c are operated simultaneously. In yet another embodiment of the present invention, the flow controllers 723a, 723b, and 723c are operated at different times.

Step 2: transferring the semiconductor wafer containing the seed layer in the apparatus to the wafer holder 721; The wafer holder has an electrically conductive path in contact with the seed layer of the semiconductor wafer.

Step 3: Supplying a small bias voltage in the range of 0.01 to 10 V to the semiconductor wafer.

Step 4: The semiconductor wafer is brought into contact with the electrolytic solution and fixed by the wafer holder until the entire surface of the wafer is completely settled in the electrolytic solution.

Step 5: Supply current to electrodes 701a, 701b and 701c, maintain positive potential on electrodes 701a and 701b and positive or negative potential on electrode 701c; The operating current of the electrode 701a is 2 to 20 A, the operating current of the electrode 701b is 0.01 to 20 A, and the operating current of the electrode 701 c is 0.01 to 20 A. The ratio of the current density on the electrode 701a to the electrode 701b is 1: 1 to 50: 1 and the ratio of the current density on the electrode 701a to the electrode 701c is 1: 1 to 300: to be. This step lasts for 5 to 30 seconds to fill the vias and trenches on the surface of the semiconductor wafer 722. In one embodiment of the present invention, the power supply associated with electrodes 701a, 701b, and 701c simultaneously switches to a constant current mode in a constant voltage mode. In another embodiment of the present invention, the power supply associated with electrodes 701a, 701b and 701c switches at a constant voltage mode and at a different time in a constant current mode.

Step 6: The power supply connected to the electrodes 701a, 701b and 701c controls the positive potential on the electrodes 701a and 701b and the positive or negative potential on the electrode 701c; The operating current on the electrode 701a is 4 to 30 A, the operating current on the electrode 701b is 4 to 30 A and the operating current on the electrode 701 c is 0.1 to 20 A. The ratio of the current density on the electrode 701a to the electrode 701b is 1: 1 to 50: 1 and the ratio of the current density on the electrode 701a to the electrode 701c is 1: 1 to 300: 1 . This step increases the efficiency of the electrochemical deposition by applying a relatively large electrical current on the electrodes 701a, 701b and 701c. This step ends when the required deposition thickness is achieved.

Step 7: Supplying a small bias voltage on the semiconductor wafer. In one embodiment of the invention, electrodes 701a, 701b, and 701c are simultaneously switched to a constant voltage mode in constant current mode. In another embodiment of the present invention, electrodes 701a, 701b and 701c are switched at a constant current mode and at a different time in a constant voltage mode.

Step 8: The semiconductor wafer is recovered to the outside of the electrolyte and the remaining electrolytic nuclei left on the wafer surface are spun off.

In the 5th and 6th steps, the indication of the potential on the electrode 701c is determined to be positive or negative based on the electrochemical deposition condition. For example, as shown in Fig. 8A, if the conductivity of the electrolyte is low and the conductive layer on the semiconductor wafer is thick, a positive potential is applied to both electrodes 701a, 701b and 701c; As shown in Fig. 8B, when the conductivity of the electrolytic solution is high and the conductive layer on the wafer is thin, positive potential is applied to the electrodes 701a and 701b, and negative potential is applied to the electrode 701c.

The current density used in the fifth step of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 150 to 2000 占 thickness in an electrolyte solution having a conductivity of 0.02 to 0.2 S / cm and an electric conductivity of 0.2 to 0.8 S / A detailed set of ratios and potential indications on individual electrodes are shown in Table 6:

The display of the electrode 301a The display of the electrode 301b The display of the electrode 301c Current density ratio (301a: 301b) (301a: 301c) Conductivity
0.02 to 0.2 S / cm + + + 1: 1 to 2: 1 1: 1 to 300: 1 + + - 1: 1 to 2: 1 10: 1 to 40: 1 Conductivity
0.2 to 0.8 S / cm + + - 5: 1 to 20: 1 2: 1 to 10: 1

Step 6 begins when the plated thickness of the Cu film reaches 1500 Å. The current density used in step 6 of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 150-2000 A thickness in an electrolyte solution having a conductivity of 0.02-0.2 S / cm and a conductivity of 0.2-0.8 S / The detailed set of ratios and potential indications on individual electrodes are shown in Table 7:

The display of the electrode 301a The display of the electrode 301b The display of the electrode 301c Current density ratio (301a: 301b) (301a: 301c) Conductivity
0.02 to 0.2 S / cm + + + 1: 1 to 2: 1 1: 1 to 300: 1 + + - 1: 1 to 2: 1 50: 1 to 300: 1 Conductivity
0.2 to 0.8 S / cm + + - 1: 1 to 2: 1 20: 1 to 80: 1

Figures 9a and 9b show deposition profiles of a 3000 A thick film deposited on a 350 A seed layer in a low and high conducting electrolyte, respectively; The profile of Method 2 was obtained with processing parameters out of the range defined in Tables 6 and 7, while the profile of Method 1 was obtained with the processing parameters shown in Tables 3 and 4. The WFNU values are shown in Table 8. As shown in FIGS. 9A-9B and Table 8, the method disclosed in both low and high conductivity electrolytes greatly improves the WFNU of deposited 3000 A films. The WFNU value of the profile on the surface of a 300 mm semiconductor wafer is obtained by subtracting 2.3 mm from the edge and is more aggressive compared to conventional practices that exclude 3.0 to 6.5 mm from the edge of the wafer.

Method 1 (disclosed) -WFNU Method 2 (conventional) -WFNU Also, 0.54% 2.81% High conductivity electrolyte 1.52% 8.55%

The disclosed method (Method 1) significantly improved WFNU compared to the conventional method (Method 2) in both low and high conductivity electrolytes. In embodiments of the low conductivity electrolyte, a WFNU of less than 2.5% is obtained.

Embodiment 3

In one embodiment of the present invention, the disclosed method for uniform deposition of a Cu film on the surface of a semiconductor wafer performed in the apparatus shown in Fig. 10 is an embodiment of the invention shown in Fig. 1; The device comprises a first electrode 1001a, a second electrode 1001b, a third electrode 1001c and a fourth electrode 1001d which can be positioned at the same or different vertical heights, Is 30 to 50% of the total area of all the electrodes, and the ratio of the total area of all the electrodes to the area of the semiconductor wafer is larger than 0.85. The method comprises a set of the following steps:

Step 1: open the flow controllers 1023a, 1023b, 1023c and 1023d for individually controlling the flow rate in the operating region for each electrode; The flow rates in the operating ranges of 1001a, 1001b and 1001c are in the range of 5 to 20 LPM and in the operating range of 1001d are 1 to 15 LPM. In one embodiment of the invention, the flow controllers 1023a, 1023b, 1023c and 1023d are operated simultaneously. In another embodiment of the present invention, the flow controllers 1023a, 1023b, 1023c and 1023d are operated at different times.

Step 2: transferring the semiconductor wafer containing the seed layer into the wafer holder 1021 in the apparatus; The wafer holder has an electrically conductive path in contact with the seed layer of the semiconductor wafer.

Step 3: Supplying a small bias voltage in the range of 0.01 to 10 V to the semiconductor wafer.

Step 4: The semiconductor wafer is brought into contact with the electrolytic solution and fixed by the wafer holder until the entire surface of the wafer is completely settled in the electrolytic solution.

Step 5: A current is supplied to the electrodes 1001a, 1001b, and 1001c, and a current is supplied to the electrodes 1001a, 1001b, and 1001c Maintaining the positive potential and the positive or negative potential on the electrode 1001d; The operating current of the electrode 1001a is 1 to 15 A, the operating current of the electrode 1001b is 0.5 to 10 A and the operating current of the electrodes 1001c and 1001d is 0.01 to 10 A. The ratio of the current density on the electrode 1001a to the electrode 1001b is 0.5: 1 to 10: 1 and the ratio of the current density on the electrode 1001a to the electrode 1001c is 0.5: 1 to 50: And the ratio of the current density on the electrode 1001a to the electrode 100d is 1: 1 to 300: 1. This step lasts for 5 to 30 seconds to fill the vias and trenches on the surface of the semiconductor wafer 1022. In one embodiment of the invention, the power supply associated with electrodes 1001a, 1001b, 1001b and 1001c simultaneously switches to a constant current mode in constant voltage mode. In another embodiment of the present invention, the power supply associated with electrodes 1001a, 1001b, 1001b and 1001c switches at a constant voltage mode and at a constant current mode at different times.

Step 6: The power supply connected to the electrodes 1001a, 1001b and 1001c controls positive or negative potential on the electrodes 1001a, 1001b and 1001c and positive potential on the electrodes 1001 o; The operating current on the electrode 1001a is 2 to 30 A and the operating current on the electrodes 1001b and 1001c is 1 to 30 A and the operating current on the electrode 1001 d is 0.01 to 20 A. [ The ratio of the current density on the electrode 1001a to the electrode 1001b is 0.5: 1 to 10: 1 and the ratio of the current density on the electrode 1001a to the electrode 1010c is 0.5: 1 to 50: And the ratio of the current density on the electrode 1001a to the electrode 100d is 1: 1 to 300: 1. This step increases the efficiency of the electrochemical deposition by applying a relatively large electrical current on the electrodes 1001a, 1001b, 1001c and 1001d. This step ends when the required deposition thickness is achieved.

Step 7: Supplying a small bias voltage on the semiconductor wafer. In one embodiment of the invention, the electrodes 1001a, 1001b, 1001b and 1001c are simultaneously switched to a constant voltage mode in constant current mode. In another embodiment of the present invention, the electrodes 1001a, 1001b, 1001b and 1001c are switched at a constant current mode and at a different time in a constant voltage mode.

Step 8: The semiconductor wafer is recovered to the outside of the electrolyte and the residual electrolyte remaining on the wafer surface is spun off.

In the 5th and 6th steps, the indication of the potential on the electrode 1001d is determined to be positive or negative based on the electrochemical deposition condition. For example, as shown in Fig. 11A, if the conductivity of the electrolyte is low and the conductive layer on the semiconductor wafer is thick, a positive potential is applied to both electrodes 1001a, 1001b, 1001c and 1001d; As shown in Fig. 11B, when the conductivity of the electrolytic solution is high and the conductive layer on the wafer is thin, positive potential is applied to the electrodes 1001a, 1001b and 1001c, and negative potential is applied to the electrode 1001d.

The current density used in the fifth step of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 50 to 2000 A thickness in an electrolyte solution having a conductivity of 0.02 to 0.2 S / cm and a conductivity of 0.2 to 0.8 S / The detailed set of ratios and potential indications on individual electrodes are shown in Table 9:

The display of the electrode 401a The display of the electrode 401b The display of the electrode 401c The display of the electrode 401d Current density ratio
(401a: 401b) (401a: 401c) (401a: 401d) Conductivity
0.02 to 0.2 S / cm + + + + 0.5: 1 to 2: 1 0.5: 1 to 10: 1 1: 1 to 300: 1 + + + - 0.5: 1 to 2: 1 0.5: 1 to 3: 1 10: 1 to 100: 1 Conductivity
0.2 to 0.8 S / cm + + + - 1: 1 to 2: 1 4: 1 to 30: 1 2: 1 to 20: 1

Step 6 starts when the plating thickness of the Cu film reaches 1500 Å. The current density used in step 6 of plating a uniform copper film on a 300 mm semiconductor wafer containing a seed layer of 50 to 2000 angstroms in an electrolyte having a conductivity of 0.02 to 0.2 S / cm and an electrical conductivity of 0.2 to 0.8 S / A detailed set of ratios and potential indications on individual electrodes are shown in Table 10:

The display of the electrode 401a The display of the electrode 401b The display of the electrode 401c The display of the electrode 401d Current density ratio
(401a: 401b) (401a: 401c) (401a: 401d) Conductivity
0.02 to 0.2 S / cm + + + + 1: 1 to 2: 1 1: 1 to 10: 1 1: 1 to 300: 1 + + + - 0.5: 1 to 2: 1 0.5: 1 to 10: 1 10: 1 to 300: 1 Conductivity
0.2 to 0.8 S / cm + + + - 1: 1 to 2: 1 1: 1 to 2: 1 1: 1 to 250: 1

Figures 12A and 12B show the deposition profiles of a 3000 A thick film deposited on a 350 A seed layer in a low and high conducting electrolyte, respectively; The profile of Method 2 was obtained with processing parameters out of the range defined in Tables 9 and 10, while the profile of Method 1 was obtained with the processing parameters shown in Tables 3 and 4. The WFNU values are shown in Table 11. As shown in Figs. 11A to 11B and Table 11, the method disclosed in both low and high conductivity electrolytes greatly improves the WFNU of the deposited 3000Å film. The WFNU value of the profile on the surface of a 300 mm semiconductor wafer is obtained by subtracting 2.3 mm from the edge and is more aggressive compared to conventional practices that exclude 3.0 to 6.5 mm from the edge of the wafer.

Method 1 (disclosed) -WFNU Method 2 (disclosed) -WFNU Also, 0.33% 2.69% High conductivity electrolyte 0.66% 5.47%

The disclosed method (Method 1) significantly improved WFNU compared to the conventional method (Method 2) in both low and high conductivity electrolytes. In embodiments of the low conductivity electrolyte, a WFNU of less than 2.5% is obtained.

Implementation Example 4

The methods of the present invention are performed on a single electrode form of the device disclosed in U.S. Patent No. 6391166. Other applications of the method of the present invention can be devised in the same manner in more than four electrodes in the form of electrodes; The area of the first electrode is 5 to 30% of the total electrode area, and the ratio of the total area of all the electrodes to the area of the semiconductor wafer is greater than 0.85.

A specific set of current density ratios used for plating of 100 to 1500 angstroms of a 300 mm semiconductor wafer phase containing a seed layer of 50 to 2000 angstroms in an electrolytic solution having an electric conductivity of 0.02 to 0.2 S / cm and an electric conductivity of 0.2 to 0.8 S / An indication of the phase potential is shown in Table 12. In this embodiment, the plating apparatus is composed of N electrodes, and N is 5 to 10.

The display of the first electrode (N-2) th electrode The display of the (n-1) th electrode Display of the n-th electrode Current density ratio
E1: E2 ... En-2 E1: En-1 E1: En Conductivity
0.02 to 0.2 S / cm + + + + 0.8: 1 to 2: 1 0.5: 1 to 10: 1 1: 1 to 300: 1 + + + - 0.5: 1 to 2: 1 0.5: 1 to 10: 1 10: 1 to 100: 1 Conductivity
0.2 to 0.8 S / cm + + + - 1: 1 to 2: 1 4: 1 to 40: 1 2: 1 to 100: 1

A current density ratio used to deposit the remaining portion of the copper film on a 300 mm semiconductor wafer containing a seed layer of 50-2000 A thick in an electrolyte having a conductivity of 0.02 to 0.2 S / cm and an electrical conductivity of 0.2 to 0.8 S / The concrete set and indications of the individual electrode phase potentials are shown in Table 13.

The display of the first electrode (N-2) th electrode The display of the (n-1) th electrode Display of the n-th electrode Current density ratio
E1: E2 ... En-2 E1: En-1 E1: En Conductivity
0.02 to 0.2 S / cm + + + + 1: 1 to 2: 1 1: 1 to 10: 1 1: 1 to 300: 1 + + + - 0.5: 1 to 2: 1 0.5: 1 to 10: 1 10: 1 to 300: 1 Conductivity
0.2 to 0.8 S / cm + + + - 1: 1 to 2: 1 1: 1 to 2: 1 1: 1 to 300: 1

Figure 13 shows the deposition profile of a 3000 Å thick Cu film deposited on a 350 Å seed layer with the device in an electrolyte 1 having a low conductivity and in an electrolyte 2 having a high conductivity; The apparatus of this embodiment includes ten electrodes with independent control. The WFNU values obtained using the method of the present invention are 2.5%: 0.26% or less in electrolyte 1 and 2.5%: 0.59% or less in electrolyte 2, respectively.

WFNU improves with the number of electrodes (N) and increases with the method disclosed in the present invention. When applied to devices with more than one electrode, the methods produce WFNU of less than 2.5% on a 300 mm wafer with a seed layer as thin as 350 ANGSTROM. When N is increased to 4, the WFNU is improved to 0.33% on the same seed layer as the same wafer.

The method disclosed in the present invention is compared with the method disclosed in U.S. Patent No. 6,755,954. (3) seed layer thickness = 400 ANGSTROM; (4) total plating thickness = 6000 ANGSTROM; and (5) from the edge of the wafer. Disregarding 2.7mm of Cu film. In order to make a direct comparison, a thickness uniformity range value is used instead of the WFNU value. Figure 14 shows the deposition profiles predicted by the method disclosed in the present invention, and the thickness uniformity range values are compared in Table 14:

Thickness uniformity range of US675594 The thickness uniformity range of the present invention 240 Å 138.4 Å

The method of the present invention produces deposited films with WFNU = 0.72% and thickness uniformity range = 138.4A, almost 2X improved compared to the method disclosed in U.S. Patent No. 6,755,954.

Claims (30)

A method of electrochemical deposition of a uniform Cu film in an apparatus in which the area of the first electrode is comprised of two electrodes, 50 to 90% of the total area of all electrodes:
Introducing the basic copper sulfate basic electrolyte into the plating apparatus at an inflow rate of 1 to 20 LPM;
Transferring a semiconductor wafer to a wafer holder in electrical contact with a conductive layer on the semiconductor wafer;
Operating a power supply to supply a bias voltage of up to 10 V to the semiconductor wafer;
Recovering the semiconductor wafer in contact with the electrolytic solution;
Maintaining a positive potential with respect to the semiconductor wafer on the first electrode;
Supplying a combined current (2A-10A) to all the electrodes in a first plating step, wherein when the potential on the second electrode is positive with respect to the semiconductor wafer, The ratio of the current density on the first electrode is 1: 1 to 30: 1; Wherein the ratio of the current density on the first electrode to the current density on the second electrode is 2: 1 to 30: 1 when the potential on the second electrode is negative with respect to the semiconductor wafer;
Supplying a combinded current 10A to 40A to all of the electrodes in a second plating step, wherein when the potential on the second electrode is positive with respect to the semiconductor wafer, the current density on the second electrode The ratio of the current density on the first electrode is 1: 1 to 30: 1; Wherein the ratio of the current density on the first electrode to the current density on the second electrode is 10: 1 to 30: 1 when the potential on the second electrode is negative with respect to the semiconductor wafer;
Supplying a bias voltage up to 1 V onto the semiconductor wafer by a power supply switch; And
Recovering the semiconductor wafer from the outside of the electrolyte solution
≪ / RTI >
The method according to claim 1,
Wherein the ratio of the total area of all electrodes to the area of the semiconductor wafer is greater than 0.85.
The method according to claim 1,
Wherein when the potential on the second electrode is in a negative potential with respect to the semiconductor wafer in the first plating step, the current on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / Density ratio of 15: 1 to 30: 1.
The method according to claim 1,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.2 to 0.8 S / cm when the potential on the second electrode is in a negative potential with respect to the semiconductor wafer in the first plating step Is in the range of 2: 1 to 15: 1.
The method according to claim 1,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / cm when the potential on the second electrode is in a negative potential with respect to the semiconductor wafer in the second plating step Density ratio of 15: 1 to 30: 1.
The method according to claim 1,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.2 to 0.8 S / cm when the potential on the second electrode is at a negative potential with respect to the semiconductor wafer in the second plating step Density ratio of 10: 1 to 20: 1.
The method according to claim 1,
Wherein the thickness of the conductive layer on the semiconductor wafer is 50 to 900 ANGSTROM.
The method according to claim 1,
Wherein the WFNU of the Cu film deposited on the surface of the semiconductor wafer is adjustable from 0.2% to 2.5%.
The method according to claim 1,
Wherein the electrodes are located at the same vertical height.
The method according to claim 1,
Wherein the electrodes are located at different vertical heights.
A method of electrochemical deposition of a uniform Cu film in an apparatus in which the area of the first electrode is comprised of three electrodes, 40 to 60% of the total area of all electrodes:
Introducing the basic copper sulfate basic electrolyte into the plating apparatus at an inflow rate of 1 to 20 LPM;
Transferring a semiconductor wafer to a wafer holder in electrical contact with a conductive layer on the wafer;
Operating a power supply to supply a bias voltage of up to 10 V to the semiconductor wafer;
Recovering the semiconductor wafer in contact with the electrolytic solution;
Maintaining a positive potential with respect to the semiconductor wafer on the first electrode;
Supplying a combined current (2A-10A) to all the electrodes in a first plating step, wherein when the potential on the third electrode is positive with respect to the semiconductor wafer, the current density on the second electrode Wherein the ratio of the current density on the first electrode to the current density on the first electrode is 1: 1 to 2: 1, the ratio of the current density on the first electrode to the current density on the third electrode is 1: 1 to 300: 1; Wherein a ratio of a current density on the first electrode to a current density on the second electrode is 1: 1 to 20: 1 when the potential on the third electrode is a negative potential with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the second electrode is 2: 1 to 40: 1;
Supplying a combinded current 10A to 40A to all the electrodes in a second plating step, wherein when the potential on the third electrode is positive with respect to the semiconductor wafer, the current density on the second electrode Wherein the ratio of the current density on the first electrode to the current density on the third electrode is 1: 1 to 300: 1; Wherein a ratio of a current density on the first electrode to a current density on the second electrode is 1: 1 to 2: 1 when the potential on the third electrode is a negative potential with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the first electrode is 20: 1 to 300: 1;
Supplying a bias voltage up to 1 V onto the semiconductor wafer by a power supply switch; And
Recovering the semiconductor wafer from the outside of the electrolyte solution
≪ / RTI >
The method of claim 11,
Wherein the ratio of the total area of all electrodes to the area of the semiconductor wafer is greater than 0.85.
The method of claim 11,
Wherein when the potential on the third electrode is at a negative potential with respect to the semiconductor wafer in the first plating step, the current on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / Wherein the ratio of the current density on the first electrode to the current density on the third electrode is from 1: 1 to 2: 1, and the ratio of the current density on the first electrode to the current density on the third electrode is from 10: 1 to 40: 1.
The method of claim 11,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.2 to 0.8 S / cm when the potential on the third electrode is in a negative potential with respect to the semiconductor wafer in the first plating step Is in the range of 5: 1 to 20: 1, and the ratio of the current density on the first electrode to the current density on the third electrode is 2: 1 to 10: 1.
The method of claim 11,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / cm when the potential on the third electrode is in a negative potential with respect to the semiconductor wafer in the second plating step, Wherein the ratio of the current density on the first electrode to the current density on the third electrode is in the range of 1: 1 to 2: 1, and the ratio of the current density on the first electrode is in the range of 50: 1 to 300:
The method of claim 11,
The current density on the first electrode with respect to the current density on the second electrode in the electrolyte having a conductivity of 0.2 to 0.8 S / cm when the potential on the third electrode is in a negative potential with respect to the semiconductor wafer in the second plating step Is 1: 1 to 2: 1, and the ratio of the current density on the first electrode to the current density on the third electrode is 20: 1 to 80: 1.
The method of claim 11,
Wherein the conductive layer has a thickness of 50 to 900 ANGSTROM.
The method of claim 11,
Wherein the WFNU of the Cu film deposited on the surface of the semiconductor wafer is adjustable from 0.2% to 2.5%.
The method of claim 11,
Wherein the electrodes are located at the same vertical height.
The method of claim 11,
Wherein the electrodes are located at different vertical heights.
A method of electrochemical deposition of a uniform Cu film in an apparatus comprising four or more electrodes wherein the area of the first electrode is between 5 and 50% of the total area of all electrodes:
Introducing the basic copper sulfate basic electrolyte into the plating apparatus at an inflow rate of 1 to 20 LPM;
Transferring a semiconductor wafer to a wafer holder in electrical contact with a conductive layer on the semiconductor wafer;
Operating a power supply to supply a bias voltage of up to 10 V to the semiconductor wafer;
Recovering the semiconductor wafer in contact with the electrolytic solution;
Maintaining a positive potential with respect to the semiconductor wafer on the first electrode;
In a first plating step, supplying combined currents 2A-10A to all electrodes, wherein when the potential on the last electrode is positive potential relative to the semiconductor wafer, the current density on the last- Wherein the ratio of the current density on the first electrode to the current density on the last electrode is 0.5: 1 to 10: 1, the ratio of the current density on the first electrode to the current density on the last electrode is 1: The ratio of the current density on the first electrode to the current density on the first electrode is 0.5: 1 to 2: 1; Wherein the ratio of the current density on the first electrode to the current density on the remaining electrode is 0.5: 1 to 2: 1 when the potential on the last electrode is negative with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the current density on the last electrode is 0.5: 1 to 30: 1, and the ratio of the current density on the first electrode to the current density on the last electrode is 2: 1 to 300: 1;
Supplying a combinded current 10A to 40A to all of the electrodes in a second plating step such that when the potential on the last electrode is positive with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the current density on the last electrode is between 1: 1 and 300: 1, The ratio of the current density on the first electrode to the current density is 0.8: 1 to 2: 1; Wherein the ratio of the current density on the first electrode to the current density on the remaining electrode is 0.5: 1 to 2: 1 when the potential on the last electrode is negative with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the current density on the last electrode is 0.5: 1 to 10: 1, and the ratio of the current density on the first electrode to the current density on the last electrode is 1: 1 to 300: 1;
Supplying a bias voltage up to 1 V onto the semiconductor wafer by a power supply switch; And
Recovering the semiconductor wafer from the outside of the electrolyte solution
≪ / RTI >
23. The method of claim 21,
Wherein the ratio of the total area of all electrodes to the area of the semiconductor wafer is greater than 0.85.
23. The method of claim 21,
Wherein a current on the first electrode with respect to a current density on the second to last electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / cm when the potential on the last electrode in the first plating step is a negative potential with respect to the semiconductor wafer, Wherein the ratio of the current density on the first electrode to the current density on the first electrode is in the range of 0.5: 1 to 3: 1, the ratio of the current density on the first electrode to the current density on the last electrode is 10: 1 to 100: 1, Wherein the ratio of the current density on the first electrode is 0.5: 1 to 2: 1.
23. The method of claim 21,
The current density on the first electrode with respect to the current density on the last-to-last electrode in the electrolyte having a conductivity of 0.2 to 0.8 S / cm when the semiconductor wafer is at a negative potential with respect to the semiconductor wafer on the last electrode in the first plating step Wherein the ratio of the current density on the first electrode to the current density on the last electrode is from 2: 1 to 100: 1, the ratio of the current density on the last electrode to the current density on the first electrode Wherein the ratio of the current density to the current density is 1: 1 to 2: 1.
23. The method of claim 21,
The current on the first electrode with respect to the current density on the last-to-last electrode in the electrolyte having a conductivity of 0.02 to 0.2 S / cm when the potential on the last electrode is negative with respect to the semiconductor wafer in the second plating step, Wherein the ratio of the density of the current density on the first electrode to the current density on the first electrode is in the range of 0.5: 1 to 10: 1, the ratio of the current density on the first electrode to the current density on the last electrode is 10: 1 to 300: 1, Wherein the ratio of the current density on the first electrode is 0.5: 1 to 2: 1.
23. The method of claim 21,
In the electrolyte solution having a conductivity of 0.2 to 0.8 S / cm when the potential on the last electrode in the second plating step is a negative potential with respect to the semiconductor wafer, the current density of the first electrode Wherein the ratio of the current density on the first electrode to the current density on the first electrode is 1: 1 to 2: 1, the ratio of the current density on the first electrode to the current density on the last electrode is 1: Wherein the ratio of the current density on the first electrode is 1: 1 to 2: 1.
23. The method of claim 21,
Wherein the conductive layer has a thickness of 50 to 900 ANGSTROM.
23. The method of claim 21,
Wherein the WFNU of the Cu film deposited on the surface of the semiconductor wafer is adjustable from 0.2% to 2.5%.
23. The method of claim 21,
Wherein the electrodes are located at the same vertical height.
23. The method of claim 21,
Wherein the electrodes are located at different vertical heights.

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