KR101510361B1 - Semiconductor package - Google Patents

Semiconductor package Download PDF

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Publication number
KR101510361B1
KR101510361B1 KR20100054902A KR20100054902A KR101510361B1 KR 101510361 B1 KR101510361 B1 KR 101510361B1 KR 20100054902 A KR20100054902 A KR 20100054902A KR 20100054902 A KR20100054902 A KR 20100054902A KR 101510361 B1 KR101510361 B1 KR 101510361B1
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South Korea
Prior art keywords
signal
substrate
chip
transmitting
semiconductor chip
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KR20100054902A
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Korean (ko)
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KR20110135156A (en
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송성주
정병호
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에스티에스반도체통신 주식회사
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Priority to KR20100054902A priority Critical patent/KR101510361B1/en
Publication of KR20110135156A publication Critical patent/KR20110135156A/en
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  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

There is provided a semiconductor package capable of wirelessly transmitting and receiving signals between a substrate and semiconductor chips in a semiconductor package. The semiconductor package includes a substrate, and a semiconductor chip for transmitting and receiving signals wirelessly with the substrate on the substrate. Reliable and high-speed data processing is possible by transmitting and receiving data between the substrate and the semiconductor chip by wireless communication.

Description

[0001]

The present invention relates to a semiconductor package, and more particularly, to a semiconductor package that wirelessly transmits and receives signals between a substrate and semiconductor chips in a semiconductor package.

Electronic products are becoming increasingly smaller and require higher-capacity data processing. Thus, there is a growing need to increase the degree of integration of semiconductor memory devices used in electronic products, but the increase in the degree of integration is reaching its limit. Accordingly, various methods have been proposed to enable a semiconductor package including a semiconductor memory device to process a large amount of data.

As a method for enabling high-capacity data processing, a three-dimensional structure having a vertical transistor structure instead of a conventional planar transistor structure has been proposed, but it takes a considerable period of time to realize the difficulty in manufacturing. Therefore, a stacked semiconductor package for stacking a plurality of semiconductor chips has been proposed in order to enable high-capacity data processing while still using the existing semiconductor manufacturing process.

However, such a laminated semiconductor package suffers from difficulty in providing a signal and a power supply path because the number of paths for supplying signals and power of the stacked semiconductor chips increases in proportion to the number of stacked semiconductor chips. Crosstalk between the signal path and the power path is also becoming a big problem.

SUMMARY OF THE INVENTION The present invention provides a semiconductor package capable of preventing interference between a signal and a power source.

According to an aspect of the present invention, there is provided a semiconductor package according to one aspect of the present invention. The semiconductor package includes a substrate, and a semiconductor chip for transmitting and receiving signals wirelessly with the substrate on the substrate.

According to one example of the semiconductor package, the substrate includes a substrate radio signal portion for transmitting a radio signal to the semiconductor chip and for receiving a radio signal from the semiconductor chip, the semiconductor chip transmitting a radio signal to the substrate And a chip radio signal unit for receiving a radio signal from the substrate. The substrate and the semiconductor chip may transmit and receive radio signals to each other through the substrate radio signal unit and the chip radio signal unit.

The semiconductor package of the present invention can eliminate the problem of cross talk between a signal and a power supply, and can transmit data wirelessly between a substrate and semiconductor chips, so that data can be processed at a high speed. In addition, since signals are not transferred between the substrate and the semiconductor chips by using wire bonding, solder balls, bumps, etc., the subsequent process can be simplified, and reliability and yield can be increased. Further, since the signal transmitting / receiving end can be formed at the same time as the metal wiring or the rewiring, manufacturing cost and time can be saved.

1 schematically illustrates a cross-sectional view of a semiconductor package according to an embodiment of the present invention.
FIGS. 2 to 5 are cross-sectional views of a semiconductor package according to embodiments of the present invention, showing aspects according to a manner in which a wireless signal is transmitted to each semiconductor chip in a semiconductor package including a plurality of semiconductor chips.
FIGS. 6 to 9 are schematic diagrams schematically illustrating a substrate wireless signal unit according to embodiments of the present invention, and schematically illustrate aspects of coils for wireless signal transmission and reception in a substrate wireless signal unit including a coil.
10 is a cross-sectional view showing a semiconductor chip according to an embodiment of the present invention.
Figs. 11 to 14 are cross-sectional views schematically showing a semiconductor package in an embodiment of the present invention, showing various aspects of a position at which a substrate signal transmitting / receiving end and a chip wireless transmitting / receiving end are disposed.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: FIG. However, the embodiments of the present invention can be modified in various ways, and the scope of the present invention should not be interpreted as being limited by the embodiments described below. The embodiments according to the technical concept of the present invention are provided for a more complete explanation of the present invention to those skilled in the art. Unless otherwise indicated, the same reference numbers in the drawings indicate like elements and the various elements and regions are schematically drawn. Accordingly, the invention is not limited by the relative size or spacing depicted in the accompanying drawings.

1 schematically illustrates a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

Referring to FIG. 1, a semiconductor package 1000 including a substrate 1 and a semiconductor chip 100 is shown. The substrate 1 includes a base 10 and a substrate radio signal portion 40. The base portion 10 includes a first surface 12 and a second surface 14 facing each other. The semiconductor chip 100 including the chip radio signal unit 110 may be mounted on the first surface 12. Although only one semiconductor chip 100 is shown in FIG. 1, two or more semiconductor chips may be stacked and mounted. An encapsulating material (not shown) for encapsulating the semiconductor chip 100 may be formed on the first surface 12.

The base 10 may include an epoxy resin, a polyimide resin, a bismaleimide triazine (BT) resin, FR-4 (Flame Retardant 4), FR-5, ceramic, silicone, or glass, And the present invention is not limited thereto. The base 10 may be a single layer or may be of a multi-layer structure including a wiring pattern therein. For example, the base 10 may be a rigid flat plate, or a plurality of rigid flat plates may be adhered to one another. Further, the base 10 may be formed by bonding a thin flexible printed circuit board to a rigid plate. A plurality of rigid flat plates or printed circuit boards bonded to each other may each include a wiring pattern. The base 10 may also be a low temperature co-fired ceramic (LTCC) substrate. The LTCC substrate may include a plurality of ceramic layers stacked and include a wiring pattern therein.

The semiconductor chip 100 can be operated by receiving power from the substrate 1. [ For example, the semiconductor chip 100 may be supplied with power from the substrate 1 through wire bonding. According to another example, the semiconductor chip 100 may be powered from the substrate 1 through bumps or solder balls. According to another example, the semiconductor chip 100 may receive power from the substrate 1 through a through silicon via (TSV).

The intermediate member 106 may be interposed between the first surface 12 of the substrate 1 and the semiconductor chip 100. The intermediate member 106 may be a resin-based epoxy, an adhesive tape excellent in heat resistance, or a thin film coated with an adhesive on its surface.

The substrate radio signal unit 40 may include a substrate signal sending / receiving end 42, a substrate signal circuit unit 44, and a substrate signal controlling unit 46. The chip radio signal unit 110 may include a chip signal transmission / reception terminal 112, a chip signal circuit unit 114, and a chip signal control unit 116. The chip signal transmitting / receiving end 112 may be formed at a position corresponding to the substrate signal transmitting / receiving end 42. It is to be noted that only the substrate signal transmitting / receiving end 42, the substrate signal circuit portion 44 and the substrate signal controlling portion 46 are formed on the substrate 1 or can be attached on the substrate 1, The present invention is not limited to the illustrated position, and a detailed description thereof will be given later. It also means that the chip signal transmitting / receiving end 112, the chip signal circuit part 114 and the chip signal controlling part 116 can also be formed on or attached to the semiconductor chip 100.

The substrate signal circuitry 44 or the chip signal circuitry 114 may generate or convert signals to be transmitted at the substrate signal transceiver 42 or the chip signal transceiver 112, respectively. That is, the substrate signal circuit portion 44 or the chip signal circuit portion 114 may be converted to transmit electrical signals used in the substrate 1 or the semiconductor chip 100, May be transformed for use within the chip 100.

The substrate signal control unit 46 or the chip signal control unit 116 controls the substrate signal transmission and reception unit 42 and the substrate signal circuit unit 44 or the chip signal transmission and reception unit 112 and the chip signal circuit unit 114 to transmit or receive signals Can be controlled.

According to an example, the substrate wireless signal unit 40 and the chip wireless signal unit 110 can transmit and receive wireless signals by a proximity wireless scheme. That is, the substrate radio signal unit 40 and the chip radio signal unit 110 can transmit or receive a radio signal by magnetic induction or electrostatic induction.

According to another example, the substrate radio signal unit 40 and the chip radio signal unit 110 can transmit and receive radio signals through a radio frequency (RF). The substrate signal transmitting / receiving end 42 or the chip signal transmitting / receiving end 112 may each include an antenna. The substrate signal transmission / reception terminal 42 or the chip signal transmission / reception terminal 112 may be composed of a transmitting antenna and a receiving antenna, respectively. In this case, the transmitting and receiving antennas take into consideration the wavelength of RF used for signal transmission Can be designed.

According to another example, the substrate signal transmitting / receiving end 42 or the chip signal transmitting / receiving end 112 may be a coil for transmitting / receiving signals. If the chip signal transmitting and receiving terminal 112 is formed at a position corresponding to the substrate signal transmitting and receiving terminal 42 in the case where the substrate signal transmitting and receiving terminal 42 and the chip signal transmitting and receiving terminal 112 include a coil, 42 and the chip signal transmitting / receiving end 112 coincide with each other. When the center axes of the coils of the substrate signal transmitting / receiving end 42 and the chip signal transmitting / receiving end 112 coincide with each other, the transmitted magnetic field can be maximally received.

The substrate radio signal unit 40 or the chip radio signal unit 110 can both transmit and receive radio signals or can only transmit or receive radio signals. When the substrate radio signal unit 40 can transmit a radio signal, the corresponding chip radio signal unit 110 can be configured to receive a radio signal.

As described above, the signal and the power supply can be transmitted through separate paths such as wireless and wire, respectively, so that interference between the signal and the power supply in the semiconductor package 1000 can be minimized.

Hereinafter, the substrate wireless signal unit 40 or the chip wireless signal unit 110 may be shown as one component in order to clearly understand the present invention. In this case, when it is shown that the substrate radio signal unit 40 and the chip radio signal unit 110 are arranged at positions corresponding to each other, the substrate signal transmitting / receiving end 42 and the chip signal transmitting / It may mean that it is disposed at the corresponding position.

FIGS. 2 to 5 illustrate aspects of a manner in which a wireless signal is transmitted to each semiconductor chip in a semiconductor package including a plurality of semiconductor chips according to an embodiment of the present invention.

2, which is a cross-sectional view illustrating a semiconductor package according to an embodiment of the present invention, a substrate radio signal part 40 includes a substrate transmission signal part 40S and a substrate reception signal part 40E, The unit 110 includes a chip transmission signal unit 110S and a chip reception signal unit 110E. The substrate transmission signal unit 40S may be formed at a position corresponding to the chip reception signal unit 110E and the substrate reception signal unit 40E may be formed at a position corresponding to the chip transmission signal unit 110S.

The substrate transmission signal section 40S and the substrate reception signal section 40E or the chip transmission section 40A and the chip transmission section 40B can transmit and receive a radio signal by using the same components as the substrate radio signal section 40 or the chip radio signal section 110. [ The signal portion 110S and the chip reception signal portion 110E may be integrally formed, and the same may be applied to all of them unless otherwise specified.

The chip radio signal unit 110 may be formed adjacent to the surface of the semiconductor chip 100 farther from the substrate 1 as shown in FIG. Or may be formed adjacent to the near surface.

3, which is a cross-sectional view illustrating a semiconductor package according to another embodiment of the present invention, a substrate wireless signal section 40 includes a substrate transmission signal section 40S and a substrate reception signal section 40E, A semiconductor chip 100-a includes first chip transmission / reception signal units 110S-a and 110E-a and a second semiconductor chip 100-b includes second chip transmission / reception signal units 110S- b, 110E-b). The substrate transmission signal section 40S may be formed at a position corresponding to the first and second chip reception signal sections 110E-a and 110E-b, and the substrate reception signal section 40E may be formed at a position corresponding to the first and second chip reception signal sections 110E- May be formed at positions corresponding to the transmission signal sections 110S-a and 110S-b. Accordingly, the first and second semiconductor chips 100-a and 100-b wirelessly transmit and receive signals through the substrate wireless signal unit 40, that is, the substrate transmission signal unit 40S and the substrate reception signal unit 40E . At this time, the signal transmitted from the substrate wireless signal unit 40 may further include information for selectively receiving signals from the first semiconductor chip 100-a or the second semiconductor chip 100-b.

4, which is a cross-sectional view illustrating a semiconductor package according to another embodiment of the present invention, a substrate wireless signal unit 40 includes first and second substrate transmission signal units 40S-a and 40S- 1 and second substrate reception signal portions 40E-a and 40E-b. The first semiconductor chip 100-a includes first chip transmission / reception signal units 110S-a and 110E-a and the second semiconductor chip 100-b includes a second chip transmission / reception signal unit 110S-b, 110E-b).

The first substrate transmission signal part 40S-a and the first substrate reception signal part 40E-a are located at positions corresponding to the first reception signal part 110E-a and the first transmission signal part 110S-a, As shown in FIG. The second substrate transmission signal section 40S-b and the second substrate reception signal section 40E-b correspond to the second reception signal section 110E-b and the second transmission signal section 110S-b, respectively As shown in FIG. Therefore, the first and second semiconductor chips 100-a and 100-b are connected to separate substrate radio signal portions, that is, the first substrate transmission / reception signal portions 40S-a and 40E- And can transmit and receive signals wirelessly with the substrate 1 through the signal sections 40S-b and 40E-b

Although not shown, the first and second chip transmission / reception signal units 110S-a and 110E-a and the first and second chip transmission / reception signal units 110S- b, and 110E-b may be formed. In this case, the first semiconductor chip 100-a activates the first chip transmission / reception signal units 110S-a and 110E-a before being mounted on the substrate 1, The signal units 110S-b and 110E-b may be inactivated. Similarly, the second semiconductor chip 100-b activates the second chip transmission / reception signal units 110S-b and 110E-b before being attached on the first semiconductor chip 100-a, The chip transmitting / receiving signal units 110S-a and 110E-a may be deactivated. The process of activating or deactivating the first chip transmission / reception signal portion 110S-a or 110E-a or the second chip transmission / reception signal portion 110S-b or 110E-b is similar to the semiconductor repair process, . ≪ / RTI >

5, which is a cross-sectional view illustrating a semiconductor package according to another embodiment of the present invention, a substrate wireless signal section 40 includes a substrate transmission signal section 40S and a substrate reception signal section 40E. The first semiconductor chip 100-a includes first chip transmission / reception signal units 110S-a and 110E-a and first chip-to-chip retransmission / reception signal units 110RS-a and 110RE-a. The second semiconductor chip 100-b includes the second chip transmission / reception signal units 110S-b and 110E-b. The first inter chip retransmission signal part 110RS-a and the first inter chip re-reception signal part 110RE-a are connected to the first chip reception signal part 110E-a and the first chip reception signal part 110RE- May be communicably connected to the chip transmission signal unit 110S-a.

The substrate transmission signal portion 40S and the substrate reception signal portion 40E may be formed at positions corresponding to the first reception signal portion 110E-a and the first transmission signal portion 110S-a, respectively. The first inter-chip transmission signal portion 110RS-a and the first inter-chip reception signal portion 110RE-a correspond to the second reception signal portion 110E-b and the second transmission signal portion 110S-b, respectively As shown in FIG. Thus, the first semiconductor chip 100-a can transmit and receive signals wirelessly with the substrate 1 through the substrate transmission / reception signal units 40S and 40E, and the second semiconductor chip 100-b can transmit / Signals can be wirelessly transmitted and received to the substrate 1 through the inter-chip transmission / reception signal units 110RS-a and 110RE-a and the first semiconductor chip 100-a. At this time, the signal transmitted from the substrate transmission signal unit 40S may further include destination information capable of specifying whether the destination of the signal is the first semiconductor chip 100-a or the second semiconductor chip 100-b. When the destination information is the first semiconductor chip 100-a, the first chip reception signal part 110S-a transmits the reception signal to the circuit inside the first semiconductor chip 100-a. On the other hand, when the destination information is the second semiconductor chip 100-b, the first chip reception signal part 110S-a transmits the reception signal to the first inter-chip transmission signal part 100RS-a, 0.0 > 100-b. ≪ / RTI >

Although not shown, the second semiconductor chip 100-b is also connected to the first inter-chip transmission / reception signal units 110RS-a and 110RE-a of the first semiconductor chip 100- A transmission / reception signal unit (not shown) may be formed. In this case, the second chip-to-chip transmission / reception signal unit can wirelessly transmit and receive signals to another semiconductor chip, for example, a third semiconductor chip (not shown) stacked on the second semiconductor chip 100-b. That is, all of the semiconductor chips stacked on the substrate 1 may include a transmit / receive signal unit and a chip transmit / receive signal unit. At this time, the transmission / reception signal unit can wirelessly transmit / receive a signal to / from a semiconductor chip at a lower portion, that is, a substrate or an adjacent lower portion, and the inter-chip transmission / reception signal portion can wirelessly transmit / . Also, the inter-chip transmit / receive signal unit in the uppermost semiconductor chip may be used after being deactivated so as not to be used.

Figures 6-9 schematically illustrate aspects of a coil for wireless signal transmission and reception in a substrate wireless signal portion including a coil in accordance with an embodiment of the present invention.

6, which schematically illustrates a substrate wireless signal unit according to an embodiment of the present invention, a substrate wireless signal unit 40 includes a substrate signal sending / receiving end 42, a substrate signal circuit unit 44, . The substrate signal transmitting / receiving end 42 may be a coil for transmitting and receiving signals. When the substrate signal transmission / reception terminal 42 is formed of a coil, it is possible to perform transmission and reception of a radio signal together in one coil. Further, in another example, although not shown, a coil for transmission and a coil for reception may be separately provided. Hereinafter, for convenience of explanation, only one case where the transmitting coil and the receiving coil are separately provided will be described.

The chip radio signal unit 110 may basically have the same configuration as the substrate radio signal unit 40. That is, the chip signal transmission / reception terminal 112, the chip signal circuit portion 114 and the chip signal control portion 116 have the same configuration as that of the substrate signal transmission / reception terminal 42, the substrate signal circuit portion 44 and the substrate signal control portion 46, respectively Lt; / RTI > Therefore, the description of the substrate wireless signal unit 40 may be applied to the chip wireless signal unit 110 as well, unless otherwise specified below.

The substrate radio signal unit 40 includes a substrate signal transmitting / receiving end 42 composed of one coil. The chip signal transmitting / receiving end 112 may be similarly arranged such that the coils included in the substrate signal transmitting / receiving end 42 coincide with the center axis. However, the size of the coil included in the chip signal transmission / reception terminal 112 need not be the same as the coil included in the substrate signal transmission / reception terminal 42, and the size of the coil can be adjusted to obtain a desired reception sensitivity. The positional relationship between the substrate signal sending / receiving end 42, the substrate signal circuit portion 44, and the substrate signal controlling portion 116 is not limited to the form shown in FIG. Also, the number of coils constituting the substrate signal transmitting / receiving end 42 may be varied as described later.

Referring to FIG. 7, which schematically shows a substrate wireless signal portion according to another embodiment of the present invention, a substrate signal transmitting / receiving end 42 is composed of two coils 42a and 42b. The first coil 42a and the second coil 42b constituting the substrate signal transmitting / receiving end 42 may be arranged to generate a magnetic field signal whose phase is inverted by 180 degrees with respect to each other. In this case, two coils having the same configuration may be used for the chip signal transmitting / receiving end 114 as well. When two coils are used as described above, differential signal transmission is possible and noise immunity can be enhanced. Further, the substrate signal circuit portion 44 may include a differential circuit.

Referring to FIG. 8, which schematically shows a substrate wireless signal part according to another embodiment of the present invention, a substrate signal transmitting / receiving end 42 is composed of two coils 42a and 42b. At this time, the first coil 42a and the second coil 42b constituting the substrate signal transmitting / receiving end 42 are connected in parallel and arranged to generate a magnetic field signal whose phase is inverted by 180 degrees. In this case, two coils having the same configuration may be used for the chip signal transmitting / receiving end 114 as well. By using two coils in this way, differential signal transmission is possible, and noise immunity can be enhanced. Further, the substrate signal circuit portion 44 may include a differential circuit.

9, which schematically illustrates a substrate radio signal unit according to another embodiment of the present invention, the substrate signal transmitting / receiving end 42 is composed of two coils 42a and 42b. At this time, the first coil 42a and the second coil 42b constituting the substrate signal sending / receiving end 42 are connected in series and arranged so as to generate a magnetic field signal whose phase is inverted by 180 degrees. In this case, two coils having the same configuration may be used for the chip signal transmitting / receiving end 114 as well. By using two coils in this way, differential signal transmission is possible, and noise immunity can be enhanced. Further, the substrate signal circuit portion 44 may include a differential circuit.

10 is a cross-sectional view showing a semiconductor chip 100 according to an embodiment of the present invention.

10, there is shown a semiconductor chip 100 that can be divided into a substrate portion 100S, a front end portion 100F, a back end portion 100B, and a passivation portion 100P. The substrate portion 100S may refer to a part of a semiconductor wafer, for example, a silicon substrate. The front end portion 100F may refer to a portion where individual unit elements formed in the semiconductor chip 100, that is, a transistor, a resistor, a capacitor, and the like are formed. The substrate portion 100S and the front end portion 100F may be partially overlapped. For example, a portion (source, drain, channel, etc.) of the transistor formed on the silicon substrate corresponds to the front end portion 100F and also to the substrate portion 100S. However, in this specification, the silicon substrate is referred to as a front end portion 100F including a portion near the surface used in the actual semiconductor device fabrication, and the remaining silicon substrate portion not actually used in the semiconductor device is referred to as the substrate portion 100S. . That is, the front end portion 100F means from the bottom of the deepest well formed in the semiconductor chip 100 to the top surface of the interlayer insulating layer formed before metal wiring lines to be described later are formed.

The back end portion 100B of the semiconductor chip 100 may refer to a portion where metal wiring lines for connecting the individual unit elements formed in the semiconductor chip 100 to the outside are formed. In addition, the passivation part 100P may refer to a part where a passivation layer and a rewiring line are formed to protect individual elements formed in the semiconductor chip 100. [

For example, in the case of a flash memory, a portion including a cell transistor, a word line, a bit line, and inter-layer dielectrics (ILD) constituting a memory cell may be referred to as a front end portion 100F have. Further, for example, in the case of a DRAM (DRAM), a portion including a cell transistor, a word line, a bit line, a capacitor, and an interlayer insulating layer constituting a memory cell may be referred to as a front end portion 100F. For example, in the case of a memory device, a portion including a wiring line called a so-called metal line and an inter-metal dielectric (IMD) layer therebetween may be referred to as a back-end portion 100B.

According to an example, all or a part of the chip radio signal unit 110 shown in FIG. 1 may be formed in the front end portion 100F together with semiconductor elements (not shown) formed in the semiconductor chip 100. For example, the chip signal circuit portion 114 and the chip signal control portion 116 may be formed in the front end portion 100F together with individual elements constituting the semiconductor device (not shown), that is, transistors, resistors, capacitors, The chip signal transmitting / receiving end 112 may be formed in the back end portion 100B together with the wiring lines for the semiconductor devices (not shown).

According to another example, all or a part of the chip wireless signal unit 110 may be additionally formed after the semiconductor devices (not shown) are formed, or separately formed and attached. For example, the chip signal transmission / reception terminal 112 may be formed on the passivation layer (not shown) formed on the semiconductor device (not shown) separately in the passivation part 100P together with the redistribution line . According to another example, the chip signal circuit portion 114, the chip signal transmission / reception terminal 112, and the chip signal control portion 116 are individually formed or integrally formed and then formed on the passivation portion 100P of the semiconductor chip 100 . Hereinafter, it will be described in more detail with reference to FIG. 11 to FIG.

Figs. 11 to 14 are cross-sectional views schematically showing a semiconductor package in an embodiment of the present invention, showing various aspects of a position at which a substrate signal transmitting / receiving end and a chip wireless transmitting / receiving end are disposed.

11 schematically showing a cross-section of a semiconductor package according to an embodiment of the present invention, a first semiconductor chip 100-a and a second semiconductor chip 100-b are sequentially formed on a substrate 1 Respectively. The substrate 1, the first semiconductor chip 100-a, and the second semiconductor chip 100-b are connected to the substrate signal transmitting / receiving end 42, the first chip wireless transmitting / receiving end 112-a, And a transmission / reception terminal 112-b.

The first chip wireless transmitting and receiving terminal 112-a and the second chip wireless transmitting and receiving terminal 112-b are respectively connected to the passivation portions 100P-1 and 100P-2 of the first semiconductor chip 100-a and the second semiconductor chip 100- a, < / RTI > 100P-b. For example, when the first chip wireless transmission / reception terminal 112-a and the second chip wireless transmission / reception terminal 112-b are each formed of an antenna or a coil, the antenna or the coil is connected to the first semiconductor chip 100- B and the passivation portions 100P-a and 100P-b of the semiconductor chip 100-b.

Specifically, the antenna or coil constituting the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b is formed on the passivation layer formed on the passivation portions 100P-a and 100P-b And may be formed in the form of metal wiring. Or the antenna or the coil constituting the first chip wireless transmitting and receiving terminal 112-a and the second chip wireless transmitting and receiving terminal 112-b are formed on the passivation layer formed in the passivation portions 100P-a and 100P-b The rewiring line can be formed along a portion where the rewiring line is not formed.

When the antenna or coil constituting the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b is formed together with the re-wiring line, the first chip wireless transmitting / receiving terminal 112- And the second chip wireless transmitting / receiving terminal 112-b, it is possible to reduce manufacturing time and manufacturing cost.

When the substrate signal transmitting / receiving end 42 is formed of an antenna or a coil, the antenna or coil may be formed along a portion where the conductive wiring line is not formed, together with a conductive wiring line formed on the substrate 1. Alternatively, when the substrate 1 is a multilayer printed circuit board, an additional layer may be formed on the substrate 1 in order to form an antenna or coil that constitutes the substrate signal transmitting / receiving end 42.

12 schematically showing a cross section of a semiconductor package according to another embodiment of the present invention, the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b are respectively connected to a first May be formed on the back-end portions 100B-a and 100B-b of the semiconductor chip 100-a and the second semiconductor chip 100-b. For example, when the first chip wireless transmission / reception terminal 112-a and the second chip wireless transmission / reception terminal 112-b are each formed of an antenna or a coil, the antenna or the coil is connected to the first semiconductor chip 100- B and 100B-b of the first semiconductor chip 100-b and the second semiconductor chip 100-b.

Specifically, the antennas or coils constituting the first chip wireless transmission / reception terminal 112-a and the second chip wireless transmission / reception terminal 112-b are connected to the metal wiring line formed in the back ends 100B-a and 100B- May be formed along a portion where the metal wiring line is not formed. Particularly, when a multilayer metallization line is formed in the back-end parts 100B-a and 100B-b, the antenna constituting the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112- The coil may be formed with the metal wiring line of the uppermost layer.

When the antenna or coil constituting the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b is formed together with the metal wiring line, the first chip wireless transmitting / receiving terminal 112- And the second chip wireless transmitting / receiving terminal 112-b, it is possible to reduce manufacturing time and manufacturing cost.

13, which schematically shows a cross-section of a semiconductor package according to another embodiment of the present invention, a first chip wireless transmitting / receiving terminal 112-a and a second chip wireless transmitting / A first intermediate member 106-a used for mounting the semiconductor chip 100-a and the second semiconductor chip 100-b on the substrate 1 and the first semiconductor chip 100-a, respectively, and May be formed in the second intermediate member 106-b. That is, when the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b are respectively composed of antennas or coils, the antenna or coil is connected to the first intermediate member 106- May be formed in the intermediate member 106-b.

Specifically, an antenna or a coil constituting the first chip wireless transmitting / receiving terminal 112-a and the second chip wireless transmitting / receiving terminal 112-b is connected to the first intermediate member 106-a and the second intermediate member 106-b A space close to the area of the first semiconductor chip 100-a or the second semiconductor chip 100-b can be used as a space for forming the antenna or the coil.

In the case where the first intermediate member 106-a or the second intermediate member 106-b is an adhesive tape, the first chip wireless transmitting / receiving end 112-a and the second chip wireless transmitting / receiving end 112-b) can be inserted.

Or the first intermediate member 106-a or the second intermediate member 106-b is an interposer for securing a space for wire bonding, the first chip wireless transmitting / receiving end ( 112-a and the second chip wireless transmitting / receiving terminal 112-b.

At this time, the first chip wireless transmitting / receiving end 112-a or the second chip wireless transmitting and receiving end 112-b formed in the first intermediate member 106-a or the second intermediate member 106- (not shown) for electrical connection with the semiconductor elements in the first semiconductor chip 100a-a or the second semiconductor chip 100-b.

14, which schematically illustrates a cross-section of a semiconductor package according to another embodiment of the present invention, a substrate signal transmitting / receiving end 42 is formed by mounting a first semiconductor chip 100-a on a substrate 1 And is formed in the first intermediate member 106-a used for the second intermediate member 106-a. The first chip wireless transmitting and receiving terminal 112-a is formed in the second intermediate member 106-b used for mounting the second semiconductor chip 100-b on the first semiconductor chip 100-a do. Therefore, another dummy intermediate member 106-d having the second chip wireless transmission / reception end 112-b is further attached on the second semiconductor chip 100-b. The dummy intermediate member 106-d may be the same or similar component as the first intermediate member 106-a or the second intermediate member 106-b. The dummy intermediate member 106-d may be a component that is designed differently from the first intermediate member 106-a or the second intermediate member 106-b in order to enhance the transmission / reception sensitivity of the second chip wireless transmitting / receiving unit 112- have.

1: substrate 10: base substrate
40: Substrate radio signal unit 40S: Substrate transmission signal unit
40E: Substrate reception signal part 42: Substrate signal transmission / reception stage
42a, 42b: coil 44: substrate signal circuit portion
46: substrate signal controller 100, 100-a, 100-b:
106: intermediate member 110: chip radio signal unit
110S: chip transmission signal unit 110E: chip reception signal unit
110 RS: chip-to-chip retransmission signal unit 110RE: inter-chip re-
112: chip signal transmission / reception unit 114: chip signal circuit unit
116: chip signal controller 1000: semiconductor package

Claims (10)

Board; And
And a semiconductor chip for wirelessly transmitting and receiving signals to and from the substrate on the substrate,
Wherein the substrate and the semiconductor chip transmit / receive radio signals to / from each other via magnetic induction, electrostatic induction, or RF antenna.
The method according to claim 1,
Wherein the substrate includes a substrate radio signal portion for transmitting a radio signal to the semiconductor chip and for receiving a radio signal from the semiconductor chip, the semiconductor chip having a substrate for transmitting a radio signal to the substrate, Chip radio signal portion,
Wherein the substrate and the semiconductor chip transmit / receive wireless signals to / from each other through the substrate wireless signal unit and the chip wireless signal unit.
3. The method of claim 2,
Wherein the substrate radio signal unit comprises:
A substrate signal sending / receiving end for generating a wireless signal to be transmitted to the semiconductor chip and receiving a wireless signal from the semiconductor chip;
A substrate signal circuit for converting an internal signal used in the substrate to provide the signal to the substrate signal transmitting and receiving end and converting the signal received at the substrate signal transmitting and receiving end into an internal signal used in the substrate; And
And a substrate signal control unit for controlling the substrate signal circuit unit,
The chip radio signal unit includes:
A chip signal transmitting / receiving end which generates a radio signal to be transmitted to the substrate and receives a radio signal from the substrate;
A chip signal circuit for converting an internal signal used in the semiconductor chip to provide the signal to the chip signal transmitting and receiving end and converting the signal received from the chip signal transmitting and receiving end into an internal signal used in the semiconductor chip; And
And a chip signal control unit for controlling the chip signal circuit unit.
Board; And
And a semiconductor chip for wirelessly transmitting and receiving signals to and from the substrate on the substrate,
Wherein the substrate includes a substrate radio signal portion for transmitting a radio signal to the semiconductor chip and for receiving a radio signal from the semiconductor chip, the semiconductor chip having a substrate for transmitting a radio signal to the substrate, Chip radio signal portion,
Wherein the substrate radio signal unit comprises:
A substrate signal sending / receiving end comprising a substrate sending / receiving coil for generating a radio signal to be transmitted to the semiconductor chip and receiving a radio signal from the semiconductor chip;
A substrate signal circuit for converting an internal signal used in the substrate to provide the signal to the substrate signal transmitting and receiving end and converting the signal received at the substrate signal transmitting and receiving end into an internal signal used in the substrate; And
And a substrate signal control unit for controlling the substrate signal circuit unit,
The chip radio signal unit includes:
A chip signal transmitting / receiving end comprising a chip transmitting / receiving coil for generating a radio signal to be transmitted to the substrate and receiving a radio signal from the substrate;
A chip signal circuit unit for converting an internal signal used in the semiconductor chip to provide the signal to the chip signal transmitting / receiving end and converting the signal received at the chip signal transmitting / receiving end into an internal signal used in the semiconductor chip; And
And a chip signal control unit for controlling the chip signal circuit unit,
And a radio signal is transmitted between the substrate transmission / reception coil and the chip transmission / reception coil.
5. The method of claim 4,
Wherein the substrate transmission and reception coil comprises a first substrate transmission and reception coil for transmitting and receiving a first radio signal and a second substrate transmission and reception coil for transmitting and receiving a second radio signal whose phase is inverted from the first radio signal, Further comprising a substrate differential signal circuitry for processing a differential radio signal comprising a first radio signal and a second radio signal,
Wherein the chip transmission and reception coil comprises a first chip transmission and reception coil for transmitting and receiving the first radio signal and a second chip transmission and reception coil for transmitting and receiving the second radio signal, And a differential signal circuit portion.
6. The method of claim 5,
Wherein the first substrate transceiving coil and the second substrate transceiving coil are connected in series to each other and are arranged so that currents flow in opposite directions,
Wherein the first chip transmission / reception coil and the second chip transmission / reception coil are connected to each other in series and are arranged so that currents flow in opposite directions to each other.
Board; And
And a semiconductor chip for wirelessly transmitting and receiving signals to and from the substrate on the substrate,
Wherein the substrate includes a substrate radio signal portion for transmitting a radio signal to the semiconductor chip and for receiving a radio signal from the semiconductor chip, the semiconductor chip having a substrate for transmitting a radio signal to the substrate, Chip radio signal portion,
Wherein the substrate radio signal unit comprises:
A substrate signal sending / receiving end for generating a wireless signal to be transmitted to the semiconductor chip and for receiving a wireless signal from the semiconductor chip;
A substrate signal circuit for converting an internal signal used in the substrate to provide the signal to the substrate signal transmitting and receiving end and converting the signal received at the substrate signal transmitting and receiving end into an internal signal used in the substrate; And
And a substrate signal control unit for controlling the substrate signal circuit unit,
The chip radio signal unit includes:
A chip signal transmitting / receiving end which generates a radio signal to be transmitted to the substrate and receives a radio signal from the substrate;
A chip signal circuit unit for converting an internal signal used in the semiconductor chip to provide the signal to the chip signal transmitting / receiving end and converting the signal received at the chip signal transmitting / receiving end into an internal signal used in the semiconductor chip; And
And a chip signal control unit for controlling the chip signal circuit unit,
Wherein the substrate and the semiconductor chip transmit and receive wireless signals to each other through the substrate wireless signal unit and the chip wireless signal unit,
Wherein the substrate signal transmitting and receiving end is disposed in the substrate, or on a surface of the substrate,
Wherein the chip signal transmitting and receiving end is disposed in a back end or passivation portion of the semiconductor chip or on a surface of the semiconductor chip and the chip signal circuit portion and the chip signal control portion are disposed in a front end portion of the semiconductor chip Wherein the semiconductor package is a semiconductor package.
8. The method according to any one of claims 2, 4 and 7,
Wherein the substrate radio signal portion includes a substrate transmission signal portion for transmitting a radio signal to the semiconductor chip and a substrate reception signal portion for receiving a radio signal from the semiconductor chip, And a chip receiving signal portion for receiving a radio signal from the substrate,
Wherein the substrate transmission signal unit transmits a radio signal to the chip reception signal unit and the chip transmission signal unit transmits a radio signal to the substrate reception signal unit.
delete Board;
A first semiconductor chip for wirelessly transmitting and receiving a signal on the substrate by magnetic induction or electrostatic induction with the substrate or via an RF antenna; And
And a second semiconductor chip for transmitting and receiving signals wirelessly via magnetic induction or electrostatic induction with the substrate or the first semiconductor chip on the first semiconductor chip or via an RF antenna.
KR20100054902A 2010-06-10 2010-06-10 Semiconductor package KR101510361B1 (en)

Priority Applications (1)

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KR20100054902A KR101510361B1 (en) 2010-06-10 2010-06-10 Semiconductor package

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KR20100054902A KR101510361B1 (en) 2010-06-10 2010-06-10 Semiconductor package

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KR101510361B1 true KR101510361B1 (en) 2015-04-06

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165459A (en) 2005-12-12 2007-06-28 Mitsubishi Electric Corp Multi-chip module
KR20090044483A (en) * 2007-10-31 2009-05-07 주식회사 하이닉스반도체 Semiconductor package
US20090134489A1 (en) * 2007-11-26 2009-05-28 Infineon Technologies Austria Ag System including an inter-chip communication system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165459A (en) 2005-12-12 2007-06-28 Mitsubishi Electric Corp Multi-chip module
KR20090044483A (en) * 2007-10-31 2009-05-07 주식회사 하이닉스반도체 Semiconductor package
US20090134489A1 (en) * 2007-11-26 2009-05-28 Infineon Technologies Austria Ag System including an inter-chip communication system

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