KR101489843B1 - Method and apparatus for enhanced packet traffic arbitration - Google Patents

Abstract

Conveying at least one of a priority state, an operational state, or a frequency state associated with a user device - communicating using at least one scrambling code having good autocorrelation and cross- Share bus; And initiating slot timing for use by a user device.

Description

[0001] METHOD AND APPARATUS FOR ENHANCED PACKET TRAFFIC ARBITRATION [0002]

This application claims priority from Provisional Application No. 61 / 238,585, filed August 31, 2009, entitled " Method and Apparatus for Enhanced Packet Traffic Arbitration ", assigned to the assignee hereof and hereby expressly incorporated by reference herein. .

The present application relates generally to wireless communications. More particularly, the present application relates to an improved packet traffic arbitration scheme between (but not limited to) wireless communication systems such as WiFi and Bluetooth.

In many communication systems, communication networks are used to exchange messages between a plurality of interacting nodes separated from the space. There are many types of networks that can be classified in different aspects. In one example, the geographic scope of the network may be on a wide area, an urban area, a local area or a private area, and the corresponding networks may be a wide area network (WAN), an area area network (MAN) Or as a Personal Area Network (PAN). Networks may also be implemented in a variety of network nodes and types of physical media utilized for waveform propagation (e.g., circuit switching, packet switching, etc.) in the switching / routing techniques Wired vs. wireless) or in a set of communication protocols used (e.g., Internet protocol suite, SONET (Synchronous Optical Networking), Ethernet, wireless LAN protocols, etc.).

A method and apparatus for enhanced packet traffic arbitration is disclosed. According to an aspect, a method for enhanced packet traffic arbitration includes delivering at least one of a priority state, an operational state, or a frequency state associated with a user device, wherein the step of delivering includes: providing autocorrelation and cross- Using at least one scrambling code with a single line shared multi-drop data bus; And initiating slot timing for use by the user device.

According to another aspect, a user device includes a processor and a memory, wherein the memory carries at least one of a priority state, an operating state, or a frequency state associated with the user device - Sharing a single-line shared multi-drop data bus with at least one scrambling code having at least one scrambling code; And program code executed by the processor to perform initiating slot timing for use by the user device.

According to another aspect, an apparatus for enhanced packet traffic arbitration includes means for communicating at least one of a priority state, an operational state, or a frequency state associated with a user device, the transmission comprising at least Using a single scrambling code and sharing a single-line shared multi-drop data bus; And means for initiating slot timing for use by the user device.

According to another aspect, there is provided a computer readable medium storing a computer program, wherein the computer program communicates at least one of a priority state, an operating state, or a frequency state associated with a user device, Using at least one scrambling code having cross-correlation properties and sharing a single-line shared multi-drop data bus; And to initiate slot timing for use by the user device.

The potential advantages of the present application include improved wireless network response to packet traffics.

It is to be understood that other aspects will be readily apparent to those skilled in the art from the following detailed description, and, in the detailed description, various aspects are set forth and described in the manner of example. The drawings and detailed description are to be regarded as illustrative in nature and not as restrictive.

1 is a block diagram illustrating an example of an access node / UE system.
2 shows an example of a wireless communication system supporting a plurality of user devices.
Figure 3 shows an example of an ePTA system.
4 shows an example of the physical interface of the ePTA system.
Figure 5 shows an example of a signal timeline for two user devices.
Figure 6 shows an example of a signal timeline for three user devices.
Figure 7 illustrates an example of the use of the ePTA protocol as a replacement for the PTA protocol for packet traffic arbitration (PTA).
8 shows an exemplary flow chart for enhanced packet traffic arbitration.
9 illustrates an example of a device that includes a processor in communication with a memory for executing processes for enhanced packet traffic arbitration.
FIG. 10 shows an example of a device suitable for enhanced packet traffic arbitration.

The following detailed description, taken in conjunction with the accompanying drawings, is intended as a description of various aspects of the present application and is not intended to represent the only aspects in which the present application may be practiced. Each aspect described in this application is provided by way of example only or as an example of the present application and is not necessarily to be construed as preferred or advantageous over other aspects. The detailed description includes specific details to provide a thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the present application. Acronyms and other descriptive terms may be used for convenience and clarity only, and are not intended to limit the scope of the present application.

Although, for purposes of simplicity of explanation, the methods are shown and described as a series of acts, it is to be understood that some operations may occur in different orders and / or may occur concurrently with other operations depicted and described herein It is to be understood and appreciated that the methods are not limited by the order of acts. For example, those skilled in the art will understand and appreciate that a method may alternatively be represented as a series of interrelated states or events, such as in a state diagram. In addition, not all illustrated acts may be required to implement a methodology in accordance with one or more aspects.

The techniques described herein may be used in various wireless communication systems, such as code division multiple access (CDMA) networks, time division multiple access (TDMA) networks, frequency division multiple access (FDMA) networks, orthogonal frequency division multiple access (OFDMA) networks, FDMA (SC-FDMA) networks, and the like. The terms " networks "and" systems "are often used interchangeably. CDMA networks can implement wireless technologies such as Universal Terrestrial Radio Access (UTRA), cdma2000, and the like. UTRA includes wideband-CDMA (W-CDMA) and low chip rate (LCR). Cdma2000 also covers IS-2000, IS-95 and IS-856 standards. The TDMA network may implement a radio technology such as a general purpose system for mobile communications (GSM). The OFDMA network may implement wireless technologies such as E-UTRA (E-UTRA), IEEE 802.11, IEEE 802.16, IEEE 802.20, Flash-OFDMDM, UTRA, E-UTRA and GSM are part of the Universal Mobile Telecommunications System (UMTS). Long Term Evolution (LTE) is the next release of UMTS using E-UTRA. UTRA, E-UTRA, GSM, UMTS and LTE are presented in documents from an organization named "3rd Generation Partnership Project (3GPP) ". In addition, cdma2000 is presented in documents from an organization named "3rd Generation Partnership Project 2 (3GPP2) ". These various wireless technologies and standards are known in the art.

1 is a block diagram illustrating an example of an access node / UE system 100. As shown in FIG. Those skilled in the art will appreciate that the exemplary access node / UE system 100 shown in FIG. 1 may be implemented in an FDMA environment, an OFDMA environment, a CDMA environment, a WCDMA environment, a TDMA environment, an SDMA environment, or any other suitable wireless environment .

The access node / UE system 100 includes an access node 101 (e.g., a base station) and a user equipment or UE 201 (e.g., a wireless communication device). In the downlink leg, the access node 101 (e.g., a base station) receives, formats, codes, interleaves, and modulates (or symbol maps) traffic data and provides modulation symbols (TX) data processor A (110) that provides the data (e.g. TX data processor A 110 communicates with symbol modulator A 120. Symbol modulator A 120 receives and processes data symbols and downlink pilot symbols and provides a stream of symbols. In an aspect, this is a symbol modulator A (120) that modulates (or symbol maps) traffic data and provides modulation symbols (e.g., data symbols). In an aspect, symbol modulator A 120 communicates with processor A 180, which provides configuration information. Symbol modulator A 120 communicates with transmitter unit (TMTR) A 130. Symbol modulator A (120) multiplexes the data symbols and the downlink pilot symbols and provides them to transmitter unit A (130).

Each symbol to be transmitted may be a data symbol, a downlink pilot symbol, or a signal value of zero. The downlink pilot symbols may be transmitted continuously in each symbol period. In an aspect, the downlink pilot symbols are frequency division multiplexed (FDM). In another aspect, the downlink pilot symbols are orthogonal frequency division multiplexed (OFDM). In yet another aspect, the downlink pilot symbols are code division multiplexed (CDM). In an aspect, transmitter unit A 130 receives a stream of symbols and converts it to one or more analog signals, and further adjusts, e.g., amplifies, filters, and / or frequency upconverts, And generates an analog downlink signal suitable for transmission. Next, the analog downlink signal is transmitted via antenna 140.

In the downlink leg, the UE 201 includes an antenna 210 for receiving an analog downlink signal and for inputting the analog downlink signal to a receiver unit (RCVR) B 220. In an aspect, receiver unit B 220 adjusts, e.g., filters, amplifies, and frequency downconverts the analog downlink signal to a first "adjusted" Next, the first "adjusted" signal is sampled. Receiver unit B (220) communicates with symbol demodulator B (230). Symbol demodulator B 230 demodulates the "sampled" signal (eg, data symbols) and the first "conditioned" signal output from receiver unit B 220. Those skilled in the art will appreciate that there is an alternative to implementing the sampling process in symbol demodulator B 230. [ Symbol demodulator B 230 communicates with processor B 240. Processor B 240 receives the downlink pilot symbols from symbol demodulator B 230 and performs channel estimation on the downlink pilot symbols. In an aspect, channel estimation is a process that characterizes the current propagation environment. Symbol demodulator B 230 receives a frequency response estimate for the downlink leg from processor B 240. Symbol demodulator B 230 performs data demodulation on the data symbols to obtain data symbol estimates for the downlink path. The data symbol estimates for the downlink path are estimates of the transmitted data symbols. Symbol demodulator B 230 also communicates with RX data processor B 250.

RX data processor B 250 receives data symbol estimates for the downlink path from symbol demodulator B 230 and demodulates (e.g., symbol demaps) the data symbol estimates for the downlink path, for example, , Deinterleaves, and / or decodes the traffic data to recover the traffic data. In an aspect, processing by symbol demodulator B 230 and RX data processor B 250 is complementary to processing by symbol modulator A 120 and TX data processor A 110, respectively.

In the uplink leg, UE 201 includes TX data processor B 260. TX data processor B 260 receives and processes the traffic data and outputs data symbols. TX data processor B 260 communicates with symbol modulator D 270. Symbol modulator D 270 receives the data symbols and multiplexes them with uplink pilot symbols, performs modulation, and provides a stream of symbols. In an aspect, symbol modulator D 270 communicates with processor B 240, which provides configuration information. Symbol modulator D (270) communicates with transmitter unit B (280).

Each symbol to be transmitted may be a data symbol, an uplink pilot symbol, or a signal value of zero. The uplink pilot symbols may be transmitted continuously in each symbol period. In an aspect, the uplink pilot symbols are frequency division multiplexed (FDM). In another aspect, the uplink pilot symbols are orthogonal frequency division multiplexed (OFDM). In another aspect, the uplink pilot symbols are code division multiplexed (CDM). In an aspect, transmitter unit B 280 receives a stream of symbols and converts it to one or more analog signals, further modulates, e.g., amplifies, filters and / or frequency upconverts the analog signals, And generates an analog uplink signal suitable for transmission. Next, the analog uplink signal is transmitted via antenna 210. [

The analog uplink signal from UE 201 is received by antenna 140 and processed by receiver unit A 150 to obtain samples. In an aspect, receiver unit A 150 adjusts, e.g., filters, amplifies, and frequency downconverts this analog uplink signal to a second "adjusted" Next, the second "adjusted" signal is sampled. Receiver unit A 150 communicates with symbol demodulator C 160. Those skilled in the art will appreciate that there is an alternative to implementing the sampling process in symbol demodulator C 160. [ Symbol demodulator C 160 performs data demodulation on the data symbols to obtain data symbol estimates for the uplink path and then outputs the data symbol estimates for the uplink pilot symbols and the downlink path to RX data And provides it to the processor A (170). The data symbol estimates for the uplink path are estimates of the transmitted data symbols. RX data processor A 170 processes the data symbol estimates for the uplink path to recover the traffic data transmitted by wireless communication device 201. [ Symbol demodulator C (160) also communicates with processor A (180). Processor A 180 performs channel estimation for each active terminal transmitting on the uplink leg. In an aspect, multiple terminals may simultaneously transmit pilot symbols on the uplink leg through respective assigned sets of pilot subbands where pilot subbandsets may be interlaced.

Processor A 180 and processor B 240 direct (e.g., control, coordinate, or manage) operations at access node 101 (e.g., base station) and UE 201, respectively. In an aspect, one or both of processor A 180 and processor B 240 are associated with one or more memory units (not shown) for storing program codes and / or data. In an aspect, one or both of processor A 180 or processor B 240 performs calculations to derive frequency and impulse response estimates for the uplink leg and the downlink leg, respectively.

In an aspect, the access node / UE system 100 is a multiple access system. (OFDMA), code division multiple access (CDMA), time division multiple access (TDMA), space division multiple access (CDMA), etc.) of multiple access systems (e.g., frequency division multiple access (FDMA), orthogonal frequency division multiple access , Multiple terminals transmit simultaneously on the uplink leg, which allows access to multiple UEs. In an aspect, for multiple access systems, pilot subbands may be shared among different terminals. The channel estimation techniques are used in cases where the pilot subbands for each terminal span the entire operating band (possibly excluding band edges). This pilot subband structure is desirable to obtain frequency diversity for each terminal.

FIG. 2 illustrates an example of a wireless communication system 290 that supports a plurality of user devices. In FIG. 2, reference numerals 292A through 292G denote cells, reference numerals 298A through 298G denote base stations (BS) or Node Bs, and reference numerals 296A through 296J denote access users Devices (also known as user equipments (UE)). The cell size may be different. Any of a variety of algorithms and methods may be used to schedule transmissions in the system 290. System 290 provides communications for multiple cells 292A-292G, each of which is serviced by a corresponding base station 298A-298G, respectively.

One important feature of communication networks is the choice of wired or wireless medium for the transmission of electrical signals between network nodes. In wired networks, tangible physical media such as copper wire, coaxial cable, fiber optic cable, etc. are utilized to propagate guided electromagnetic waves that carry message traffic over a distance. Wired networks are conventional communication networks, and may be preferred in the case of interconnection of fixed network elements or in the case of a large amount of data transmission. For example, fiber optic cables can be used to transmit applications at very high throughputs over long distances between large network hubs, for example, through the continents on the Earth's surface or between large numbers of data transfers between continents , It is often the preferred transmission medium.

On the other hand, in many cases, it is preferred if the network elements are mobile with dynamic connectivity, or if the network architecture is formed with an ad hoc topology rather than a fixed one. Wireless networks utilize electromagnetic waves in frequency bands such as radio, microwave, infrared, and light to utilize intangible physical media in unguided radio waves. Wireless networks have a clear advantage in facilitating user mobility and fast field deployment over fixed wired networks. However, the use of radio waves requires significant active resource management among network users, high levels of cross-tuning, and cooperation for use of compatible spectrum.

For example, popular wireless network technologies include Bluetooth (BT) and wireless wide area networks (WLAN). Bluetooth is a widely used wireless communication protocol for implementing a personal area network (PAN) over a very short distance, typically for a coverage area of a few meters radius, as an alternative to wired interconnection between local components. In one example, Bluetooth can be used to connect personal computers, personal digital assistants (PDAs), mobile phones, wireless headsets, and the like. Alternatively, the WLAN may utilize widely used network protocols, such as WiFi or more generally, the IEEE 802.11 wireless protocol family, and connections between phones and laptops, to connect neighboring devices together for business and customer applications And can be used to interconnect.

Consideration in wireless network technologies is that users often share the same radio frequency band in the same geographic area for transmission. Therefore, co-channel interference is a problem that needs to be actively managed. For example, both Bluetooth and WLAN systems may use the same unlicensed Industrial, Scientific, and Medical (ISM) radio band centered around a frequency of 2.4 GHz. In one example, to save cost, the mobile device may share a common antenna that accesses all of the wireless technologies. To support user scenarios with simultaneous BT and WLAN operations, coexistence algorithms are required. Therefore, a coexistence algorithm is needed to mediate use between Bluetooth and WLAN access technologies for co-located wireless devices.

In one example, a coexistence mechanism is used to mediate coexistent wireless protocols. Coexistence mechanisms may be cooperative, where information is shared between communicating entities, or noncooperative, where information is not shared. One cooperative coexistence mechanism is known as packet traffic arbitration (PTA). PTAs typically use the medium access control (MAC) layer for traffic control.

In current wireless practice, a packet traffic arbitration (PTA) protocol is used to implement coexistence between different access technologies. In one example, a PTA may be implemented over two, three, or four wireless interfaces between BT and WLAN electronic chips in a wireless device. Each access technology makes channel requests for individual packets with an optional priority indication for the channel request. In one example, the arbiter between the BT access technology and the WLAN technology operates at the medium access control (MAC) layer.

The PTA determines which technique acquires access when both access technologies simultaneously contend for a channel request. This mechanism can prevent some collisions between techniques for outgoing traffic, but it does not prevent collisions between received traffic. A collision is a collision when two or more data sources attempt to transmit simultaneously over the same medium.

The PTA is typically implemented, for example, between the WLAN module and the Bluetooth module, as a hardware interface and arbitration protocol within the user devices. In one example, the WLAN module and the Bluetooth module comprise integrated circuits (ICs). PTA typically includes at least three signals:

BT_ACTIVE - asserted for the duration of the transmission

· BT-STATUS - indicates the priority and direction of transmission

· TX_CONFIRM - Indicates whether transmission can proceed in the next slot

· FREQ (optional) - displays frequency status

PTA generally assumes that a WLAN module (e.g., a WLAN IC) is an arbiter. PTA is a feasible coexistence protocol, but has many limitations. For example, the PTA requires three signals, which can not be easily extended, and this does not cover other wireless standards such as LTE or WiMax. PTA is a point-to-point protocol that does not extend to supporting communication between two or more user devices in a system.

The present application includes improvements to the PTA protocol. This improved protocol is referred to as enhanced PTA (ePTA). In order to provide higher user satisfaction, there are a number of requirements for ePTA. In an aspect, a minimum (preferably one) off-chip input / output (I / O) interface is preferred. For example, a parallel digital interface for on-chip ePTA can be used for BT-WLAN integration. In another aspect, larger information transmission is desired. For example, more bits should be allocated for wireless activity, priority level, transmit / receive status, frame synchronization and frame utilization status, and so on. This does not include RF sharing control bits (e.g., LNA gain, power amplifier setting, TX / RX switch control) because power on reset (PoR) control is maintained by BT / WLAN modules to be. In another aspect, the timing should be low latency (e.g., less than 10 microseconds) for request or priority signals, and should have a dynamic response time. In one aspect, ePTA can replace the existing PTA protocol without loss of functionality or more stringent timing requirements. Other desired attributes include multi-drop capabilities (e.g., BT, WLAN and LTE / WiMax), functionality when one or more user devices are asleep, avoiding wake up from dormancy of devices, and Includes low power usage.

Figure 3 shows an example of an ePTA system. Three exemplary devices each having their own unique reference clocks are shown. In an aspect, reference clocks are used to synchronize communications between the devices. The three devices are interconnected via an ePTA bus, which is a single-line shared multi-drop data bus. The ePTA bus is always pulled high by all devices, but low for transmission. The reference clocks are required to be active for devices that are actively communicating. In an aspect, since the ePTA bus is oversampled, the reference clocks need not be balanced or the same frequency. In one example, the single-wire serial bus interface (SSBI) is not used because it is a point-to-point synchronous protocol.

Figure 4 illustrates an example of a physical interface for an ePTA system. In one example, scrambling codes are selected for good autocorrelation and cross-correlation properties. In an aspect, the scrambling codes are used for device identification, initial synchronization, data whitening, and collision detection. In one example, the transmission begins with a sync byte (scrambled in hexadecimal format 0xFF) and ends with a stop byte (unscrambled in hexadecimal format 0xFF). Collision avoidance may be achieved through an assigned device priority (e.g., backoff time). If the two devices are on the same die, direct (e.g., back office) connections are used instead.

Figure 5 shows an example of a signal timeline for two user devices. In one example, the first device proceeds first after the initial synchronization, and the second device accepts the sync word on time.

Figure 6 shows an example of a signal timeline for three user devices. In this example, all devices attempt to communicate simultaneously after synchronization, and all devices fail to accept sink words of another device at a first time.

In an aspect, the protocol for data exchange depends on the access technology used by each device. In one example, in the case of Bluetooth (BT), the binary signal indicates whether or not BT is active, and the 3-bit signal indicates the BT priority status, the other binary signal indicates the transmission / reception status, Other state signals indicate other state variables, such as frequency. In another example, for a WLAN (e.g., WiFi), the status signal indicates an acknowledgment status of the interface. In another example, in the case of LTE / WiMax, the Frame_sync signal may be used for other access technologies for synchronization and the Frame_used signal may indicate whether the current LTE / WiMax frame is in use or available for BT or WLAN to use , And an acknowledgment signal may be used to indicate whether access is authorized. In one example, the Bluetooth device requires good timing off of the Frame sync signal for good use. This can be accomplished by having the Bluetooth device capture the Frame sync clock if the initial request is low and then disturb the software if the Frame sync bit is set.

Figure 7 illustrates an example of the use of the ePTA protocol as an alternative to the PTA protocol for packet traffic arbitration (PTA). In an aspect, existing PTA signaling is replaced by five ePTA exchanges. In Fig. 7, BT slot timing, BT_ACTIVE signal, BT_STATUS signal, FREQ state signal and TX_CONFIRM signal are shown.

8 shows an exemplary flow chart for enhanced packet traffic arbitration. At block 810, the user device is activated. In one example, the user device is a Bluetooth device. In one example, the user device is activated by asserting the BT_ACTIVE signal HIGH. Following block 810, at block 820, a priority state is transferred. In one example, the priority status is a priority status of the user device. In one example, the priority status is communicated to a second user device, a base station, a network controller, a resource manager, and the like. One of ordinary skill in the art will appreciate that the list of recipients in the prioritized state is not inclusive or exclusive, and that other recipients may be involved without affecting the scope or spirit of the present application.

At block 830, an operational state is delivered. In one example, the operating state is the operating state of the user device. In one example, the operational state is a two-level (bilevel) state indicating whether the user device is in a transmitting state or a receiving state. At block 840, the frequency state is transferred. In one example, the frequency state is the frequency state of the user device.

In an aspect, one or more of the propagation steps of blocks 820, 830 or 840 utilizes at least one scrambling code having good autocorrelation and cross-correlation properties. In one example, the scrambling codes are used for device identification, initial synchronization, data whitening, and collision detection. For example, the transmission begins with a sync byte (scrambled in hexadecimal format 0xFF) and ends with a stop byte (unscrambled in hexadecimal format 0xFF). Collision avoidance may be achieved by assigning device priorities (e.g., backoff time). In an aspect, all of the propagation steps of blocks 820, 830, or 840 share a single-line shared multi-drop data bus, such as, for example, an ePTA bus. In one example, a single line shared multi-drop data bus is always pulled high, but goes low for transmission. In one example, a single line shared multi-drop data bus is oversampled.

Those skilled in the art will appreciate that although the steps of blocks 820, 830, or 840 are written in a sequential fashion and in a particular order, these steps may be performed in parallel fashion and with arbitrary repairs to each other. Also, the operational state or frequency state may be communicated to a second user device, a base station, a network controller, a resource manager, and the like. Those skilled in the art will appreciate that the list of recipients shown herein is not inclusive or exclusive, and that other recipients may be involved without affecting the scope or spirit of the present application.

At block 850, the slot timing is initiated for use by the user device. In one example, the slot timing is a Bluetooth slot timing operating between a HIGH state and a LOW state.

Those skilled in the art will appreciate that the steps disclosed in the exemplary flow diagram of Fig. 8 may be interchanged in order, without departing from the scope or spirit of the present application. Those skilled in the art will also appreciate that the steps shown in this flowchart are not exclusive and that other steps may be included or may omit one or more of the steps of the exemplary flowchart without affecting the scope or spirit of the present application .

Those skilled in the art will appreciate that the various illustrative components, logical blocks, modules, circuits, and / or algorithm steps described in connection with the examples disclosed herein may be implemented as electronic hardware, firmware, computer software, As will be appreciated by those skilled in the art. In order to clarify the interchangeability of hardware, firmware and software, various illustrative components, blocks, modules, circuits and / or algorithm steps have generally been described in terms of their functionality. Whether such functionality is implemented in hardware, firmware, or software depends upon the design constraints imposed on the particular application and the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope and spirit of this application.

For example, in the case of a hardware implementation, the processing units may be implemented as one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices Microprocessors, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof, as is well known in the art. By software, an implementation may be implemented through modules (e.g., procedures, functions, and so on) that perform the functions described herein. The software codes may be stored in memory units and executed by a processor unit. In addition, the various illustrative flowcharts, logical blocks, modules, and / or algorithm steps described herein may be implemented on any computer readable medium, including any computer program product known in the art, But may also be coded as computer readable instructions to be carried.

In one or more examples, the steps or functions described herein may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions may be stored on or transmitted via one or more instructions or code on a computer readable medium. Computer-readable media includes both computer storage media and communication media including any medium for facilitating transfer of a computer program from one place to another. The storage medium may be any available media that can be accessed by a computer. For example, such computer-readable media may store program code required in the form of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or instructions or data structures Or any other medium that can be used to communicate, or that can be accessed by a computer. Also, any connection may be properly considered as a computer-readable medium. For example, if the software is transmitted over a wireless technology such as a coaxial cable, a fiber optic cable, a twisted pair, a digital subscriber line (DSL), or infrared, radio, and microwave from a web site, server, Wireless technologies such as coaxial cable, fiber optic cable, twisted pair cable, DSL, or infrared, radio, and microwave may be included in the definition of such a medium. As used herein, a disc and a disc may be a compact disc (CD), a laser disc, an optical disc, a digital versatile disc (DVD), a floppy disc, And Blu-ray discs, in which discs usually reproduce data magnetically, while discs reproduce data optically using a laser. The combinations should also be included within the scope of computer readable media.

In an example, the exemplary components, flows, logical blocks, modules, and / or algorithm steps described herein may be implemented or performed with one or more processors. In an aspect, a processor is coupled to a memory that stores data, metadata, program instructions, etc. that may be executed by a processor to implement or perform the various flowcharts, logical blocks and / or modules described herein do. FIG. 9 illustrates an example of a device 900 that includes a processor 910 that communicates with memory 920 to execute processes for enhanced packet traffic arbitration. In one example, the device 900 is used to implement the algorithm shown in FIG. In an aspect, memory 920 is located within processor 910. In another aspect, the memory 920 is external to the processor 910. In an aspect, a processor includes circuitry for implementing or performing the various flowcharts, logical blocks and / or modules described herein.

FIG. 10 illustrates an example of a device 1000 suitable for enhanced packet traffic arbitration. In an aspect, device 1000 includes at least one processor 1010, 1020, 1030, 1040, and 1050 that includes one or more modules configured to provide different aspects of enhanced packet traffic arbitration as described herein Lt; / RTI > For example, each module includes hardware, firmware, software, or a combination thereof. In an aspect, device 1000 is also implemented by at least one memory in communication with at least one processor.

The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the spirit and scope of the present application.

Claims (36)

A method for enhanced packet traffic arbitration,
The method comprising: conveying at least one of a frequency state, an operating state, or a priority state associated with a user device, the communicating comprising using a single-line shared multi- Sharing a multi-drop data bus, wherein the single-line shared multi-drop data bus is oversampled; And
And initiating slot timing for use by the user device.
A method for enhanced packet traffic arbitration. The method according to claim 1,
Wherein the at least one scrambling code is a code for at least one of device identification, initial synchronization, data whitening, collision detection or collision avoidance. The method according to claim 1,
≪ / RTI > further comprising avoiding conflicts by assigning device priorities. The method of claim 3,
Wherein the single-line shared multi-drop data bus is always pulled high, but is low during transmission. 5. The method of claim 4,
Wherein the transmission begins with a sync byte and ends with a stop byte. delete The method according to claim 1,
Wherein the single-line shared multi-drop data bus is an ePTA bus. The method according to claim 1,
Wherein the user device is a Bluetooth device. 9. The method of claim 8,
Wherein the Bluetooth device is activated by asserting a BT_ACTIVE signal to HIGH. The method according to claim 1,
Wherein the user device is operationally compatible with one or more of a WLAN system, a WiFi system, an IEEE 802.11 wireless system, an LTE system, or a WiMax system. A user device comprising a processor and a memory,
The memory comprising:
The method comprising: transmitting at least one of a frequency state, an operating state, or a priority state associated with the user device, the communicating being a single-line shared multi-user mode using at least one scrambling code, Drop data bus, wherein the single-line shared multi-drop data bus is oversampled; And
Initiating slot timing for use by the user device
Comprising program code executable by the processor to perform the steps of:
User device. 12. The method of claim 11,
Wherein the at least one scrambling code is a code for at least one of device identification, initial synchronization, data whitening, collision detection or collision avoidance. 12. The method of claim 11,
Wherein the memory further comprises program code for avoiding conflict by assigning a device priority. 14. The method of claim 13,
The single-line shared multi-drop data bus is always pulled high, but goes low during transmission. 15. The method of claim 14,
Wherein the transmission begins with a sync byte and ends with a stop byte. delete 12. The method of claim 11,
Wherein the single-line shared multi-drop data bus is an ePTA bus. 12. The method of claim 11,
Wherein the user device is a Bluetooth device. 19. The method of claim 18,
Wherein the Bluetooth device is activated by asserting a BT_ACTIVE signal to HIGH. 12. The method of claim 11,
Wherein the user device is operably compatible with one or more of a WLAN system, a WiFi system, an IEEE 802.11 wireless system, an LTE system, or a WiMax system. An apparatus for enhanced packet traffic arbitration,
Means for transferring at least one of a frequency state, an operating state, or a priority state associated with a user device, the transfer comprising a single-line shared multi-drop using at least one scrambling code and carrying a status relating to another user device, Sharing a data bus, wherein the single line shared multi-drop data bus is oversampled; And
And means for initiating slot timing for use by the user device.
A device for enhanced packet traffic arbitration. 22. The method of claim 21,
Wherein the at least one scrambling code is a code for at least one of device identification, initial synchronization, data whitening, collision detection or collision avoidance. 22. The method of claim 21,
Further comprising means for avoiding collisions by assigning device priorities. 24. The method of claim 23,
Wherein the single-line shared multi-drop data bus is always pulled high, but goes low during transmission. 25. The method of claim 24,
Wherein the transmission begins with a sync byte and ends with a stop byte. delete 22. The method of claim 21,
Wherein the single-line shared multi-drop data bus is an ePTA bus. 22. The method of claim 21,
The apparatus is operatively compatible with one or more of a WLAN system, a WiFi system, an IEEE 802.11 wireless system, an LTE system, or a WiMax system. A computer readable medium storing a computer program,
The execution of the computer program,
Wherein the transfer of at least one of a frequency state, an operating state, or a priority state associated with a user device, the transfer being performed using a single-line shared multi-drop data bus Wherein the single-line shared multi-drop data bus is oversampled; And
And to initiate slot timing for use by the user device.
Computer readable medium. 30. The method of claim 29,
Wherein the at least one scrambling code is a code for at least one of device identification, initial synchronization, data whitening, collision detection or collision avoidance. 30. The method of claim 29,
And the execution of the computer program is also for avoiding conflict by assigning a device priority. 32. The method of claim 31,
Wherein the single-line shared multi-drop data bus is always pulled high, but goes low during transmission. 33. The method of claim 32,
Wherein the transmission begins with a sync byte and ends with a stop byte. delete 30. The method of claim 29,
Wherein the single line shared multi-drop data bus is an ePTA bus. 30. The method of claim 29,
Wherein the execution of the computer program is operably compatible with one or more of a WLAN system, a WiFi system, an IEEE 802.11 wireless system, an LTE system, or a WiMax system.

Images