KR101437779B1 - Thin Film Transistor Having Oxide Semiconductor and Method for Fabricating the Same - Google Patents

Thin Film Transistor Having Oxide Semiconductor and Method for Fabricating the Same Download PDF

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KR101437779B1
KR101437779B1 KR1020130052407A KR20130052407A KR101437779B1 KR 101437779 B1 KR101437779 B1 KR 101437779B1 KR 1020130052407 A KR1020130052407 A KR 1020130052407A KR 20130052407 A KR20130052407 A KR 20130052407A KR 101437779 B1 KR101437779 B1 KR 101437779B1
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semiconductor layer
oxide semiconductor
metal
metal dots
substrate
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KR1020130052407A
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Korean (ko)
Inventor
홍진표
강태성
구자현
김태윤
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한양대학교 산학협력단
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02628—Liquid deposition using solutions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Abstract

A thin film transistor and a method of manufacturing the same are provided. The thin film transistor has a gate electrode positioned on the substrate. A gate insulating film is disposed on the gate electrode. An oxide semiconductor layer is located on the gate insulating film. Metal dots are located on the oxide semiconductor layer. A source electrode and a drain electrode are connected to both ends of the oxide semiconductor layer, respectively.

Description

[0001] The present invention relates to a thin film transistor having an oxide semiconductor layer and a manufacturing method thereof,

The present invention relates to a semiconductor device, and more particularly, to a thin film transistor.

The oxide semiconductor thin film transistor means a thin film transistor using an oxide semiconductor as a channel layer. Such an oxide semiconductor thin film transistor exhibits a higher electron mobility than a conventional thin film transistor using an amorphous silicon layer and has an advantage that it exhibits excellent uniformity compared to a thin film transistor using a polycrystalline silicon layer.

These oxide semiconductors serve to provide conductive charge within the oxygen vacancies therein. When external oxygen or moisture adsorbs on the oxide semiconductor, a change in the charge concentration may occur. As a result, a change in electrical characteristics of the oxide semiconductor thin film transistor may occur depending on the external environment. Therefore, there is an attempt to apply a protective film when manufacturing an oxide semiconductor thin film transistor (Korean Patent Publication No. 2011-0032360).

Further, the electron mobility of the oxide semiconductor needs to be further improved.

SUMMARY OF THE INVENTION The present invention provides a thin film transistor having improved electric charge mobility and little change in electric characteristics due to external gas such as oxygen or moisture, and a method for manufacturing the same.

According to an aspect of the present invention, there is provided a thin film transistor. The thin film transistor has a gate electrode positioned on the substrate. A gate insulating film is disposed on the gate electrode. An oxide semiconductor layer is located on the gate insulating film. Metal dots are located on the oxide semiconductor layer. A source electrode and a drain electrode are connected to both ends of the oxide semiconductor layer, respectively.

The metal dots may have a work function that is equal to or lower than the work function of the oxide semiconductor layer. In addition, or separately, the metal dots may have a higher oxidation degree than the metal constituting the oxide semiconductor layer. Specifically, the metal dots may have a large standard electrode potential in a negative direction relative to a standard electrode potential of a metal constituting the oxide semiconductor layer.

The oxide semiconductor layer may be a semiconductor layer having a polycrystalline structure. For example, the oxide semiconductor layer may be a ZnO layer. In this case, the metal dots may be Al, In, Ag, Ta, W, Ti, Mo, Ca, And each of these alloys. Alternatively, the metal dots may include Mn, Ti, Al, Ce, Na, Ca, K, Li, Zr, Ga, Cr, Co, Ni, Fe, Nb, V, Te, Mg, Cs, and alloys thereof.

The substrate may be a polymer substrate.

According to an aspect of the present invention, there is provided a method of manufacturing a thin film transistor. First, a gate electrode is formed on a substrate. A gate insulating film is formed on the gate electrode. And an oxide semiconductor layer is formed on the gate insulating film. And metal dots are formed on the oxide semiconductor layer. And source and drain electrodes connected to both ends of the oxide semiconductor layer are formed.

The oxide semiconductor layer may be formed using a solution process. Specifically, the oxide semiconductor layer may be formed by coating a solution composition containing a metal salt and a solvent on the gate insulating layer and then heat-treating the solution composition.

According to the present invention, it is possible to obtain a thin film transistor in which electric property change is small due to external gas such as oxygen or moisture while the charge mobility is improved.

1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention.
2 is a cross-sectional view illustrating a thin film transistor according to another embodiment of the present invention.
FIGS. 3 and 4 are graphs showing V G -I D curves of a thin film transistor according to a manufacturing example.
5 and 6 are graphs showing V G -I D curves of a thin film transistor according to a comparative example.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms.

When a layer is referred to herein as being "on" another layer or substrate, it may be formed directly on another layer or substrate, or a third layer may be interposed therebetween. In the present specification, directional expressions of the upper side, the upper side, the upper side, and the like can be understood to mean lower, lower (lower), lower or sideways, sides (sides), sides and the like. That is, the expression of the spatial direction should be understood in a relative direction, and it should not be construed as definitively as an absolute direction.

Further, in the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like reference numerals designate like elements throughout the specification.

1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention.

Referring to Figure 1, a substrate 10 is provided. The substrate 10 may be a glass, metal, semiconductor, or polymer substrate. The polymer substrate may be, for example, a PET substrate, the semiconductor substrate may be a crystalline silicon substrate, and the metal substrate may be, for example, an SUS substrate.

A buffer layer 11 may be formed on the substrate 10. The buffer layer 11 may be formed of a silicon oxide film, a silicon nitride film, or a composite layer thereof. The buffer layer 11 may be a layer for shielding impurities that may be introduced from the substrate 10 into a semiconductor layer described later. However, the formation of the buffer layer 11 may be omitted.

The gate electrode G can be formed on the buffer layer 11. [ The gate electrode G may be one metal electrode selected from the group consisting of aluminum, silver, copper, molybdenum, chromium, titanium, tantalum, and alloys thereof. However, when the substrate 10 is a semiconductor or a metal substrate, the formation of the buffer layer 11 and the gate electrode G may be omitted, and the substrate 10 itself may serve as a gate electrode.

A gate insulating film 15 may be formed on the gate electrode G. The gate insulating film 15 may be a silicon oxide film, a silicon nitride film, or a composite film thereof.

The oxide semiconductor layer (C) can be formed on the gate insulating film (15). The oxide semiconductor layer (C) may be InZnO, InGaO, InSnO, ZnSnO, GaSnO, GaZnO, or GaInZnO. The oxide semiconductor layer C may be a ZnO film as an example of a semiconductor layer having a polycrystalline structure . The oxide semiconductor layer (C) having a polycrystalline structure may have a higher charge mobility than an oxide semiconductor having an amorphous structure, for example, InGaZnO. In addition, since In or Ga, which is more expensive than InGaZnO, is not used, it is also possible to lower the process cost. However, the oxide semiconductor layer having a polycrystalline structure may have a disadvantage that the charge mobility can be limited as the grain boundary existing therein acts as a charge trap site.

The oxide semiconductor layer (C) may be a semiconductor layer formed by a sputtering method or a solution process as an example of a vapor deposition method. When the oxide semiconductor layer (C) is formed using a solution process, a solution composition including a metal salt and a solvent may be coated on the gate insulating film 15 and then heat treated to form the oxide semiconductor layer (C). In this case, the metal salt may be metal acetate, metal nitrate or metal hydroxide. When the oxide semiconductor layer (C) is a ZnO film, the metal salt may be a zinc salt. Zinc salts can be obtained using ZnO powder and ammonium hydroxide (NH4OH). The oxide semiconductor layer (C) formed through the solution process may have a porous structure due to the evaporation of the solvent during the heat treatment. In this case, adsorption of oxygen and moisture outside can be facilitated, which may cause a change in the charge mobility of the oxide semiconductor layer (C).

Thereafter, the source electrode S and the drain electrode D can be formed on the oxide semiconductor layer C, respectively. The source electrode S and the drain electrode D may be formed by depositing a metal while using a shadow mask. The source electrode S and the drain electrode D may be one metal electrode selected from the group including aluminum, silver, copper, molybdenum, chromium, titanium, tantalum, and their respective alloys.

The metal dots 20 may be formed on the oxide semiconductor layer C exposed between the source electrode S and the drain electrode D. [ However, the present invention is not limited thereto. The source electrode S and the drain electrode D may be formed after the metal dots 20 are formed on the oxide semiconductor layer C. When forming a very thin metal layer having a thickness of about 1 nm to 10 nm on the oxide semiconductor layer (C), this metal layer may not be formed as a continuous layer but may be formed of metal dots 20 as shown. At this time, the metal dots 120 may be formed by a vapor deposition method, for example, a thermal deposition method, an electron beam deposition method, a sputtering method, a chemical vapor deposition method, or the like.

As another example, after arranging the AAO template on the oxide semiconductor layer (C), vapor deposition may be performed to form the metal dots (20). Alternatively, metal dots 20 may be formed by forming a metal film using a vapor deposition method, a spin coating method, a printing method, or the like, and then performing laser annealing as an example of annealing or etching using reactive ion etching can do. The metal dots 20 may have a size of 1 to 50 nm.

When forming the metal dots 20 using this method, the metal dots 20 can be formed at a relatively low temperature (about 250 degrees or less), so that the oxide semiconductor layer (C) It is possible to minimize damage to the oxide semiconductor layer C formed by the substrate 10 and to minimize thermal damage to the substrate 10 when the substrate 10 is a flexible substrate such as a polymer substrate.

The metal dots 20 may have a work function that is equal to or lower than the work function of the oxide semiconductor layer (C). In this case, the metal dots 20 can make an ohmic contact with the oxide semiconductor layer (C). Further, when the oxide semiconductor layer C has a polycrystalline structure having a grain boundary, the metal from the metal dots 20 into the grain boundary can be introduced by diffusion, and in this case, the probability of charge trapping by the grain boundary is reduced . As a result, the charge loss can be reduced and the charge mobility can be increased. In the case where the oxide semiconductor layer C is an oxide semiconductor layer based on ZnO (work function is about 4.45 eV), the metal dots 20 may be formed of Al, In, Ag, Ta, W, Ti, Or each of these alloys.

The metal dots 20 may be a metal having a higher oxidation degree than the metal constituting the oxide semiconductor layer (C). In this case, the metal dots 120 can be oxidized first, compared with oxygen vacancies in the oxide semiconductor layer C, so that oxygen or moisture enters the oxide semiconductor layer (C) . As a result, the oxygen vacancy level change in the oxide semiconductor layer (C) can be prevented, and the change in electrical characteristics of the thin film transistor can be reduced. Accordingly, the metal dots 120 itself can serve as a passivation layer. As described above, if the oxide semiconductor layer (C) is formed through the solution process and has porosity, it may be more vulnerable to oxygen or moisture. By forming the metal dots 120, oxygen or moisture may be generated in the oxide semiconductor layer C), and thus it is possible to exhibit a greater effect. As an example, the metal dots 20 may have a large standard electrode potential in the negative direction relative to the standard electrode potential of the metal constituting the oxide semiconductor layer (C). In particular, when the oxide semiconductor layer (C) is an oxide semiconductor layer based on ZnO (standard electrode potential is about -0.7 V), the metal dots 20 are formed of Mn, Ti, Al, Ce, Li, Zr, Ga, Cr, Co, Ni, Fe, Nb, V, Te, Mg, Cs, or an alloy thereof.

The metal dots 20 have a work function that is equal to or lower than the work function of the oxide semiconductor layer C and may have a higher degree of oxidation as compared with the metal constituting the oxide semiconductor layer C. [ In this case, the metal dots 20 may be Al or Ti, Ca, or an alloy thereof.

On the other hand, since the charge mobility of the oxide semiconductor layer 20 can be controlled by selecting the kind of the metal dots 20, the threshold voltage of the thin film transistor can be adjusted.

Such a thin film transistor is applicable to an organic electroluminescent device, a liquid crystal display device, an electronic paper, a flexible display device, an image sensor, and an electronic technology field.

2 is a cross-sectional view illustrating a thin film transistor according to another embodiment of the present invention. The thin film transistor according to this embodiment may be substantially the same as the thin film transistor described with reference to Fig. 1, except as described below.

2, an insulating spacer 17 may be formed on the sidewalls of the source electrode S and the drain electrode D before the metal dots 20 are formed. By forming the insulating spacer 17, a short circuit can be prevented from occurring between the metal dots 20 and the source electrode S or the drain electrode D. The formation of the insulating spacer 17 can be performed by laminating an insulating film on the substrate on which the source and drain electrodes S and D are formed before forming the metal dots 20 and then anisotropically etching the insulating film. The insulating spacers 17 may be silicon oxide or silicon nitride.

Hereinafter, preferred examples will be given to facilitate understanding of the present invention. It should be understood, however, that the following examples are for the purpose of promoting understanding of the present invention and are not intended to limit the scope of the present invention.

<Experimental Examples> examples>

&Lt; Example of Thin Film Transistor Manufacturing &

A single crystal silicon substrate was thermally oxidized on a single crystal silicon substrate to form a silicon oxide film of about 100 nm. A ZnO semiconductor layer having a thickness of 5 to 40 nm was formed on the silicon oxide film by a spin coating method. The source and drain electrodes were formed by depositing Al metal on the ZnO semiconductor layer using a shadow mask. Al dots of several nm in size were formed on the ZnO semiconductor layer exposed between the source electrode and the drain electrode by thermal evaporation.

<Comparative Example>

Thin film transistors were fabricated using the same method as the production example except that Al dots were not formed.

FIG. 3 is a graph showing V G -I D curves (V D = 10 V) measured after applying a voltage of about 20 V during the time written in the gate electrode of the thin film transistor according to the manufacturing example, during the writing time to the gate electrode of the thin film transistor according to the after applying a voltage of about -20V is the one showing the V G -I D curve measurement (V D = 10V) graph.

FIG. 5 is a graph showing V G -I D curves (V D = 10 V) measured after applying a voltage of about 20 V during the time written in the gate electrode of the thin film transistor according to the comparative example. 6 is a graph showing V G -I D curves (V D = 10 V) measured after applying a voltage of about -20 V during the time written in the gate electrode of the thin film transistor according to the comparative example. At this time, the single crystal silicon substrate served as a gate electrode.

3, 4, 5, and 6, a thin film transistor according to a manufacturing example has a structure in which a voltage of 20 V (FIG. 3) or -20 V (FIG. 4) It can be seen that almost the same curve can be obtained even when the V G -I D curve is measured after applying the seconds, 2000 seconds, 2800 seconds, or 3200 seconds. On the other hand, the thin film transistor according to the comparative example in which no Al dots are formed has a voltage of 20 V (FIG. 5) or -20 V (FIG. 6) applied to the gate electrode at 0 second, 400 seconds, 1200 seconds, 1600 seconds, 2000 seconds, , Or 3200 seconds, it can be seen that the measured V G -I D curves are all different or have a profile that is more varied than the production example. Therefore, it can be seen that the thin film transistor according to the manufacturing example can exhibit reliable and uniform electrical characteristics even in an extreme environment. This can be understood as a result of metal dots performing very well the role of passivation.

In addition, the semiconductor layer of the thin film transistor according to the production example exhibits a charge mobility of about 11.36 cm 2 / Vs, while the semiconductor layer of the thin film transistor according to the comparative example exhibits a charge mobility of about 1 to 3 cm 2 / Vs . From these results, it can be predicted that the metal in the metal dot flows into the semiconductor layer to reduce the charge loss generated at the grain boundary.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, This is possible.

Claims (20)

A gate electrode positioned on the substrate;
A gate insulating film disposed on the gate electrode;
An oxide semiconductor layer located on the gate insulating film;
Metal dots located on the oxide semiconductor layer; And
And a source electrode and a drain electrode connected to both ends of the oxide semiconductor layer. The method according to claim 1,
Wherein the metal dots have a work function that is equal to or lower than a work function of the oxide semiconductor layer. 3. The method according to claim 1 or 2,
Wherein the metal dots have a higher oxidation degree than the metal constituting the oxide semiconductor layer. The method of claim 3,
Wherein the metal dots have a large standard electrode potential in a negative direction relative to a standard electrode potential of a metal constituting the oxide semiconductor layer. The method according to claim 1,
Wherein the oxide semiconductor layer is a semiconductor layer having a polycrystalline structure. 6. The method according to claim 1 or 5,
Wherein the oxide semiconductor layer is a ZnO layer. The method according to claim 6,
The metal dots include Al, In, Ag, Ta, W, Ti, Mo, Ca, And a metal selected from the group consisting of these alloys. The method according to claim 6,
The metal dots include Mn, Ti, Al, Ce, Na, Ca, K, Li, Zr, Ga, Cr, Co, Ni, Fe, Nb, V, Te, Mg, Cs, and alloys thereof. The method according to claim 1,
Wherein the substrate is a polymer substrate. Forming a gate electrode on the substrate;
Forming a gate insulating film on the gate electrode
Forming an oxide semiconductor layer on the gate insulating layer;
Forming metal dots on the oxide semiconductor layer; And
And forming a source electrode and a drain electrode to be connected to both ends of the oxide semiconductor layer. 11. The method of claim 10,
Wherein the metal dots have a work function that is equal to or lower than the work function of the oxide semiconductor layer. The method according to claim 10 or 11,
Wherein the metal dots have a higher oxidation degree than the metal constituting the oxide semiconductor layer. 13. The method of claim 12,
Wherein the metal dots have a large standard electrode potential in a negative direction relative to a standard electrode potential of a metal constituting the oxide semiconductor layer. 11. The method of claim 10,
Wherein the oxide semiconductor layer is formed using a solution process. 15. The method of claim 14,
Wherein the oxide semiconductor layer is formed by coating a solution composition containing a metal salt and a solvent on the gate insulating layer and then heat treating the solution composition. 11. The method of claim 10,
Wherein the oxide semiconductor layer is a semiconductor layer having a polycrystalline structure. 17. The method according to claim 10 or 16,
Wherein the oxide semiconductor layer is a ZnO layer. 18. The method of claim 17,
The metal dots include Al, In, Ag, Ta, W, Ti, Mo, Ca, And a metal selected from the group consisting of these alloys. 18. The method of claim 17,
The metal dots include Mn, Ti, Al, Ce, Na, Ca, K, Li, Zr, Ga, Cr, Co, Ni, Fe, Nb, V, Te, Mg, Cs, and alloys thereof. 11. The method of claim 10,
Wherein the substrate is a polymer substrate.


KR1020130052407A 2013-05-09 2013-05-09 Thin Film Transistor Having Oxide Semiconductor and Method for Fabricating the Same KR101437779B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113875022A (en) * 2019-06-04 2021-12-31 堺显示器制品株式会社 Thin film transistor, method of manufacturing the same, and display device

Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH07106647A (en) * 1993-09-30 1995-04-21 Hitachi Ltd Superconducting element
JP2008004791A (en) 2006-06-23 2008-01-10 Sony Corp Negative resistance element, its manufacturing method, single-electron tunnel element, its manufacturing method, photosensor, its manufacturing method, functional element, and its manufacturing method
KR20100046576A (en) * 2008-10-27 2010-05-07 삼성전자주식회사 Transistor and semiconductor device comprising the same
KR20110071712A (en) * 2009-12-21 2011-06-29 삼성전자주식회사 Image sensor having transparent interconnections

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07106647A (en) * 1993-09-30 1995-04-21 Hitachi Ltd Superconducting element
JP2008004791A (en) 2006-06-23 2008-01-10 Sony Corp Negative resistance element, its manufacturing method, single-electron tunnel element, its manufacturing method, photosensor, its manufacturing method, functional element, and its manufacturing method
KR20100046576A (en) * 2008-10-27 2010-05-07 삼성전자주식회사 Transistor and semiconductor device comprising the same
KR20110071712A (en) * 2009-12-21 2011-06-29 삼성전자주식회사 Image sensor having transparent interconnections

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113875022A (en) * 2019-06-04 2021-12-31 堺显示器制品株式会社 Thin film transistor, method of manufacturing the same, and display device

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