KR101403726B1 - Wafer flippng apparatus and wafer manufacturing method by it - Google Patents
Wafer flippng apparatus and wafer manufacturing method by it Download PDFInfo
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- KR101403726B1 KR101403726B1 KR1020130003302A KR20130003302A KR101403726B1 KR 101403726 B1 KR101403726 B1 KR 101403726B1 KR 1020130003302 A KR1020130003302 A KR 1020130003302A KR 20130003302 A KR20130003302 A KR 20130003302A KR 101403726 B1 KR101403726 B1 KR 101403726B1
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- South Korea
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- wafer
- bow
- cassette
- value
- reversing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
- H01L21/67766—Mechanical parts of transfer devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67796—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations with angular orientation of workpieces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
- Y10S414/137—Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
Abstract
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer inverting apparatus capable of improving the quality of an epitaxial wafer by controlling the bow of a silicon wafer in the production of an epitaxial wafer, and a wafer manufacturing method using the same.
The present invention relates to a cassette in which a plurality of wafers are embedded; A load port on which the cassette is loaded; Information transfer means for acquiring data of a wafer positioned at the load port; A main PC for extracting a bow value of the wafer among the data of the wafer transferred from the information transferring means; And a reversing robot for reversing the wafer according to a bow (bow or bow) value of the wafer transferred from the main PC.
The present invention also provides a method of manufacturing a wafer including slicing, lapping, etching, grinding, and polishing, wherein the bow of the wafer (bow or bend ) ≪ / RTI > And reversing the wafer according to a bow value of the wafer.
Description
BACKGROUND OF THE
Generally, a circular-shaped ingot is grown from a melt containing polycrystalline silicon as a raw material, and then subjected to a slicing step of thinly cutting the ingot in the axial direction, thereby producing a disk-shaped single crystal silicon wafer.
In this way, a slicing process is performed by a cutting device having a wire to make the ingot into a silicon wafer. However, due to the stress applied to the silicon wafer due to the cutting force of the wire, the silicon wafer is warped, The measured values are indicated by Warp and Bow.
Warp means the difference between the maximum value and the minimum value from the reference plane of the wafer to the median plane of the wafer.
1 is a view showing the concept of Bow.
As shown in FIG. 1, when the center point of the wafer is located on the reference plane of the wafer, that is, when the center point is above the reference plane, (-) value at the lower position, and a distance difference from the median point of the wafer.
2 is a view showing a processing locus of a single crystal ingot considering a temperature change of a single crystal ingot during a slicing process.
As shown in Fig. 2, the temperature rapidly increases during the initial growth of the ingot, the temperature tends to be lowered at the later growth of the ingot after maintaining the high temperature state.
Therefore, the thermal deformation of the ingot varies depending on the axial position of the ingot. This is because the processing locus of the wire on the seed side and the tail side of the ingot during slicing of the ingot is different from each other, The bending phenomenon appears distinctly in the seeded portion and the tailed portion of the substrate.
Fig. 3 is a view showing a processing locus of a single crystal ingot in consideration of thermal deformation of a main roller during a slicing process. Fig.
As shown in FIG. 3, the main roller to which the wire is wound to cut the ingot is also overheated by the rotational motion, and the thermal deformation of the main roller is different according to the axial position of the main roller.
Therefore, the thermal deformation of the main rollers is different depending on the axial position of the main roller. Similarly, the processing locus of the wire on the seed side and the tail side of the ingot during the slicing process of the ingot is different, The bending phenomenon becomes more prominent toward the tail than the seed of the ingot.
Fig. 4 is a view showing the processing locus of a single crystal ingot considering the thermal deformation of the single crystal ingot and the main roller during the slicing process and the bow of each single crystal ingot.
Considering the thermal deformation of the ingot and the thermal deformation of the main roller as shown in FIG. 4, the processing locus of the wafer sliced by the wire is as follows. From the seeded portion to the tail portion, Can be seen to decrease. At this time, it can be seen that the (+) bow value is maintained at the seed portion and the (-) bow value is maintained at the tail portion, but the region maintaining the (+) bow value is more.
Generally, an epitaxial wafer (hereinafter referred to as an epitaxial wafer) can be made by growing an epitaxial layer on the surface of a silicon wafer, but the warpage of the epitaxial wafer also changes with the warp of the silicon wafer.
When the epitaxial layer is grown on the (+) bow silicon wafer, the epitaxial wafer is further bent. However, when the epitaxial layer is grown on the (-) bow silicon wafer, the epitaxial wafer is less bent. Of course, the bow value of the epi wafer can be set variously.
Therefore, it is advantageous to use a silicon wafer having a (-) bow value in order to improve the quality of an epi wafer, and Korean Patent Publication No. 2007-0070697 also mentions such a technology.
However, as described above, the bow values of the wafers vary according to the axial position of the ingot.
Therefore, wafers having various bending degrees can be reversed to a desired shape and then subjected to an epitaxial growth process, whereby an epitaxial wafer having a desired bow value can be manufactured.
It is an object of the present invention to provide a wafer inverting apparatus capable of improving the quality of an epi wafer by providing a bow value of a silicon wafer in a desired shape before an epitaxial growth process and a wafer manufacturing method using the same.
The quality of wafers is managed by an integrated information management system (MES: Manufacturing Execution System) in which wafer data is stored, and when a cassette is placed on the load port, the wafers built in the cassette are subjected to bow Wherein the wafer inverting apparatus comprises: a label that is provided in the cassette and can read wafer data stored in the cassette; and a controller that reads a label of a cassette located in the load port An information transmitting means including a reader; A main PC for receiving wafer data stored in a cassette corresponding to a label read from the information transmission means from a Manufacturing Execution System (MES) and extracting a bow value of the wafer; And a reversing robot for reversing the wafer according to a bow value of the wafer transferred from the main PC, and a wafer reversing apparatus provided between the etching apparatus and the grinding apparatus.
In addition, the present invention is characterized in that wafer quality is managed by an integrated information management system (MES: Manufacturing Execution System) in which wafer data is stored and slicing, lapping, etching, grinding, Polishing, and epitaxial growth, the method comprising the steps of: receiving and extracting a bow (bow or bow) value of a wafer after the etching process from the integrated information management system; And reversing the wafer if the bow value of the wafer exceeds 0. After the polishing process, the wafer is subjected to an epitaxial growth process for growing an epitaxial layer in such a manner as to maintain a negative bow value And a method for manufacturing a wafer.
By reversing the silicon wafer, the present invention can provide a silicon wafer of a desired shape with a bow value where desired during the process.
Therefore, if the silicon wafer is provided in a form having a desired bow value between the etching step and the polishing step while the silicon wafer is processed before forming the epi layer, a silicon wafer having a desired bow value is applied to the epitaxial growth step And it is possible to improve the quality by reducing the warping phenomenon in an epi wafer produced through such a process.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing a Bow concept of a wafer. Fig.
2 is a view showing a processing locus of a single crystal ingot considering a temperature change of a single crystal ingot during a slicing process;
3 is a view showing a processing locus of a single crystal ingot considering thermal deformation of a main roller during a slicing process;
4 is a view showing a processing locus of a single crystal ingot considering the thermal deformation of a single crystal ingot and a main roller during a slicing process and a bow of a position of a single crystal ingot.
5 is a front view showing a wafer inverting apparatus according to the present invention.
6 is a side view of the wafer inverting apparatus according to the present invention.
7 is a plan view showing a reversing robot of the wafer inverting apparatus according to the present invention;
8A to 8C are views showing an example in which a reversing robot of the wafer inverting apparatus according to the present invention is operated.
9 is a view showing an example in which the wafer inverting apparatus according to the present invention is operated.
10 is a flowchart showing a wafer manufacturing method according to the present invention.
Hereinafter, the present embodiment will be described in detail with reference to the accompanying drawings. It should be understood, however, that the scope of the inventive concept of the present embodiment can be determined from the matters disclosed in the present embodiment, and the spirit of the present invention possessed by the present embodiment is not limited to the embodiments in which addition, Variations.
5 to 6 are views showing a wafer inverting apparatus according to the present invention.
5 to 6, the wafer inverting apparatus of the present invention includes a
The
However, in the embodiment, the label may be formed in the form of a bar code, and the label may be formed in another form such as a QR-code or the like. . At this time, when the
The
The
The
The reversing
7 is a plan view showing a reverse robot of the wafer inverting apparatus according to the present invention.
The reversing robot of the present invention is configured to include a
The
At this time, the
The moving
5) as the
The
Of course, the
8A to 8C are views showing an example of the operation of the inversion robot of the wafer inversion apparatus according to the present invention.
First, a bow value is received from the main PC 140 (shown in FIG. 5) of information of the wafers W built in the cassette 110 (shown in FIG. 5).
If the bow value is (-), the wafers W held in the cassette 110 (shown in FIG. 5) are maintained as they are. If the bow value is positive, Is reversed by the hand 151 (shown in FIG. 7), which will be described in detail below.
Of course, the presence or absence of the wafer W among the slots of the cassette 110 (shown in FIG. 5) is checked by the mapping sensor 153 (shown in FIG. 7) And approaches the slot of the cassette 110 (shown in FIG. 5) where the wafer W is located.
The
As shown in FIG. 8B, when the
The
By repeating this process, the wafers W stored in the
9 is a diagram showing an example in which the wafer inverting apparatus according to the present invention is operated.
The wafer inverting apparatus of the present invention can operate to maintain the (-) bow value by reversing the wafers from the
the barcode is recognized from the label on the
the reversing
(c), the information of each wafer is transmitted from an integrated information management system (MES) by recognizing the bar code, and the bow value of the wafer information is transmitted. In this case, the inversion process is performed when the value is the (+) bow value, and the inversion process is judged to be omitted if the value is the (-) bow value.
the reversing
(e), the reversing
When the operation is completed in the
10 is a flowchart showing a wafer manufacturing method according to the present invention.
In order to improve the quality of the epitaxial wafer of the present invention, the silicon wafer should have a negative bow value before forming the epi layer. For this purpose, as shown in FIG. 10, (-) bow value in the process, it is not limited.
First, a slicing process is performed (refer to S1)
Since the ingot grown in a cylindrical shape is cut into a thin disk-like wafer by using a wire, not only the damage is caused to the surface of the silicon wafer but the flatness is not uniform. At this time, the silicon wafers are warped, and the warpage of the silicon wafers can be found by the bow value or the warp value.
Then, a lapping process is performed (see S2)
Silicon wafers can be mechanically polished to remove damage and improve flatness.
Then, an etching process is performed (see S3)
The silicon wafer is subjected to an etching process, which is a chemical polishing process, in order to remove the remaining damage in spite of the mechanical polishing, and a silicon wafer is contained on a predetermined etching solution. At this time, several silicon wafers are stacked on the cassette at a predetermined interval, and silicon wafers embedded in the cassette can be packed in the etching solution at a time.
Next, the bow of the silicon wafers is measured (see S4).
Silicon wafers are embedded in a cassette, and the information of silicon wafers embedded in each cassette is stored in an integrated information management system. Therefore, when the bar code is recognized from the label attached to the cassette, the information of the silicon wafers for each cassette, that is, the bow value, can be received from the integrated information management system.
Next, when the bow value of the silicon wafer exceeds 0, the wafer is inverted (see S5 and S6)
The silicon wafers are laminated again on the cassette by the wafer inverting apparatus described above so as to maintain the negative (-) bow value.
Next, the polishing process is performed in a state in which the bow value of the silicon wafer is kept at 0 or less (refer to S7).
When the epitaxial layer is grown on the surface of the silicon wafer having the (-) bow value, the bow value of the epitaxial wafer or the warp The value can be lowered and the quality can be improved.
The wafer manufacturing process according to the present invention is characterized in that during polishing of the silicon wafer, the degree of polishing is different on the upper and lower sides of the silicon wafer during the polishing process, so that the bow value of the silicon wafer is maintained between - .
Therefore, the change of the bow value during the process of silicon wafer cleavage can be understood as follows. In the etching (chemical etching: C / E), the silicon wafer holds about 1 bow value, The wafer is reversed.
Thereafter, a similar bow value can be maintained in the etching process and the polishing process by maintaining the silicon wafer at about 1 bow value in double side polishing (DSP) or final polishing (FP).
On the other hand, in the conventional process, the epi wafer is made without adjusting the bow value of the silicon wafer. In the epi wafer subjected to the conventional process, the bow value is 8.35 and the warp value is 21.29.
On the other hand, in the process of the present invention, the bow value of a silicon wafer is adjusted to (-) to make an epitaxial wafer. In the epitaxial wafer subjected to the process of the present invention, the bow value is 6.86 and the warp value is 17.55.
That is, by adjusting the bow value to (-) rather than adjusting the bow value, it is possible to further reduce warpage and improve quality by forming an epitaxial wafer.
110: cassette 120: load port
130: Information transmission means 140: Main PC
150: Reverse robot
Claims (9)
The wafer inverting apparatus includes:
An information transferring means including a label provided in the cassette and capable of reading wafer data embedded in the cassette, and a reader for reading a label of a cassette located in the load port;
A main PC for receiving wafer data stored in a cassette corresponding to a label read from the information transmission means from a Manufacturing Execution System (MES) and extracting a bow value of the wafer; And
And a reversing robot for reversing the wafer according to a bow value of the wafer transferred from the main PC,
A wafer inverting apparatus provided between an etching apparatus and a grinding apparatus.
At least two or more load ports are provided,
The inversion robot includes:
A vacuum hand for vacuum-adsorbing a silicon wafer,
A driving unit for rotating the vacuum hand,
And a moving stage for moving the vacuum hand between the load ports.
Wherein the cassette includes the wafers in a plurality of slots at predetermined intervals,
Wherein the reversing robot is provided with a mapping sensor for measuring the presence or absence of a wafer on the slots.
And the reversing robot reverses the wafer when the bow value of the wafer exceeds zero.
(Bow or bow) value of the wafer after the etching process is received from the integrated information management system and extracted; And
And reversing the wafer if the bow value of the wafer exceeds 0,
Wherein the wafer is subjected to an epitaxial growth process for growing an epitaxial layer in such a manner as to maintain a (-) bow value after the polishing process.
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KR1020130003302A KR101403726B1 (en) | 2013-01-11 | 2013-01-11 | Wafer flippng apparatus and wafer manufacturing method by it |
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KR1020130003302A KR101403726B1 (en) | 2013-01-11 | 2013-01-11 | Wafer flippng apparatus and wafer manufacturing method by it |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115338171A (en) * | 2022-08-21 | 2022-11-15 | 浙江奥首材料科技有限公司 | Wafer protective coating cleaning equipment |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100431515B1 (en) | 2001-07-30 | 2004-05-14 | 한국디엔에스 주식회사 | Wafer reverse unit for semicondutor cleaning equipment |
KR20070070697A (en) * | 2005-12-29 | 2007-07-04 | 주식회사 실트론 | Producing method of wafer, and wafer made thereby |
US20120234238A1 (en) | 2011-03-18 | 2012-09-20 | Wei-Yung Hsu | Integrated metrology for wafer screening |
-
2013
- 2013-01-11 KR KR1020130003302A patent/KR101403726B1/en active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100431515B1 (en) | 2001-07-30 | 2004-05-14 | 한국디엔에스 주식회사 | Wafer reverse unit for semicondutor cleaning equipment |
KR20070070697A (en) * | 2005-12-29 | 2007-07-04 | 주식회사 실트론 | Producing method of wafer, and wafer made thereby |
US20120234238A1 (en) | 2011-03-18 | 2012-09-20 | Wei-Yung Hsu | Integrated metrology for wafer screening |
WO2012129051A2 (en) | 2011-03-18 | 2012-09-27 | Applied Materials, Inc. | Integrated metrology for wafer screening |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115338171A (en) * | 2022-08-21 | 2022-11-15 | 浙江奥首材料科技有限公司 | Wafer protective coating cleaning equipment |
CN115338171B (en) * | 2022-08-21 | 2023-08-29 | 浙江奥首材料科技有限公司 | Wafer protective coating cleaning equipment |
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