KR101398960B1 - Method for recording operation time using flash memory - Google Patents

Method for recording operation time using flash memory Download PDF

Info

Publication number
KR101398960B1
KR101398960B1 KR1020130109680A KR20130109680A KR101398960B1 KR 101398960 B1 KR101398960 B1 KR 101398960B1 KR 1020130109680 A KR1020130109680 A KR 1020130109680A KR 20130109680 A KR20130109680 A KR 20130109680A KR 101398960 B1 KR101398960 B1 KR 101398960B1
Authority
KR
South Korea
Prior art keywords
data
operation time
block
recorded
recording
Prior art date
Application number
KR1020130109680A
Other languages
Korean (ko)
Inventor
박상혁
Original Assignee
엘아이지넥스원 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘아이지넥스원 주식회사 filed Critical 엘아이지넥스원 주식회사
Priority to KR1020130109680A priority Critical patent/KR101398960B1/en
Application granted granted Critical
Publication of KR101398960B1 publication Critical patent/KR101398960B1/en

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)

Abstract

We disclose how to record operating time using flash memory. There is provided an operating time recording method using a flash memory of an operating time recording system including a flash memory having a plurality of blocks for storing and erasing data, a timer, and a control unit, Setting a predetermined number of blocks in an operation time recording area, and when a timing signal is periodically received from the timer, sequentially recording data corresponding to the operation time in a predetermined order in a block of the operation time recording area When the data is recorded in the entire operation time recording area, incrementing or decrementing the data in a preset unit and rotating the data in the operation time recording area and recording the rotated data in the operation time recording area, The operating time recorded in the operating time recording area The group to read the given method includes a step of outputting to calculate the operating time of the operating time recording system.

Figure R1020130109680

Description

[0001] METHOD FOR RECORDING OPERATION TIME USING FLASH MEMORY [0002]

The present invention relates to an operating time recording method, and more particularly, to an efficient operating time recording method using a small capacity flash memory.

Recently, various systems are often set to record operating time for various purposes such as periodic part replacement, product lifetime verification, etc. in order to increase the stability. Most systems that record operating time record the previous operating time even when the power is not applied, and accumulate the operating time accumulated at the previous operating time after the power is applied. This is to make it possible to record the total operating time actually operated by the system. Therefore, since the operation time must be memorized even when the power is not applied to the system, most of the operation time is recorded using the nonvolatile memory. Among the nonvolatile memories, recently, a flash memory having a high capacity and a relatively low cost is used to record the operating time very frequently.

However, flash memories have a disadvantage in that they erase data recorded on a block-by-block basis. Most of the systems that use flash memory to record the operating time have an operating system (OS) or a separate flash memory management program installed to separate the physical address of the flash memory and the logical address used in the software We can overcome these shortcomings. Software that manages the flash memory generally manages the flash memory on a page basis and periodically performs garbage collecting to secure the memory capacity for recovering data that is no longer needed. However, a separate memory management program is designed to have versatility applicable to various situations, so that the program is complicated and the load is large.

On the other hand, recently, the spread of electronic devices using a small-sized embedded system operating with a flash memory of 1 Mbyte or less has been greatly expanded without using a separate OS.

In such a small embedded system, it is difficult to provide a logical address different from the physical address because there is no OA, and developing and applying a separate management program for managing the flash memory for one variable for the operating time Not only is it a waste, but it also requires additional memory to store and run the management program, resulting in an unnecessary expense. In addition, performing garbage collection also causes a load on the control processor of the system, which is not suitable for a small system such as an embedded system.

Accordingly, in a system that does not have an OS or a management program, a large data area (for example, 10 Mbytes) is set as an area for calculating the operation time in the flash memory in order to calculate the operation time, After erasing, data of 0x00 is recorded by 1 byte every minute. When the operation time is confirmed, the operation time is determined by calculating the number of bytes in which 0x00 is recorded. In this way, the operating time can be recorded in a simple manner in a system that records the operating time, but there is a limitation that the memory capacity must be increased when the operating time is long. For example, in the case of recording the operation time by recording 1 byte every minute as described above, a very large memory capacity of 5.3 Mbytes is required to record the operation time of 10 years. If it is desired to reduce the memory capacity by repeatedly performing the read / write operation to the same area in order to reduce the memory capacity, the erase time is longer than the write time, which is disadvantageous. The life of the flash memory is shortened.

Korean Patent Registration No. 0448905 discloses a system in which a flash memory can be used for system operation and storage. However, the above Korean registered patent has a limitation that it can not be applied to a small-sized embedded system in which an OS is not installed, because the OS manages the flash memory through a plurality of different interface devices.

It is an object of the present invention to provide an operation time recording method capable of easily recording operation time even in a small size flash memory area in a small embedded system without a separate memory management program.

According to an aspect of the present invention, there is provided an operating time recording method using a flash memory, including a flash memory having a plurality of blocks for storing and erasing data, a timer, and a flash memory Wherein the control unit sets a predetermined number of blocks among a plurality of blocks of the flash memory as an operation time recording area, Recording data corresponding to the operation time sequentially in a predetermined order in a block of the operation time recording area when a timing signal is periodically received from the timer; When the data is recorded in the entire operation time recording area, incrementing or decrementing the data in a preset unit and rotating the data in the operation time recording area and recording the data again; And reading the data recorded in the operation time recording area and calculating and outputting an operation time of the operation time recording system in a predetermined manner when the operation time confirmation command is received from the outside; .

The setting of the operation time recording area may include setting Tn (where Tn is a natural number of 3 or more) blocks in the operation time recording area.

Wherein the step of writing the data comprises: when the timing signal is received for the first time, writing the data to the lowest address of the block having the lowest memory address among the at least Tn blocks; Each time the timing signal is received, sequentially increasing the address of the previous last data and recording the data; And writing the data to the lowest address of an adjacent (n + 1) -th block if the previously recorded data is the last address of the n-th block. And a control unit.

(N is a natural number less than or equal to Tn) of the Tn blocks and data is written to the (n + 1) -th block, the data of the The method comprising the steps of:

The data erasing step erases the data of the (Tn-1) th block if the (n + 1) th block is the first block and erases the data of the Tn th block if the (n + 1) .

Wherein the step of writing to the lowest address sets the initial value of the data to a maximum value in byte units instead of an erase state in correspondence with the timing signal that is initially received.

The step of rotating and recording may include decreasing the value of the data by one every time the rotation is performed.

The step of calculating and outputting the operating time may include:

Tn * N + (n-1) * N + Bn * Ti}

(Where 0xFE is the data for which the initial operation time is to be recorded, which is the value of decimal number 14, Dn is the data value recorded in the nth block in which the current data is written, and Tn is the total number of blocks in the operating time recording area, N represents the number of bytes per block, n represents a block in which the current data is recorded, and Bn represents the number of bytes in which data other than the erase status data (0xFF) is recorded in the nth block in which the current data is recorded And Ti denotes a period in which the timing signal is generated in the timer 30 in unit time).

Wherein the step of writing to the lowest address sets an initial value of the data to a minimum value in units of bytes instead of an erase state corresponding to the timing signal that is initially received.

The step of rotating and recording may include incrementing the value of the data by one each time the rotation is performed.

Therefore, the operation time recording method using the flash memory of the present invention uses at least three memory block areas as the operation recording area and sequentially reduces the data of the memory in the operation recording area every 1 byte, And allows relatively long system operating times to be recorded even with very little memory capacity. In addition, since a separate flash memory management program is not required, it is possible to reduce load and memory capacity loss caused by the management program, and as a result, it can be effectively applied to a small-sized embedded system.

1 shows an operating time recording system according to an embodiment of the present invention.
2 and 3 show an example of data recorded in the operation time recording area according to the present invention.
4 and 5 illustrate a method of recording operating time using a flash memory according to an embodiment of the present invention.

In order to fully understand the present invention, operational advantages of the present invention, and objects achieved by the practice of the present invention, reference should be made to the accompanying drawings and the accompanying drawings which illustrate preferred embodiments of the present invention.

Hereinafter, the present invention will be described in detail with reference to the preferred embodiments of the present invention with reference to the accompanying drawings. However, the present invention can be implemented in various different forms, and is not limited to the embodiments described. In order to clearly describe the present invention, parts that are not related to the description are omitted, and the same reference numerals in the drawings denote the same members.

Throughout the specification, when an element is referred to as "including" an element, it does not exclude other elements unless specifically stated to the contrary. The terms "part", "unit", "module", "block", and the like described in the specification mean units for processing at least one function or operation, And a combination of software.

1 shows an operating time recording system using a flash memory according to an embodiment of the present invention.

Referring to FIG. 1, an operation time recording system 1 using a flash memory of the present invention includes a processor 10, a memory controller 20, a timer 30, and a flash memory 40 as a small-sized embedded system. The processor 10 is a central processing unit (CPU) that processes various data according to the use of the system. The processor 10 controls the memory control unit 20 by sending a memory control signal to the memory control unit 20, Data is stored in the flash memory 30 or data is read out. The processor 10 performs predetermined tasks using the data read from the flash memory 40 and transmits data generated or modified as a result of the execution to the flash memory 40 through the memory controller 20. [ . When it is necessary to check the operation time, the processor 10 transmits an operation time confirmation signal to the memory controller 20 to acquire the operation time data stored in the flash memory 40, System to obtain the operating time of the system 1. [ The processor 10 may check the operation time periodically (for example, one minute), and if the user interface or the communication unit is further provided in the system 1, the operation time can be confirmed when an operation time confirmation command is received from the outside . It is also possible to output the confirmed operation time to the outside via the user interface or communication unit.

The memory control unit 20 controls the flash memory 40 in response to a memory control signal applied from the processor 10 to input and output data to and from the flash memory 40. [ In particular, the memory controller 20 sets a preset capacity of the flash memory 40 to a predetermined operating time for recording the operating time of the system 1. On the other hand, when the timing signal is received from the timer 30, the memory controller 20 records data in the operating time zone of the flash memory 40 according to a predetermined method. When the operation time confirmation signal is received from the processor 10, the data read in the operation time area of the flash memory 40 is read and transferred to the processor 10.

The timer 30 operates simultaneously with the operation of the system when power is supplied to the system 1 and transmits a timing signal to the memory controller 20 every predetermined time (for example, one minute) To modify the data of the operation time recording area allocated for recording the operation time of the memory area of the flash memory 30. [

The flash memory 40 is a memory device for storing data. In the present invention, it means a NAND flash memory that supports high-speed access and large capacity and is relatively inexpensive. The flash memory 40 receives and stores data under the control of the memory control unit 20 or outputs stored data. In particular, the flash memory 40 of the present invention sets an area designated by the memory controller 20 as an operation time recording area and stores data corresponding to the operation time.

Here, the operation time recording area is set to at least three blocks each having a predetermined memory capacity. The flash memory 40, particularly the NAND flash memory, is designed to perform a block-by-block erase operation of a predetermined size. Therefore, the operation time recording area is also set in units of blocks, and in the present invention at least three blocks are set as the operation time recording area. The size of the block unit may be variously set according to the setting of the flash memory 40. In the present invention, it is assumed that each block unit has a size of 4 Kbytes. The setting of at least three blocks in the operation time recording area is performed in order to record data for the current operation time in two blocks among at least three blocks and to perform data erasure in the remaining blocks. That is, in the present invention, data is written in two of at least three blocks alternately, and data is rewritten by erasing the remaining blocks while data is being written in two blocks. This is because the NAND flash memory provides block erase only.

Although the processor 10 and the memory controller 20 are separately shown for the sake of convenience, the processor 10 and the memory controller 20 may be integrated into a controller. Particularly, in the case of the small-sized embedded system according to the present invention, it is very rare that a separate memory controller 20 is provided. Therefore, the processor 10 is generally implemented as a controller that performs the functions of the memory controller 20 together. That is, the functions of the memory control unit 20 can be implemented by software.

2 and 3 show an example of data recorded in the operation time recording area according to the present invention.

Referring to FIG. 2 and FIG. 3, it is assumed that three 4-Kbyte blocks B1 to B3 are set as the operation time recording area as described above. In the present invention, it is assumed that three blocks (B1 to B3) from the most advanced memory address (0x0000) of the flash memory 40 are set as the operating time domain for convenience of explanation. However, another memory address area of the flash memory 40 may be set in the operation time recording area. However, it is preferable that the operation time recording area is set to have a continuous address, but it is not necessary to be continuous.

In FIG. 2, (a) is an initial state before the system is operated, and all data is erased in the operation time region. Therefore, all data in the operation recording area is 0xFF. That is, if the data of all the blocks B1 to B3 is in the erased state (0xFF), the processor 10 can recognize the initial state in which the operating time of the system is zero.

(b) is a state in which the operation time is started to be recorded. When the timer 30 takes the first predetermined time (for example, one minute) after the system operation, the timer 30 outputs a timing signal, 20 starts to write data (0xFE) which is one less than the data (0xFF) in the erase state from the address (0x0000) most advanced in the operation time recording area in response to the timing signal. (0xFE), which is the first byte of the first block (B1) out of the three blocks (B1 to B3) in the operation time recording area, is written to the erased state (0xFF).

When data is written to the first block B1 and the remaining two blocks B2 to B3 are erased, the processor 10 writes the erased data ( 0xFF) can be analyzed to determine the operating time. If data (0xFE) is recorded in 300 bytes in the first block B1, it can be determined that the operating time of the system is 300 units of time. Herein, the unit time is a time unit in which the timer 30 outputs the timing signal, and since the time set in the timer is assumed to be 1 minute, 300 unit time means 300 minutes.

(c) is a state in which after data 0xFE is recorded in all 4,096 bytes in the 4-Kbyte block of the first block B1 and data 0xFE is first written in the second block B2, . (0xFE) is written in all the bytes of the first block B1 when the timing signal is applied from the timer 30 at a time of 4097 unit time since the system starts to operate, the second block B2 The data (0xFE) is recorded. At this time, all the bytes of the first block B1 hold the data (0xFE) and all the bytes of the third block B3 hold the erased state (0xFF).

The data 0xFE is written in the second block B2 after the data 0xFE is written in 4096 bytes of the first block B2 and the operation time is set to the number of bytes 4096 of the first block B1 + Can be calculated as the number of bytes in which data (0xFE) is recorded in the second block (B2).

3D shows a case where the data 0xFE is written to the first and second blocks B1 and B2 and then the data 0xFE is written to the third block B3 so that the operation time is 4096 * 2 = And a case where the next timing signal is applied after 8192 unit time. Since the data 0xFE is written in the first and second blocks B1 and B2 at the operating time of 8193 unit time, the data 0xFE is written in the third block B3 from the initial address 0x20000 of the data 0xFE, Is recorded. At the same time, the first block B1 is erased. As described above, the flash memory requires an erase operation on a block-by-block basis in order to rewrite other data in the same memory area. Therefore, in the present invention, the first block B1 is erased at the time when data is to be recorded in the third block B3. The reason why the data of the second block B2 is not erased is that the data to be written in the first byte of the third block B3 can refer to the data written to the last byte of the second block B2. That is, in the present invention, each of the blocks B1 to B3 records data with reference to the data of the previous block.

(e) shows a method of recording the operation time after the data (0xFE) is recorded up to the third block B3. if data (0xFE) is recorded in three blocks (B1 to B3) as shown in (e), data is already erased and data is again reduced by 1 from the first block (B1) 0xFD). At the same time, the data of the second block B2 is erased. That is, the data can be sequentially rotated in the first to third blocks B1 to B3 while being rotated. At this time, the data of the first address of the first block B1 is decremented by 1 from the data recorded at the last address of the third block B3. In other words, as described above, the operation time recording system of the present invention records data in the operation time recording area with reference to data in the adjacent previous byte, while the byte at the head of the operation recording area has the last address 1 < / RTI >

When blocks B1 to B3 in which data are to be written are switched to the next block, blocks other than the immediately preceding block are erased so that data having different data values can be recorded thereafter.

Therefore, after the initial state in which the initial data is recorded, the adjacent two blocks of at least three blocks are in a state in which data is recorded, and all the remaining blocks are kept in the erased state. The reason why the data is recorded in the two blocks is to allow the data of the currently recorded block to refer to the data value recorded in the previous block.

(e) is a state in which data is recorded in the first block B1 as in (b), but unlike in (b), data is recorded in the operation time recording area and rotated. The processor 10 for determining the operating time determines the number of rotations using the data value. That is, the difference value obtained by subtracting the currently recorded data from the data (0xFE) in which the initial operation time is recorded is the number of rotations immediately. The number of rotations means the operating time corresponding to the number of bytes in the entire operation time recording area.

Finally, (f) shows a state in which the maximum recordable time is recorded in the operation time recording area. Since the data is set to decrease by 1 each time the rotation is performed from the erase state (0xFF), data (0x00) is recorded in all the bytes of the third block (B3) when the recordable maximum operating time is recorded.

Therefore, since the operating time can be recorded until data (0x00) is written from the erased data (0xFF) to the 3 blocks (B1 to B3) of 4 Kbytes in size, the recordable operating time is the number of writable bits per 1 byte * The number of bytes in each block * can be calculated as the number of blocks. Since the number of recordable bits per 1 byte is 2 8, it should be calculated as 256, but the state in which the data (0xFF) is written in the flash memory is an erase state and it is a state before the operation time is recorded. Therefore, 2 8 -1 is calculated as 255. Since the number of bytes of each block is 4 Kbytes, 4 * 2 10 = 4096, and the number of blocks (B1 to B3) is 3. Thus, the flash memory of FIG. 2 can record the unit time of 255 * 4096 * 3 = 3,133,440 as the maximum recordable operation time.

Here, since the unit time is assumed to be the time unit in which the timer 30 outputs the timing signal and the time set in the timer is 1 minute, the operation time recording area of the flash memory of FIG. 2 records the operation time of about 5.98 years .

As a result, it is possible to record operation time of almost 6 years with 12Kbyte flash memory capacity using 3 blocks of 4Kbyte size, and as a result, it is possible to use the flash memory capacity of 24Kbyte by using 6 blocks of 4Kbyte size, Can be recorded.

This is because the conventional method requires a recording capacity of 5.3 Mbytes in order to record the operation time of 10 years in comparison with the operation time recording method in which data of 0x00 by 1 byte is recorded in the erase state (0xFF) Since the invention requires only a capacity of 24 Kbytes, it means that the same effect can be obtained even in the operating time recording area of 0.5% of the conventional method.

In addition, in the case where an area for recording the number of repetitions (for example, 1 byte) is additionally provided, all of the operation time recording areas B1 to B3 can be re-initialized and re-recorded, . However, re-initialization and re-recording are not preferable because data error or loss may occur depending on the number of rewritable times of the flash memory.

The operating time recorded in the flash memory 40 can be calculated according to Equation (1).

Figure 112013083511882-pat00001

(Where 0xFE is the data for which the initial operation time is to be recorded, which is the value of decimal number 14, Dn is the data value recorded in the nth block in which the current data is written, and Tn is the total number of blocks in the operating time recording area, N represents the number of bytes per block, n represents a block in which the current data is recorded, and Bn represents the number of bytes in which data other than the erase status data (0xFF) is recorded in the nth block in which the current data is recorded And Ti represents a period for generating the timing signal in the timer 30 in units of time.

Equation (1) shows a formula for calculating the operation time when the operation time is recorded in the operation time recording area. In the case of the initial state in which the operation time is not recorded, ), An initial state can be additionally defined separately from Equation (1). That is, when all the blocks are in an erase state, it can be determined that the system is in an initial state.

4 and 5 illustrate a method of recording operating time using a flash memory according to an embodiment of the present invention.

Referring to FIGS. 4 and 5, the memory controller 20 in the operation time recording system of the present invention determines whether an operation time confirmation signal is received from the processor 10 (S110). If an operation time confirmation signal is received, the processor 10 starts an operation time read operation (S120). The operation time confirmation signal is a signal transmitted from the processor 10 to the memory control unit 20 in order to confirm the operation time as described above. If the processor 10 and the memory control unit 20 are integrated into a control unit The operation time read operation can be started periodically or from outside by receiving the operation time confirmation command.

When the operation time reading operation is started, the processor 10 acquires and analyzes data of the operation time recording area allocated to the flash memory 40 through the memory control unit 20 (S130). Then, it is determined whether all the analyzed data is in an erased state, that is, whether all blocks T1 to Tn are erased (S140). If all the blocks T1 to Tn are in the erased state, the system is determined to be in an initial state that has not been operated or operated until the initial unit time (S150). However, if there is at least one block in which data is recorded, not all the blocks T1 to Tn are in an erase state, the operation time is calculated according to Equation 1 (S160).

On the other hand, if the operation time confirmation signal is not received, step A is performed to determine whether the operation time write operation is performed or not. In the step A, the memory control unit 20 first determines whether a timing signal is received from the timer 30 (S210). If the timing signal is not received, step B is performed again to determine whether the operation time read operation is performed or not (step S110). However, when the timing signal is received, the operation time writing operation for recording the operation time is started (S215). In order to perform the operation time write operation, the processor 10 first receives and confirms data of each of a plurality of blocks in the operation time recording area through the memory control unit 20 (S220). Then, it is determined whether all the blocks T1 to Tn are erased from the confirmed data (S225).

The first address ADD of the first block Tl of the plurality of blocks T1 to Tn is set to the data value Dn in the first block Tl of the first block Tl since the previous system is operated and all the blocks are in the erased state, (Here, 0xFE). The initial data is a data value for recording the operation time by distinguishing from the erase state (0xFF) at the initial stage of operation of the system. In the present invention, the data value decreased by 1 in the erased state (0xFF) is set as the initial data value (0xFE). However, since the initial data value is distinguished from the erase state (0xFF) and may be set to a value that can determine the operation time, 0x00 may be set to the initial data value, and other values may be set. However, in order to facilitate the calculation of the operating time during the operation time read operation, it is desirable that the maximum value (0xFE) or the minimum value (0x00) among the distinguishable values from the erase state (0xFF) is set as the initial data value.

On the other hand, if the data T1 to T3 of all the blocks are not in the erased state, even in the final recording block (n) and the last recording block (n) The address of the byte is analyzed (S235). As a result of the analysis, it is determined whether the address of the last recorded byte is the last address N of the corresponding block n (S240).

If the address (Add) of the last recorded byte is not the last address (N) of the block (n), the address (Add) of the last recorded byte is added to the next address (Add + 1) of the address The same data Dn is recorded (S245).

On the other hand, if the address of the last recording byte is the last address N of the last recording block n, then the last recording block n is the last one of the plurality of blocks T1 to Tn allocated to the operation time recording area, It is determined whether the block is Tn (S250). If it is determined that the last recording block n is the Tn block Tn, since data is completely recorded from the first address of the first block T1 to the last address of the Tn block Tn, The data Dn-1 obtained by subtracting 1 from the last data Dn of the address Tn is recorded (S255). Then, all the data of the block (n-1) preceding the last recording block (n) are erased (S260).

Here, the data of Dn-1 obtained by subtracting 1 from the data Dn at the last address of the Tn block Tn is recorded because the data is set to record the operation time by subtracting 1 from the initial data (0xFE) to be. If the initial data is set to 0x00, the data may be incremented by one for each rotation and written to the first address of the first block (T1). In addition, the units of increase and decrease of data at the time of rotation are set to 1 in the above description, but they may be set to larger units. However, since the present invention aims to record the maximum operation time with a small memory capacity, it is desirable to increase or decrease the unit as a minimum division unit of data by one unit.

If the last recording block n is not the Tn block Tn among the plurality of blocks T1 to Tn allocated to the operation time recording area, The data Dn is recorded in the address (S265). Then, it is determined whether the last recording block n is the first block T1 or the second block T2 (S270). If it is determined that the last recording block n is the first block T1, all the data recorded in the Tn-1 block Tn-1 is erased and the final recording block n is erased from the second block T2 ), All the data recorded in the Tn block Tn is erased (S275).

Although not shown, the step of setting the operation time recording area in the flash memory 40 by the memory control unit 20 may be added before the operation time confirmation signal receiving step (S110). In addition, it may further include an operation time output step after the initial state determination step S150 and the operation time calculation step S160. The operation time output step is a step of outputting the calculated system operation time to the outside through the user interface or the communication unit.

As a result, the operation time recording method of the present invention allows the operation time recording area to repeatedly record data while sequentially decreasing the data, so that a relatively long operation time can be recorded even with a very small memory capacity. In addition, since it is not necessary to provide a separate OS or a program for managing the flash memory, efficient operation time recording is enabled.

The method according to the present invention can be implemented as a computer-readable code on a computer-readable recording medium. A computer-readable recording medium includes all kinds of recording apparatuses in which data that can be read by a computer system is stored. Examples of the recording medium include a ROM, a RAM, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like, and a carrier wave (for example, transmission via the Internet). The computer-readable recording medium may also be distributed over a networked computer system so that computer readable code can be stored and executed in a distributed manner.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art.

Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

Claims (11)

A method for recording operating time using a flash memory of an operating time recording system including a flash memory having a plurality of blocks for storing and erasing data, a timer and a control unit,
Setting a plurality of predetermined blocks among a plurality of blocks of the flash memory as an operation time recording area;
Recording data of the same value in a predetermined order in a plurality of blocks of the operation time recording area when a timing signal is periodically received from the timer;
When the data is recorded in the entire operation time recording area, the data is incremented or decremented in a predetermined unit, and the remaining data of the remaining blocks excluding the two blocks in which the data is recorded last in the operation time recording area After erasing the data, rotating and recording the increased or decreased data; And
Calculating an operation time of the operation time recording system by reading the data recorded in the operation time recording area when the operation time confirmation command is received from the outside, and outputting the operation time; Wherein the operating time is recorded in the flash memory. The method as claimed in claim 1, wherein the setting of the operation time recording area
Wherein the operation time recording area is set such that Tn (where Tn is a natural number of 3 or more) blocks are included in the operation time recording area. 3. The method of claim 2, wherein writing the data comprises:
When the timing signal is received for the first time, writing the data to the lowest address of the block having the lowest memory address among the at least Tn blocks;
Each time the timing signal is received, sequentially increasing the address of the previous last data and recording the data; And
If the previously recorded data is the last address of the nth block, writing the data to the lowest address of the (n + 1) th adjacent block; And recording the operation time using the flash memory. 4. The method of claim 3, wherein writing the data comprises:
And erasing the data of the (n-1) -th block when data writing of the n-th block (n is a natural number less than Tn) of the Tn blocks is completed and data is written to the n + 1-th block And recording the operation time using the flash memory. 4. The method of claim 3, wherein erasing the data comprises:
And erasing the data of the Tn-th block if the (n + 1) th block is the first block, and erasing the data of the Tn th block if the n + 1 block is the second block. Time recording method. 4. The method of claim 3, wherein writing to the lowest address comprises:
Wherein the initial value of the data is set to a maximum value in units of bytes, which is not an erase state, corresponding to the timing signal that is initially received. 7. The method of claim 6, wherein the step of rotating and recording
And decrementing the value of the data by 1 each time the data is rotated. 8. The method of claim 7, wherein the calculating and outputting the operating time comprises:
Equation
Tn * N + (n-1) * N + Bn * Ti}
(Where 0xFE is the data for which the initial operation time is to be recorded, which is the value of decimal number 14, Dn is the data value recorded in the nth block in which the current data is written, and Tn is the total number of blocks in the operating time recording area, N represents the number of bytes per block, n represents a block in which the current data is recorded, and Bn represents the number of bytes in which data other than the erase status data (0xFF) is recorded in the nth block in which the current data is recorded And Ti represents a period for generating the timing signal in the timer 30 in units of time.
And the operation time is calculated according to the operation time of the flash memory. 4. The method of claim 3, wherein writing to the lowest address comprises:
Wherein the initial value of the data is set to a minimum value in units of bytes, which is not an erase state, corresponding to the timing signal that is initially received. 10. The method of claim 9, wherein the step of rotating and recording
And the value of the data is incremented by one each time the rotation is performed. 11. The recording medium according to any one of claims 1 to 10, wherein a computer-readable program for recording an operating time recording method using the flash memory is recorded.
KR1020130109680A 2013-09-12 2013-09-12 Method for recording operation time using flash memory KR101398960B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020130109680A KR101398960B1 (en) 2013-09-12 2013-09-12 Method for recording operation time using flash memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020130109680A KR101398960B1 (en) 2013-09-12 2013-09-12 Method for recording operation time using flash memory

Publications (1)

Publication Number Publication Date
KR101398960B1 true KR101398960B1 (en) 2014-05-27

Family

ID=50895147

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130109680A KR101398960B1 (en) 2013-09-12 2013-09-12 Method for recording operation time using flash memory

Country Status (1)

Country Link
KR (1) KR101398960B1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070150644A1 (en) * 2005-12-28 2007-06-28 Yosi Pinto System for writing non-volatile memories for increased endurance
KR20110015280A (en) * 2009-08-07 2011-02-15 주식회사 유니듀 A method for recording block information of a flash memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070150644A1 (en) * 2005-12-28 2007-06-28 Yosi Pinto System for writing non-volatile memories for increased endurance
KR20110015280A (en) * 2009-08-07 2011-02-15 주식회사 유니듀 A method for recording block information of a flash memory

Similar Documents

Publication Publication Date Title
US8041879B2 (en) Flash memory backup system and method
US9141526B2 (en) Reclaiming units by searching units for a predetermined criterion and storing data from a valid subunit
KR100453053B1 (en) Flash memory file system
US6154808A (en) Method and apparatus for controlling data erase operations of a non-volatile memory device
US20080195833A1 (en) Systems, methods and computer program products for operating a data processing system in which a file system's unit of memory allocation is coordinated with a storage system's read/write operation unit
US8589617B2 (en) Write once recording device
US7725646B2 (en) Method of using a flash memory for a circular buffer
JP5065395B2 (en) Device and method for prioritized erase of flash memory
TW201833755A (en) Data storage device and data maintenance method thereof
JP2001209543A (en) Program rewriting method for flash microcomputer
JP2006323751A (en) Information processing apparatus, life monitoring method and program
US8117414B2 (en) Method for prioritized erasure of flash memory
US20130111115A1 (en) Managing write operations in a computerized memory
US11481120B2 (en) Reducing wear on zoned storage devices for storing digital data
JP2006003966A (en) Write method for flash memory
KR101398960B1 (en) Method for recording operation time using flash memory
JP5002944B2 (en) Information processing apparatus, imaging apparatus, information processing method, and computer program
JP5996129B2 (en) Method, computer system, and computer program for securely erasing nonvolatile semiconductor mass memory
KR101453951B1 (en) System for recording operation time using flash memory
JP5491201B2 (en) Semiconductor recording apparatus and semiconductor recording system
JP2008191797A (en) File system
US20090282091A1 (en) File system and data management method
JP2008171246A (en) Flash memory drive device, its control method, and its program
JP2013003655A (en) Control device for writing data in flash memory
US20090319587A1 (en) Memory controller, nonvolatile memory device, and nonvolatile memory system

Legal Events

Date Code Title Description
A201 Request for examination
A302 Request for accelerated examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20170403

Year of fee payment: 4

FPAY Annual fee payment

Payment date: 20190409

Year of fee payment: 6