KR101397548B1 - Location positioning apparatus and location positioning method - Google Patents

Abstract

A time-of-arrival measurement using a time digital converter is provided. The time digital converter obtains the arrival time difference of the signal received through the two antennas. The arrival distance difference is calculated from the arrival time difference and the arrival angle is calculated from the distance between the two antennas and the arrival distance difference.

Description

[0001] The present invention relates to a position measuring apparatus and a positioning method,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to wireless communication, and more particularly to a position measuring apparatus and method using wireless communication.

The technique of locating between two nodes is very important in firefighting sites of firefighters or military operations of soldiers. However, since it is impossible to use GPS indoors, precise positioning is difficult. It is essential to develop a technology that identifies each other in a room without such infrastructure.

One embodiment of the present invention provides a method and apparatus for measuring the angle of arrival.

Another embodiment of the present invention provides a position measuring apparatus and method using an arrival angle.

An arrival angle measuring apparatus according to an embodiment of the present invention includes: a receiving unit including at least a first antenna and a second antenna; And a time-to-digital converter for measuring an arrival time difference between a first signal received through the first antenna and a second signal received through the second antenna.

A position measuring apparatus according to an embodiment of the present invention includes: a receiving unit including at least a first antenna and a second antenna; An arrival time difference calculation block for calculating an arrival time difference between a first signal received through the first antenna and a second signal received through the second antenna; And a distance measuring unit for measuring a distance to the first antenna and / or the second antenna.

The arrival angle measuring method according to an embodiment of the present invention includes: providing two signals received from two antennas as an input of a time-digital converter, and calculating a time difference of arrival of two signals received by the two antennas.

According to an embodiment of the present invention, there is provided a position measuring method comprising: providing two signals received from two antennas as inputs of a first time digital converter, calculating arrival time differences of two signals received by the two antennas; Measuring a distance from the signal received by the antenna to a measurement object; And calculating the position of the measurement object from the arrival angle and the distance calculated from the arrival time difference.

According to the embodiment of the present invention, it is possible to accurately measure the position with high resolution.

1 is a view for explaining a concept of position measurement according to an embodiment of the present invention.
2 is a view for explaining the concept of arrival angle measurement according to an embodiment of the present invention.
3 is a view for explaining the concept of distance measurement using the one way flight method.
4 is a view for explaining the concept of distance measurement using the reciprocating flight method.
5 schematically shows a position measuring apparatus 100 according to an embodiment of the present invention.
6 schematically shows a position measuring apparatus 300 according to another embodiment of the present invention.
Figure 7 shows a time difference calculation block according to an embodiment of the present invention.
FIGS. 8A and 8B are diagrams for explaining an arrival angle, a TDC start signal, and a TDC stop signal determination method according to positions of various position measurement objects.
9A schematically shows a waveform of a signal output by each configuration of the signal generator according to an embodiment of the present invention.
9B schematically shows a TDC start signal generated by the first signal generator and a TDC stop signal generated by the second signal generator according to an embodiment of the present invention.
FIG. 10 is a diagram for explaining a time-to-digital converter according to an embodiment of the present invention, which receives a TDC start signal and a TDC stop signal generated from a signal received by two antennas and converts the arrival time difference to a digital code.
11 is a diagram for explaining the operation of the time-digital converter of FIG. 10 in more detail.
12 shows a time-to-digital converter according to another embodiment of the present invention.
13 is a diagram for explaining the operation of the time-digital converter of Fig.
14 is a diagram for explaining a time digital converter in another embodiment of the present invention.
FIG. 15 is a diagram for explaining the operation of the time-digital converter of FIG. 14 in more detail.
16 is a view for explaining a time-digital converter according to another embodiment of the present invention.
17 shows a distance measuring unit according to an embodiment of the present invention.
18 schematically shows a distance measuring unit according to another embodiment of the present invention
19 is a block diagram illustrating the synchronizer and counter of FIG. 18 in greater detail;
20 is a view for explaining the operation of the synchronizer and the counter of FIG. 19 in detail.
21 shows a distance measurement block according to an embodiment of the present invention.
22 shows a circuit of a signal restoration unit of a distance measurement block according to an embodiment of the present invention.
23 shows a structure of a fine delay cell of a distance measurement block according to an embodiment of the present invention.
24 shows a structure of a coarse delay cell of a distance measurement block according to an embodiment of the present invention.
25 is an equivalent circuit diagram of a signal restoring unit of a distance measuring block according to an embodiment of the present invention.
FIG. 26 shows a process of processing a signal by each configuration of the signal restoring unit according to an embodiment of the present invention.
FIG. 27 shows a signal processing process of the sampling unit of the signal restoring unit according to an embodiment of the present invention in more detail.
28 illustrates a signal processing process of the interval adjusting unit of the signal restoring unit according to an embodiment of the present invention in more detail.
29 to 34 are graphs showing the results of the IR-UWB signal restoration process according to an embodiment of the present invention.

Other advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

Although not defined, all terms (including technical or scientific terms) used herein have the same meaning as commonly accepted by the generic art in the prior art to which this invention belongs. Terms defined by generic dictionaries may be interpreted to have the same meaning as in the related art and / or in the text of this application, and may be conceptualized or overly formalized, even if not expressly defined herein I will not. The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention.

In the present specification, the singular form includes plural forms unless otherwise specified in the specification. As used herein, the terms' comprise 'and / or various forms of use of the verb include, for example,' including, '' including, '' including, '' including, Steps, operations, and / or elements do not preclude the presence or addition of one or more other compositions, components, components, steps, operations, and / or components. In addition, 'possessed', 'possessed', etc. should be commented in the same way.

The term 'and / or' as used herein refers to each of the listed configurations or various combinations thereof.

The terms 'to', 'to', 'block', 'module' and the like used in the entire specification may mean a unit for processing at least one function or operation. For example, a hardware component, such as a software, FPGA, or ASIC. However, '~', '~', '~ block', '~ module' are not meant to be limited to software or hardware. 'To', 'to', 'to block', 'to module', etc. may be configured to be addressable storage media and configured to play one or more processors. Thus, by way of example, '~', '~', '~', 'blocks', 'modules' and the like are intended to refer to a component such as software components, object-oriented software components, class components, Microcode, circuitry, data, databases, data structures, tables, arrays, and the like, as well as components, Variables. The functions provided in the components and in the '~', '~', '~', and '~' Module ', or may be further separated from the additional components by' ~ ',' ~ ',' block ', or' module '.

Also, in the present specification, 'to', 'to', 'to block', 'to module' and the like are connected to other 'to', 'to', ' But also refers to an indirect connection through the third '~', '~', '~ block', or '~ module'.

It is also to be understood that the terms first, second, etc. used in this specification are intended to encompass only certain specific portions, such as ",", " Block 'and' module ', and the' first period 'to' first period 'in any embodiment may be referred to as' second period' in another embodiment.

Embodiments of the present invention relate to distance measurement, position measurement, etc. using wireless communication technology.

The embodiments of the present invention can be broadly applied to a defense field, a radar field, a communication field, and the like. For example, it can be used for Precision Geolocation System (PGS), which is a device that can precisely track a location in a narrow space such as a room without a GPS. It can be used for military operations under extreme circumstances where it is difficult to receive GNSS signals or difficult to obtain visibility , Fire fighting operations and so on. In addition, it can be applied to medical sensor field, car sensor field, logistics management, robot cleaner, indoor automatic parking system, and the like.

An embodiment of the present invention discloses a position measurement using a time-digital converter and a signal processing, distance measurement, and arrival angle measurement for the position measurement.

An embodiment of the present invention measures a position using an angle of arrival (AoA) based on UWB communication. The arrival angle is obtained from the difference of the distance of the signal transmitted by the position measurement object, and the difference of the arrival distance is precisely measured through the digital converter, and finally, the accurate arrival angle measurement is possible. The angle of arrival provides the direction from which the position object is located from the position measuring device. On the other hand, the distance to the positioning target is precisely measured by a digital converter, a direct sampling technique, etc. according to an embodiment of the present invention using a time of arrival (ToA).

Unless otherwise specified herein, the reaching distance difference refers to the difference in the reaching distances to the receiving antennas of two signals received via different antennas, and the arrival time difference indicates the difference in arrival times of the two signals received via different antennas , The delay time refers to the difference in arrival time or flight time between consecutively received signals through any one particular antenna.

Position measurement concept

1 is a view for explaining a concept of position measurement according to an embodiment of the present invention. Referring to FIG. 1, a position measuring apparatus receives a signal transmitted by a position measurement object (transmitter), for example, an impulse signal, and measures the position. Hereinafter, embodiments of the present invention will be described by taking an UWB signal, that is, an impulse signal, as an example.

The relative position from the position measuring device to the position measurement object can be determined from the distance and the reaching angle. The distance to the position measurement object can be obtained using the arrival time ToA of the impulse signal or the round trip of flight (RoF), which will be described in more detail with reference to FIG. 3 and FIG. On the other hand, the arrival angle is an angle between the position measurement object and the position measurement device, and provides a direction in which the position measurement object is positioned with reference to the position measurement device. The arrival angle difference between the impulse signals received by the two antennas of the position measurement device . ≪ / RTI > This distance difference difference can be obtained precisely by calculating the arrival time difference using a time digital converter according to an embodiment of the present invention, which will be described in more detail with reference to FIG.

Reach angle  Measurement concept

2 is a view for explaining the concept of arrival angle measurement according to an embodiment of the present invention. 2, the angle of arrival (θ) is an angle formed by a line segment connecting the position measurement device and the position measurement device with respect to the position measurement device. In order to provide a reference line for measuring the arrival angle, Includes at least two antennas (ANT1, ANT2). That is, the angle of arrival (θ) is the angle between the line connecting the two antennas (ANT1 and ANT2) and the line connecting the position measurement object and the position measuring device. Here, it is assumed that the impulse signals received by the two antennas ANT1 and ANT2 are parallel. This assumption holds when the position measuring apparatus and the position measuring object are sufficiently apart.

Therefore, the arrival angle [theta] is obtained by subtracting the following Equation 1 and Equation 2 from the distance difference d of the impulse signal reaching the two antennas ANT1 and ANT2 and the distance I between the two antennas ANT1 and ANT2 .

In Equation (1), I is known as the distance between the two antennas ANT1 and ANT2. In Equation (2), c is the speed of light and? T is the arrival time difference of the impulse signal reaching the two antennas.

Accordingly, the arrival angle [theta] can be found by finding the arrival time difference [Delta] t, and this arrival time difference [Delta] t is a time when a signal received by the two antennas ANT1 and ANT2 is input Digital converter.

According to the concept of the present invention, the arrival angle can be precisely and simply measured using a time digital converter.

Distance measurement

Hereinafter, the concept of distance measurement will be described with reference to FIGS. 3 and 4. FIG. FIG. 3 is a view for explaining a concept of distance measurement using a one-way flight method, and FIG. 4 is a view for explaining a concept of distance measurement using a reciprocating flight method. 3, a transmitter Tx serving as a position measurement object transmits an impulse signal to a receiver Rx serving as a position measuring device, and a receiver Rx transmits an impulse signal by DELTA T at the transmission time of the transmitter Tx A delayed impulse signal is received and the distance D from the delay time? T to the transmitter is measured using the following equation (3).

Where c is the speed of light and ΔT is the delay time between sending and receiving signals.

4, the first transceiver Tx / Rx_1 transmits the impulse signal to the second transceiver Tx / Rx_2 and the second transceiver Tx / Rx_2 transmits the received impulse signal to the first transceiver Tx / Rx_1). Therefore, by measuring the delay time DELTA T 'between the transmission and reception of the impulse signal, the distance D can be measured using the following equation (4).

Where c is the speed of light and ΔT 'is the delay time between sending and receiving signals.

On the other hand, the first transceiver (Tx / Rx_1) transmits the impulse signal and receives the impulse signal reflected by the position measurement object, thereby measuring the delay time according to transmission / reception of the impulse signal, You can also measure the distance.

Position measurement

Hereinafter, the position measurement according to one embodiment of the present invention will be described in detail.

5 schematically shows a position measuring apparatus 100 according to an embodiment of the present invention. The position measuring apparatus of the present embodiment includes a delay time measuring unit for measuring a delay time to measure a distance to a measurement target and an arrival time difference measuring unit for measuring a reaching time for calculating an arrival angle, And measures the delay time and the arrival time difference.

5, the position measuring apparatus 100 includes a receiving unit 110 receiving an impulse signal transmitted and / or reflected by a position measurement object, a signal generating unit 130 connected to the receiving unit 110, And a position calculating unit 190 connected to the arrival time difference measuring unit 150 and the delay time measuring unit 170, the arrival time difference measuring unit 150 and the delay time measuring unit 170.

The receiving unit 110 includes at least a pair of antennas, for example, a first antenna 110a and a second antenna 110b, and receives the impulse signal transmitted by the position measurement object. The distance between the position measurement object and the first antenna 110a and the distance between the position measurement object and the second antenna 110b may be different from each other depending on the relative position of the position measurement object. The difference between these two distances ('distance difference') appears as the arrival time difference of the two signals arriving at the two antennas, and the arrival time difference is precisely measured through a time digital converter.

The signal generator 130 generates signals (e.g., a first TDC signal and a second TDC signal) suitable for delay time and arrival time difference measurement from two signals received from two antennas, for example, a first signal and a second signal do.

The arrival time difference measuring unit 150 measures the arrival time difference between the two signals using the first TDC signal and the second TDC signal generated by the signal generating unit 130 as two inputs. The arrival time difference measuring unit 150 includes a first time digital converter.

The delay time measuring unit 170 measures the delay time of the signal received through the first antenna 110a on the signal generating unit 130 (the reference clock signal CLK _REF ) The delay time between the first TDC signals corresponding to the first and second TDC signals is measured. The delay time measuring unit 170 includes a second time digital converter.

The first time digital converter of the arrival time difference measuring unit 150 receives the first TDC signal generated from the two signal first signals and the second signal received by the receiving unit 110 through the pair of antennas 110a and 110b, 2 TDC signal is input to calculate the time difference of arrival of two signals. On the other hand, the second time-digital converter of the delay time measuring unit 170 calculates a delay time between transmission and reception of signals received through one antenna, for example, between transmission and reception of a first signal received through the first antenna 110a Measure the delay time. That is, the second time-digital converter of the delay time measuring unit 170 receives the first TDC signal generated from the first signal received through the first antenna and the signal synchronized with the transmission time point of the first signal (reference clock signal CLK _REF ) As two inputs.

The position calculating unit 190 calculates an arrival angle using Equation 1 and Equation 2 from the arrival time difference measured by the arrival time difference measuring unit 150 and calculates the arrival angle from the delay time measured by the delay time measuring unit 170 The distance is calculated using Equation 3 or Equation 4, and the position of the object to be measured is calculated from the arrival angle and the distance.

Although not shown, a display unit for indicating the position of the measurement object may be provided.

6 schematically shows a position measuring apparatus 300 according to another embodiment of the present invention. The position measuring apparatus of this embodiment has the same configuration as the position measuring apparatus 100 of Fig. 5 except for the delay time measuring unit. That is, in the position measuring apparatus 300 of the present embodiment, the distance measurement to the measurement object is accurately performed by using the direct sampling without using the time-digital converter, and the distance is measured based on the restored signal do.

6, the position measuring apparatus 300 includes a receiving unit 310 for receiving an impulse signal transmitted and / or reflected by a position measurement object, a signal generating unit 330 connected to the receiving unit 310, a signal generating unit A distance measuring unit 370 connected to the receiving unit 310, an arrival time difference measuring unit 350 and a position calculating unit 390 connected to the distance measuring unit 370 . Although not shown, a display unit for indicating the position of the measurement object may be provided.

The distance measuring unit 370 restores the signal received by the receiving unit 310 and measures the distance. The distance measuring unit 370 includes a signal restoring unit 371 connected to the first antenna 310a and a distance calculating unit 373 measuring a distance based on the signal restored by the signal restoring unit 371. [

The signal restoring unit 371 restores the impulse signals continuously received by the first antenna 310a of the receiving unit 310 and the distance calculating unit 373 calculates the distance using the restored impulse signals.

The distance calculator 373 of the distance measuring unit 370 may be included in the position calculator 390.

Reach distance difference  Used Reach angle  Calculation

Figure 7 shows a time difference calculation block according to an embodiment of the present invention. Referring to FIG. 7, the arrival time difference calculation block 160 includes a signal generation unit 130 and an arrival time difference measurement unit 150.

The signal generator 130 generates a first TDC signal from a first signal and a second signal received by the two antennas 110a and 110b so that the arrival time difference measuring unit 150 can accurately detect two input signals and calculate an arrival time difference, Signal and a second TDC signal. The first TDC signal and the second TDC signal may be, for example, a clock signal or a square wave signal, but are not limited thereto.

The arrival time difference measuring unit 150 includes a time digital converter 151. The time digital converter 151 receives the two signal first TDC signals and the second TDC signals generated by the signal generating unit 130 . Thus, the time-to-digital converter 151 precisely measures the arrival time difference of the first TDC signal and the second TDC signal.

The time-to-digital converter 151 converts the first TDC signal generated from the first signal received by the first antenna 110a into a TDC signal (TDC_start) generated from the second signal received by the second antenna 110b 2 TDC signal can be used as a TDC stop signal (TDC_stop). In this case, the time-to-digital converter 151 will measure the time interval between the reception of the first TDC signal (TDC start signal) and the reception of the second TDC signal (TDC stop signal).

Meanwhile, the second TDC signal generated from the second signal received by the second antenna 110b may arrive first than the first TDC signal generated from the first signal received by the first antenna 110a. In this case, the angle of incidence is greater than 90 °. At this time, the first TDC signal generated from the first signal received by the first antenna 110a is used as a TDC stop signal, and the second TDC signal generated from the second signal received by the second antenna 110b is used as a TDC start signal use.

Alternatively, a delay time measuring unit may be provided for each antenna, and the distance from each antenna to the measurement target may be measured to use a signal generated by an antenna having a relatively short distance as a TDC start signal. For example, as shown in FIG. 7, a first delay time measuring unit 170a may be connected to the first antenna 110a and a second delay time measuring unit 170b may be connected to the second antenna 110b .

This will be described in more detail with reference to the drawings.

FIGS. 8A and 8B are diagrams for explaining an arrival angle, a TDC start signal, and a TDC stop signal determination method according to positions of various position measurement objects. Here, it is assumed that the arrival angle? Is a line segment connecting the measurement object and the antenna in a line segment connecting the two antennas, and the first antenna is on the right and the second antenna is on the left.

Fig. 8A shows a case where the arrival angle [theta] is smaller than 90 [deg.], Where the first signal received by the first antenna arrives faster than the second signal received by the second antenna. Therefore, as described above, the first TDC signal generated from the first signal received by the first antenna is used as the TDC start signal, and the second TDC signal generated from the second signal received by the second antenna is used as the TDC stop signal do. On the other hand, the distance D to the measurement target is the distance D1 from the first antenna to the measurement target. The distance D to the measurement target can be obtained by another method, and can be obtained by subtracting the arrival distance difference? D from the distance D2 from the second antenna to the measurement target.

Fig. 8B shows a case where the arrival angle [theta] is larger than 90 [deg.]. In this case, the second signal received by the second antenna arrives earlier than the first signal received by the first antenna, and the distance D2 from the second antenna to the measurement object is shorter than the distance from the second antenna to the measurement object D1). Therefore, the second TDC signal generated from the second signal received at the second antenna is used as the TDC start signal, and the first TDC signal generated from the first signal received at the first antenna is used as the TDC stop signal. The distance D to the measurement object becomes the distance D2 from the second antenna to the measurement object.

On the other hand,? D / I corresponds to cos (?) In Fig. 8A but corresponds to cos (?) In Fig. Therefore, in the case of FIG. 8B, the angle of arrival θ should be obtained by subtracting α from 180 after subtracting α from Δd / I = cos (α). That is, in Fig. 8B, the angle of arrival? = 180 -?. 8B, when the TDC signal generated from the signal received by the first antenna becomes the TDC stop signal, the angle? Is subtracted from? D / I = cos (?), Find the angle of arrival.

Referring again to FIG. 7, the signal generator 110 will be described in more detail. The signal generating unit 130 includes a pair of signal generating units such as a first signal generating unit 130a and a second signal generating unit 130b connected to the pair of antennas 110a and 110b. For example, the first signal generator 131a includes a first low noise amplifier (LNA) 131a connected to the corresponding first antenna 110a, a first envelope detector (ED) connected to the first low noise amplifier (LNA) 131a, A first comparator 135a which receives the output of the first envelope detector ED 133a as one input and the reference level V _THS as another input, a first comparator 135a which is connected to the first comparator 135a, T_FF, 137a. Similarly, the second signal generator 131b includes a second low noise amplifier (LNA) 131b connected to the corresponding second antenna 110b, a second envelope detector (ED 133b) connected to the second low noise amplifier (LNA) 131b, A second comparator 135b having one input of the output of the second envelope detector ED 133b and a reference level V _THS as another input, a second flip-flop T_FF connected to the second comparator 135b, , 137b.

Now, the signal generating unit 130 will be described in more detail. First, the first signal generator 130a will be described. The first signal generator 130a generates a TDC start signal (TDC_start) from the signal received by the first antenna 110a. Specifically, the first low noise amplifier (LNA) 110a receives the impulse signal transmitted by the measurement object and amplifies the impulse signal. The first low noise amplifier (LNA) 110a may suppress noise generated due to multipath fading or the like to the utmost. Although not shown, a preamplifier may be connected between the first low noise amplifier (LNA) 110a and the first envelope detector (ED) 133a. The preamplifier receives and amplifies the output signal of the first low noise amplifier (LNA) 110a. That is, the preamplifier amplifies the first low-noise amplifier output signal in a peak-to-peak manner to compensate for the gain of the output signal of the first low-noise amplifier (LNA) 110a.

The first envelope detector 133a detects the peak point of the output signal of the first low-noise amplifier 131a or the preamplifier.

The first comparator 135a compares the output of the first envelope detector 133a with a reference level (V _THS ). For example, if the output signal of the first envelope detector 133a is lower than the reference level V _THS , the first comparator 135a will output '1'. If the output signal of the first envelope detector 133a is higher than the reference level (V _THS ), the first comparator 135a will output '0'. That is, the first comparator 135a converts the output signal of the envelope detector 133a into a digital signal. On the other hand, the reference level (V _THS ) of the first comparator 135a will be appropriately selected to minimize the influence of multipath fading. That is, the reference level V _THS of the first comparator 135a may be set to be higher than the level of the noise generated due to the multipath fading and lower than the level of the signal generated through the direct path.

The first T-flip flop 137a generates a first TDC signal (e.g., a TDC start signal (TDC_start)) using the rising edge of the output signal of the first comparator 135a. For example, the first T-flip flop 137a generates a TDC start signal by keeping the value between rising edges between the output signals of the first comparator 135a at '1'.

In the same manner, the second signal generator 130b generates a second TDC signal (e.g., a TDC stop signal TDC_stop) from the signal received by the corresponding second antenna 110b.

9A schematically shows waveforms of signals outputted by the respective constitutions of the above-described signal generating unit 130. In FIG. Referring to FIG. 9A, the signal generator 130 generates a signal suitable for detection from the received impulse signal in the above-described manner.

9B schematically shows a TDC start signal generated by the first signal generating unit 130a and a TDC stop signal generated by the second signal generating unit 130b. When the first antenna 110a receives the first signal 110a, And the second antenna 110b receives the second signal. As shown in the figure, a TDC start signal and a TDC stop signal in the form of a clock signal having the arrival time difference t are generated from the two signals received through the first antenna 110a and the second antenna 110b.

7, the time-to-digital converter 151 receives the first TDC signal and the second TDC signal (TDC start signal and TDC stop signal), which are two output signals of the signal generating unit 130, And converts the time difference DELTA t into a digital code.

FIGS. 10 to 16 illustrate a time-to-digital converter according to various embodiments of the present invention, which receives a TDC start signal and a TDC stop signal generated from a signal received by two antennas, FIG.

10, a time-to-digital converter 450 according to an embodiment of the present invention includes a first delay line 451a, a second delay line 451b, a comparison block 435, and an encoder 282 .

The first delay line 451a includes a plurality of delay cells connected in series and connected to the first antenna 110a (see Figures 5 to 7). The second delay line 451b includes a plurality of delay cells connected in series and connected to the antenna 110b (see Figures 5 to 7).

The comparator block 435 includes a plurality of comparators (first to nth comparators), each of which includes a geothermal cell of the first delay line 451a and a delay cell of the second delay line 451b as two inputs do.

The encoder 455 is connected to the first to the n-th comparators and calculates the arrival time difference from the outputs of the comparators.

More specifically, the first delay line 451a is connected to the first antenna to receive the TDC start signal, and the second delay line 451b is connected to the second antenna to receive the TDC stop signal. The delay cell constituting the first delay line 451a and the delay cell constituting the second delay line 451b are constituted by an inverter for delaying the input signal and outputting the delayed signal at different times. That is, the delay cell of the first delay line 451a delays the input signal longer than the delay cell of the second delay line 451b. For example, the delay cells constituting the first delay line 451a connected to the TDC start signal delay the input signal by 60p, and the delay cells constituting the second delay line 451b connected to the TDC end signal Each of the input signals is delayed by 50p.

 The first to n < th > comparators each receive a delayed TDC start signal and a TDC end signal at different time intervals. The first to n < th > comparators compare whether the rising edge of the received TDC end signal precedes the rising edge of the TDC start signal, respectively, and provide the comparison result to the encoder 455.

Therefore, the time-to-digital converter 450 according to the present embodiment is capable of outputting the TDC start signal at a resolution corresponding to the difference between the delay of the delay cell of the first delay line 451a and the delay of the delay cell of the second delay line 451b, And the arrival time difference of the TDC stop signal can be calculated. That is, the arrival time difference can be calculated in units of 10p.

For example, the first comparator receives the first TDC end signal (TDC_stop_1) delayed by 50p as compared with the first TDC start signal (TDC_start_1) delayed by 60p and the TDC end signal (TDC_stop) in comparison with the TDC start signal (TDC_start). The first comparator compares whether the rising edge of the first TDC end signal (TDC_stop_1) gives priority to the rising edge of the first TDC start signal (TDC_start_1). For example, if the rising edge of the first TDC end signal TDC_stop_1 does not precede the rising edge of the first TDC start signal TDC_start_1, the first comparator outputs 0 (i.e., Q = 0) will be. On the other hand, when the rising edge of the first TDC end signal TDC_stop_1 takes precedence of the rising edge of the first TDC start signal TDC_start_1, the first comparator will output '1' (that is, Q = 1). When the comparator of comparison block 435 outputs '1', the time-to-digital converter may stop operating.

The encoder 455 receives the output values Q1 to Qn of the first comparator to the nth comparator of the comparison block 453 and encodes the output values Q1 to Qn to obtain the arrival time difference between the signals received through the two antennas.

The arrival angles can be obtained by applying Equations 1 and 2 using the obtained arrival time difference.

FIG. 11 is a diagram for explaining the operation of the time-digital converter 450 of FIG. 10 in more detail. For a clear understanding and brief description, the arrival time difference? T of the impulse signal through the two antennas in FIG. 11 is less than 60p and the third TDC end signal, which is the output of the third delay cell of the second delay line 451b TDC_stop_3 takes precedence over the rising edge of the third TDC start signal TDC_start_3, which is the output of the third delay cell of the first delay line 451a.

The TDC start signal TDC_start transitions from the logic low L to the logic high H at the initial time t0 and the TDC end signal TDC_stop transitions from the logic low L to the logic high H at the first time t1. (H).

The TDC start signal (TDC_start) is input to the first delay cell of the first delay line 451a and is delayed by 60p and output. That is, the first delay cell of the first delay line 451a outputs the first delayed TDC start signal (TDC_start_1) delayed by 60p with respect to the TDC start signal (TDC_start). Further, the TDC end signal (TDC_stop) is input to the first delay cell of the second delay line 451b and is delayed by 50p and output. That is, the first delay cell of the second delay line 451b outputs the first delayed TDC end signal (TDC_stop_1) delayed by 50p as compared with the TDC end signal (TDC_stop).

 The first comparator having two inputs of the first delay cell of each delay line does not have a rising edge of the first delayed TDC end signal TDC_stop_1 and a rising edge of the first delayed TDC start signal TDC_start_1, (I.e., Q1 = 0).

In the same manner, the first delay TDC start signal TDC_start_1 and the first delay TDC end signal TDC_stop_1 are delayed by 60p and 50p, respectively, by the second delay cell. Therefore, the second delayed TDC start signal (TDC_start_2) and the second delayed TDC end signal (TDC_stop_2) are delayed by 120p and 100p, respectively, as compared with the TDC start signal (TDC_start) and the TDC end signal (TDC_stop).

The second comparator having two inputs of the second delay cell of each delay line does not have a rising edge of the second delayed TDC end signal TDC_stop_2 and a rising edge of the second delayed TDC start signal TDC_start_2, (I.e., Q2 = 0).

In the same manner, the second delay TDC start signal (TDC_start_2) and the second delay TDC end signal (TDC_stop_2) are delayed by 60p and 50p, respectively, by the third delay cell. Accordingly, the third delay TDC start signal TDC_start_3 and the third delay TDC end signal TDC_stop_3 are delayed by 180p and 150p, respectively, as compared with the TDC start signal TDC_start and the TDC end signal TDC_stop.

The third comparator having two inputs of the third delay cell of each delay line is set to '1' because the rising edge of the third delayed TDC end signal TDC_stop_3 takes precedence of the rising edge of the third delayed TDC start signal TDC_start_3, (I.e., Q3 = 1).

The output bit of the comparison block 453 will be '001' and the arrival time difference? T will have a value of 20 to 30p since the TDC end signal of the result of the third delay cell precedes the TDC start signal. For example, if the output bit of the comparison block 453 is '00001', the arrival time difference t will be 40 to 50p. That is, if '1' appears in the output bit of the comparison block 453 at the kth most significant bit, the arrival time difference? T will be 10 * (k-1) to (10 * k) p.

12 shows a time-to-digital converter 550 according to another embodiment of the present invention. 10, only the TDC start signal is connected to the delay line, and each of the comparators receives the TDC start signal after passing through each delay cell and the TDC start signal directly inputted without passing through the delay line, Signal as two inputs. Therefore, the time-to-digital converter of this embodiment can calculate the arrival time difference (that is, the arrival time difference of the TDC start signal and the TDC stop signal) of the signal received by the two antennas with the resolution corresponding to the delay degree of the delay cell of the delay line 551 .

Specifically, the time-to-digital converter 550 of the present embodiment includes a delay line 551 for receiving a TDC start signal, a plurality of delay cells 551, A comparison block 553 consisting of two comparators, and an encoder 555 connected to the output of the comparison block 553.

The delay line 551 is composed of a plurality of delay cells connected in series to delay the TDC start signal by a desired resolution. For example, each delay cell can output an input signal with a delay of 30p. In this case, the time-to-digital converter 550 calculates the arrival time difference of the signal received by the two antennas in units of 30p (i.e., arrival of the TDC start signal and TDC stop signal Time difference) can be calculated.

FIG. 13 is a diagram for explaining the operation of the time-to-digital converter 550 of FIG.

Referring to FIG. 13, the TDC start signal (TDC_start) is delayed 60p by the first delay cell to output the first delayed TDC start signal (TDC_start_1) at the first time (t1). The first comparator has two inputs of the first delayed TDC start signal TDC_start_1 and the TDC stop signal TDC_stop at the first time t1 and the rising edge of the TDC stop signal TDC_stop is the first delayed TDC start signal (I.e., Q1 = 0) since it does not take precedence over the rising edge of the TDC_start_1.

In the same manner, the first delayed TDC start signal TDC_start_1 is delayed by 30p by the second delay cell of the delay line 551. [ Therefore, the second delay cell outputs a second delayed TDC start signal (TDC_start_2) delayed by 60p as compared with the TDC start signal (TDC_start). The second comparator inputs the second delayed TDC start signal (TDC_start_2) and the TDC stop signal (TDC_stop) at the second time (t2), and the rising edge of the TDC stop signal (TDC_stop) (I.e., Q2 = 1) since it does not take precedence over the rising edge of the TDC_start_2.

In the same way, the second delay TDC start signal TDC_start_2 is delayed by 30p by the third delay cell of the delay line 551. Therefore, the third delay cell outputs a third delayed TDC start signal (TDC_start_3) delayed by 90p as compared with the TDC start signal (TDC_start). The third comparator has two inputs of the third delay TDC start signal TDC_start_3 and the TDC stop signal TDC_stop at the fourth time t2 and the rising edge of the TDC stop signal TDC_stop is the third delay TDC start signal TDC_start_3), so that it outputs '1' (that is, Q3 = 0).

Since the third delayed TDC start signal TDC_start_3 resulting from the third delay cell of the delay line 551 precedes the TDC stop signal, the output bit of the comparison block 553 will be '001' and the arrival time difference DELTA t ) Will have a value of 60 to 90p. For example, if the output bit of the comparison block 553 is '00001', the arrival time difference? T will be 120 to 150p. That is, if '1' in the output bit of the comparison block 453 appears at the kth most significant bit, the arrival time difference? T will be 30 * (k-1) to (30 * k) p.

14 is a diagram for explaining a time digital converter in another embodiment of the present invention. The time digital converter 650 of the present embodiment includes a first time digital converter 650a similar to the time digital converter described with reference to FIG. 12, a second time digital converter 650a similar to the time digital converter described with reference to FIG. 10, A selection unit 657, and an adder 659. [

The first time digital converter 650a includes a delay line 651 connected to the TDC start signal TDC_start similar to the time digital converter of FIG. 12 and including a plurality of serially coupled delay cells for outputting an input signal with a predetermined time delay, A comparison block 653a including a plurality of comparators having two inputs of a delayed TDC start signal and a TDC stop signal TDC_stop not delayed by a delay line in each delay cell of the delay line 651, And a first encoder 655a connected to the output terminal.

The second time digital converter 650b includes a first delay line 651a including a plurality of series-connected delay cells for delaying an input signal by a predetermined time, similar to the time-digital converter of FIG. 10, A second comparison block including a plurality of comparators having two inputs of a second delay line 651b for outputting a delay cell output of the first delay line 651a and a delay cell output of the second delay line 651b, 653b, and a second encoder 655b connected to the second comparison block 653b. The delay cells of the first delay line 651a delay the input signal by a time different from that of the delay cells of the second delay line 651b. The TDC stop signal TDC_stop is input to the first delay line 651a of the second time digital converter 650a and the output of the selection unit 657 is input to the second delay line 651b.

The operations of the first time digital converter 650a and the second time digital converter 650b are the same as those of the time digital converter described with reference to FIGS. 12 and 10, and a detailed description thereof will be omitted. The first time digital converter 650a multiplies the arrival time difference of the two impulse signals received via the two antennas with the resolution corresponding to the delay degree of the delay cell constituting the delay line 651, that is, the arrival time of the TDC start signal and the TDC stop signal The time difference can be calculated. According to the drawing, the first time digital converter 650a can measure the arrival time difference with a resolution of 60p. On the other hand, the second time digital converter 650a converts the arrival time difference of the two impulse signals into the first delay line 651a and the second delay line 651b with a resolution corresponding to the difference between the delay of the delay cell of the first delay line 651a and the delay of the delay cell of the second delay line 651b The arrival time difference between the TDC start signal and the TDC stop signal can be calculated. In the drawing, the second time digital converter 650b can calculate the arrival time difference in units of 10p.

The selector 657 receives the output of each delay cell constituting the delay line 651 of the first time digital converter 650a as an input and receives the output of the first comparison block 653a as a selection signal, Selects one of the outputs of each delay cell constituting the delay line 651 according to the output bit of the block 653a and provides it to the second delay line 651b of the second time digital converter 650b. For example, when the output bit Qna of the first comparison block 653a is '1', the selector 657 selects the n-th delayed TDC start signal TDC_start_n corresponding to the output bit Qna as the second To the second delay line 651b of the time digital converter 650a.

14, the first encoder 655a receives the output bits Q1a to Qna from the first comparison block 653a and calculates the coarse time? T_crs. The second encoder 655b receives the output bits Q1b through Qnb from the second comparison block 653b and calculates the fine time Δt_fn. Here, the coarse time Δt_crs is a TDC start signal and a TDC stop signal measured at a resolution corresponding to the degree of delay of the delay cell constituting the delay line 651 of the first time digital converter 651a, . On the other hand, the fine time Δt_fn is a resolution corresponding to the difference between the delay of the delay cell of the first delay line 651a of the second time digital converter 651b and the delay of the delay cell of the second delay line 651b For example, the arrival time difference between the TDC start signal and the TDC stop signal measured in units of 10p.

The adder 659 subtracts the fine time? T_fn from the coarse time? T_crs to precisely and accurately calculate the arrival time difference? T between the impulse signals received via the two antennas.

FIG. 15 is a diagram for explaining the operation of the time-digital converter of FIG. 14 in more detail. At the third time t3, it is assumed that the TDC stop signal TDC_stop transitions from a logic low to a logic high. 15, the time difference between the initial time t0 and the fourth time t4 is measured in units of 60p, and the time difference between the third time t3 and the fourth time t4 is measured in units of 10p, Fast operation speed and high accuracy can be guaranteed together.

14 and 15, the time-to-digital converter of the present embodiment calculates the coarse time? T_crs by measuring the arrival time difference between the TDC start signal (TDC_start) and the TDC stop signal (TDC_stop) in units of 60p.

In detail, the TDC start signal (TDC_start) is input to the delay line 651 and is delayed by 60p units by the delay cells connected in series. Therefore, the first delay TCD start signal (TDC_start_1) to the third delay TDC start signal (TDC_start_3) in the first, second and fourth times (t1, t2, t4) are 60p to 180p .

Here, at the third time t3, since the TDC stop signal TDC_stop transits from the logic low to the logic high, the TDC stop signal TDC_stop at the first time t1 and the second time t2 becomes logic low Lt; / RTI > Therefore, the first comparator and the second comparator of the comparison block 653a of the first time digital converter 650a output '0' as the output bits Q1a and Q2a, respectively.

However, the TDC stop signal (TDC_stop) has a logic level of logic high at the fourth time (t4). Therefore, the third comparator of the comparison block 653a of the first time digital converter 650a outputs '1' as the output bit Q3a.

Accordingly, the output bit of '001' is transmitted to the first encoder 655a, and the first encoder 655a calculates '180p' as the coarse time Δt_crs.

On the other hand, in the third comparator, if the output bit Q3a is '1', the selector 657 responds to the output bit Q3a to output the third delayed TDC start signal TDC_start_3, which is the output signal of the third comparator, To the second delay line 651b of the second time digital converter 650b. On the other hand, the TDC stop signal (TDC_stop) is provided to the second delay line 651a of the second time digital converter 650b without passing through the delay cell. 15, the second time digital converter 650b measures the time difference between the TDC stop signal TDC_stop and the third delay TDC start signal TDC_start_3 in units of 10p, and the second encoder 655b calculate the fine time [Delta] t_fn.

The adder 659 subtracts the fine time? T_fn from the coarse time? T_crs to precisely and accurately calculate the arrival time difference? T between the impulse signals received via the two antennas.

As described with reference to Figs. 14 and 15, the time-to-digital converter according to the present embodiment uses the first time digital converter 650a to calculate the coarse time? T_crs in a large unit (for example, 60p) And the arrival time difference? T between the impulse signals received via the two antennas by measuring the fine time? T_fn in a small unit (for example, 10p) using the second time digital converter 650b. Can be measured quickly and accurately.

16 is a view for explaining a time-digital converter according to another embodiment of the present invention. 16, a time-to-digital converter 750 according to the present embodiment includes a first time digital converter 750a, a second time digital converter 750b, a selector 757, and an adder 759, Except for the first time digital converter 750a and the selection unit 750, has a configuration similar to that of the time digital converter described with reference to Fig. That is, this embodiment divides each delay cell of the first time digital converter 650a of Fig. 14 into a pair of delay cells and causes a node between the pair of delay cells to be connected to the selection unit.

Hereinafter, differences from the time-digital converter of FIG. 14 will be mainly described.

The first time digital converter 750a includes a delay line 751a in which a plurality of delay cells are connected in series and a delay line 751a in which a TDC stop signal TDC_stop is inputted as one input and each delay cell pair output of the delay line 751a is made as another input A comparison block 753a including a plurality of comparators, and a first encoder 755a connected to the output of the comparison block 753a. Each delay cell of the delay line 651 of the first time digital converter of Figure 14 has a delay time of 60p, each delay cell of the delay line 751 of the first time digital converter 750a of this embodiment And has a delay time of 30p. Further, two adjacent delay cells of the delay line 751 of this embodiment form a pair and correspond to one delay cell of the delay line 651 of FIG. That is, a pair of adjacent delay cells form a pair, and an output of each delay cell pair is provided as a first input of the comparator. Since the operation of the first time digital converter 750a of the present embodiment is similar to that of the first time digital converter 650a of FIG. 14, detailed description thereof is omitted.

The second time digital converter 750b includes a first delay line 751a having a plurality of delay cells connected in series and a second delay line 751b having a plurality of delay cells connected in series, A second comparison block 753b including a plurality of comparators having a cell output and a delay cell output of the second delay line 751b as two inputs and a second encoder 755b connected to the second comparison block 753b do. The TDC stop signal TDC_stop is input to the first delay line 751a and the two delay cells 751b constituting each delay cell pair of the delay line 751 of the first time digital converter 750a are input to the second delay line 751b. The intermediate node output is selectively provided through the selection unit 757. 14, except that a 30p delayed TDC start signal is provided to the second delay line 751b relative to the second time digital converter 650b of FIG. 14, Configuration and operation. Therefore, the description of the second time digital converter 750b will be omitted below.

The selection unit 757 is composed of a plurality of switches SW1 to SWn. The switches SW1 to SWn of the selector 757 receive the corresponding delayed TDC start signals and output the first delayed TDC start signals TDC_start_1.5 to TDn_5, And provides one of the delayed TDC start signals (TDC_start_n.5) to the second delay line 751b of the second time digital converter 750b.

The selector 757 of FIG. 16 receives the delayed TDC start signal delayed by 30p with respect to the selector 657 of FIG. 14, and outputs the selected delayed TDC start signal to the second delay line of the second time digital converter 750b 751a.

As described above, the delay cells of the first time digital converter 750a of the present embodiment each have a delay time of 30p, and the two delay cells adjacent to each other delay the TDC start signal (TDC_start) by 60p . Further, the switches SW1 to SWn of the selector 757 are connected to the intermediate node between two delay cells constituting each delay cell pair.

The time-to-digital converter of this embodiment has the effect of extending the measurement range of the second time digital converter 750b. That is, the linearity can be ensured by having a wider measurement range than the time-digital converter of FIG.

Hereinafter, the distance measurement to the position measurement object will be described. First, distance measurement using a time digital converter will be described, and distance measurement using direct sampling will be described.

Distance measurement

Time Digital Converter  Distance measurement used

17 shows a distance measuring unit according to an embodiment of the present invention. The distance measuring unit 1700 may include a time digital converter 171 for measuring the delay time and a distance calculating unit 173 for calculating the distance based on the arrival time difference. The time-to-digital converter 171 may have the same configuration as the time-to-digital converter 151 of the arrival distance difference measuring unit of FIG. Therefore, a detailed description thereof will be omitted. However, the time-to-digital converter 171 of the distance measuring unit 170 receives the output signals of the two signal generators as two inputs in that the two input signals are the reference clock signal CLK _REF and the signal generator output signal, To-digital converter 151 of the arrival distance difference measuring unit.

The reference clock signal CLK _REF which is one input of the time measurement digital converter 171 is used as the TDC start signal TDC_start and the output signal of the other signal generator 130a or 130b is used as the TDC stop signal TDC_stop, . The reference clock signal CLK _REF may be a signal that is synchronized with the transmission timing of the signal received by the antenna. Therefore, the time digital converter 171 can accurately measure the delay time between the reference clock signal CLK _REF and the output signal of the signal generating unit 130a or 130b. When the delay time is measured, the distance to the measurement target can be measured using Equation (3) or (4).

The time-to-digital converter 171 of the distance measuring unit 1700 may be configured differently from the time-to-digital converter described with reference to FIGS. 10 to 16, which will be described with reference to FIGS. 18 to 20 .

18 schematically shows a distance measuring unit according to another embodiment of the present invention. 18, the distance measuring unit 270 includes a synchronizer 271, a time-to-digital converter 273, a counter 275, and a calculator 277. The synchronizer 271 receives an output signal of the signal generator 130a or 130b (hereinafter referred to as a received clock signal CLK _RS ). The synchronizer 271 is also provided with a reference clock signal (CLK _REF ). The reference clock signal CLK _REF and the received clock signal CLKR _RS have a time difference of delay time DELTA T.

A synchronizer 271 is used for interlocking the counter 275 and the time-to-digital converter 273. That is, the synchronizer 271 is a reference clock signal (CLK _REF) and a receiving clock signal signal (CNT_en) and time-to-digital converter (273) for controlling in response to the rising edge, the counter 275 of (CLKR _RS) And outputs a signal TDC stop signal (TDC_stop) for control.

The counter 275 receives the counter activation signal CNT_en from the synchronizer 271. The counter 275 measures the coarse delay time DELTA T_crs in response to the counter activation signal CNT_en. That is, the counter 275 measures the coarse delay time DELTA T_crs in order to measure the delay time DELTA T quickly.

Time digital converter 273 receives the TDC end signal TDC_stop from the synchronizer 271 and the TDC start signal TDC_start from the signal generating unit 130a or 130b. Time digital converter 273 measures the fine delay time DELTA T_fn in response to the TDC start signal TDC_start and the TDC end signal TDC_stop. That is, the time-to-digital converter 273 measures the fine delay time? T_fn in order to precisely measure the delay time? T. In this case, the time digital converter 273 and the counter 275 can operate in parallel.

The operator 277 receives the coarse delay time DELTA T_crs and the fine delay time DELTA T_fn from the counter 275 and the time digital converter 273, respectively. The calculator 270 calculates the delay time? T by subtracting the fine delay time? T_fn from the coarse delay time? T_crs.

The calculator 277 can calculate the distance D using the delay time [Delta] T.

19 is a block diagram showing the synchronizer 271 and the counter 275 of FIG. 18 in more detail. 19, the synchronizer 271 includes an S-R latch 2171 and a plurality of serially connected D-flip flops 2713, 2715, and 2717.

The reference clock signal CLK _REF is applied to the set terminal S of the SR latch 2710 and the reset terminal R is connected to the last flip flop of the plurality of flip flop lines, Signal is applied. SR latch 2710 is provided to a reference clock signal _(REF CLK) and D- last flip-flop in response to the output signal and generating a counter enable signal (CNT_en), counter 275 of it (2717).

The power supply voltage Vdd is applied to the input terminal D of the first D-flip flop 2713 and the reception clock signal CLK _RS is applied to the clock terminal CLK. The output terminal Q of the first D-flip flop 2713 is connected to the input terminal D of the second D-flip flop 2715.

The input terminal D of the second D-flip flop 2715 and the input terminal D of the third D-flip flop 2717 are connected to the output terminal Q of the first D- The output terminal Q of the 2-D flip-flop 2715 is connected. The clock terminal CLK of the second D-flip flop 2715 and the third D-flip flop 2717 are provided with a common clock signal CLK. Here, the common clock signal (CLK) is to be calculated so that a clock signal having a higher frequency than the receive clock signal (CLKrs) and the reference clock signal _(REF CLK), coarse delay time (△ T_crs).

The counter 275 receives the counter activation signal CNT_en and the common clock signal CLK. The counter 275 calculates the coarse delay time? T_crs by calculating the common clock signal CLK while the counter activation signal CNT_en is at the high level (H).

19, the synchronizer 271 is implemented by an S-R latch 261 and D-flip flops 2713, 2715, and 2717. However, this is for exemplary purposes only, and the technical idea of the present invention is not limited thereto. For example, the synchronizer 271 may be implemented by various logic gates, and the number of D-flip flops may be variously adjusted.

FIG. 20 is a diagram for explaining operations of the synchronizer 271 and the counter 275 of FIG. 19 in detail. Hereinafter, the operations of the synchronizer 271 and the counter 275 will be described in detail with reference to FIGS. 20 and 21. FIG.

At a first time t1, the reference clock signal CLK _REF transitions from a logic low L to a logic high H. In this case, the SR latch 2710 transitions the counter activation signal CNT_en from a logic low (L) to a logic high (H) in response to a reference clock signal (CLK _REF ) of logic high (H). The counter 275 starts counting the count of the common clock signal CLK in response to the counter activation signal CNT_en of the logic high H. For example, the counter 275 will count the number of rising edges of the common clock signal CLK.

At a second time t2, the received clock signal CLK _RS transitions from a logic low L to a logic high H. In this case, the receiving clock signal CLK _RS of logic high H is applied to the clock terminal of the first D-flip flop 2713. Thus, the first D-flip flop 2713 outputs the power supply voltage Vdd and provides it to the input terminal D of the second D-flip flop 2715. The second D-flip-flop 2715 delays the power-supply voltage Vdd for one period of the common clock signal CLK and transfers it to the third D-flip-flop 2717. The third D-flip flop 2717 delays the power supply voltage Vdd for one period of the common clock signal CLK and provides it to the reset terminal R of the SR latch 2710.

At the third time t3, the power supply voltage Vdd is provided to the reset terminal R of the S-R latch 2710. [ That is, a signal of logic high (H) is provided to the reset terminal R of the S-R latch 2710. In this case, the S-R latch 2710 transitions the counter activation signal CNT_en from a logic high (H) to a logic low (L). The counter 275 terminates the counting of the number of the common clock signal CLK in response to the activation signal of the logic low (L).

As described above, the counter 275 can measure the coarse delay time DELTA T_crs by counting the number of the common clock signal CLK for the first time period to the third time period t1 to t3. In this case, by adjusting the period of the common clock signal CLK, the calculation speed of the coarse delay time DELTA T_crs can be adjusted.

19 and 20, the output signals of the reception clock signal CLK _RS and the third D flip-flop 2717 are the TDC start signal TDC_start and the TDC end signal TDC-stop, respectively, .

Receiving a clock signal (CLK _RS) is because the transition to a logic high (H) at a logic low (L) at a second time (t2), TDC start signal (TDC_start) is logic low (L) at a second time (t2) To a logic high (H). Since the output signal of the third D flip-flop 2710 is changed to the power supply voltage Vdd at the third time t3, the TDC end signal TDC_stop becomes logic low L at the third time t3, To a logic high (H).

Therefore, the time-to-digital converter 273 can measure the fine delay time? T_fn in response to the TDC start signal (TDC_start) and the TDC end signal (TDC_stop). The calculator 277 can calculate the delay time? T by subtracting the fine delay time? T_fn from the coarse delay time? T_crs.

Distance measurement by direct sampling

Hereinafter, the distance measurement of the position measuring apparatus described with reference to FIG. 6 will be described. The distance measurement of this embodiment is based on precise reconstruction of the signal through direct sampling instead of using the time digital converter described above.

In an embodiment of the present invention, the distance measurement block may directly sample the impulse signal. Direct sampling may refer to a signal processing process that indicates the input signal as a value taken at predetermined intervals without any additional conversion process on the input signal. This may illustratively mean that sampling is performed without frequency up conversion or down conversion of the input signal. Also, it may mean that the sampling is performed without correlation between the input signal and the other signal.

Meanwhile, the signal processing process can be regarded as an analog-to-digital conversion process of an input signal in view of the process of processing the input impulse signal.

The analog-to-digital conversion device refers to a device for converting an analog type signal representing a continuous value into a digital type signal representing a discrete value. Recently, a high-speed analog-to-digital converter has been demanded as the operating frequency of communication systems and optical storage devices is increasing. In particular, when the frequency band used is several GHz, as in the UWB communication network, a high-speed analog-to-digital conversion technique is required to sample the frequency band more than twice as high. The inventors of the present invention invented an analog-to-digital conversion device capable of direct sampling of an input signal and a UWB signal processing technology capable of direct sampling of an input signal in consideration of the necessity of such a high-speed analog-to- .

FIG. 21 shows a distance measuring unit according to an embodiment of the present invention. The distance measuring unit 370 includes a signal restoring unit 371 and a distance calculating unit 373. The signal restoring unit 371 includes a direct sampling unit 3710 and a signal processing unit 3719. The direct sampling unit 3710 may include a sampling unit 3711, an interval adjusting unit 3715, and a quantization unit 3717. Meanwhile, although not shown in the figure, the sampling unit 3711 may further include a storage unit for storing sampling values.

The sampling unit 3711 may sample the input IR-UWB impulse signal in a first interval unit. The first interval may be illustratively 50 ps and may be determined within a range that satisfies the Nyquist rate. The interval adjusting unit 3715 may change the intervals of the values sampled by the sampling unit 3711 in units of the second interval. The second spacing may be greater than the first spacing. The interval adjusting unit 3715 can operate in the interval before the input IR-UWB impulse signal is sampled by the sampling unit 3711 and the next IR-UWB impulse signal is input. The quantization unit 3717 may quantize the sampled values changed in the second interval unit. Meanwhile, although not shown in the figure, the quantized values through the quantization unit 3717 can be encoded and converted into a digital signal. The signal processing unit 3719 can receive the digitally converted signal and process it, and can restore the input signal to the original signal.

The direct sampling unit 3710 according to an embodiment of the present invention can be understood as an analog-to-digital conversion device in terms of converting an input signal into a digital signal.

The sampling unit 3711 may sample the input IR-UWB impulse signal in a first interval unit. The first interval may be, for example, 50 ps and may be set within a range satisfying the Nyquist rate as described above.

Hereinafter, a more specific configuration of the signal processing apparatus according to an embodiment of the present invention will be described with reference to FIG. 22 shows a circuit of the signal restoring unit 371 according to an embodiment of the present invention.

Referring to FIG. 22, the sampling unit 3711 includes a plurality of sampling switches 3713 for receiving input IR-UWB impulse signals at input terminals, and a plurality of sampling switches And a plurality of fine delay cells 3712 for outputting the fine delay cells 3712 to the control terminals of the memory cells. Each of the plurality of sampling switches 3713 may be an NMOS transistor, but is not limited thereto, and an NMOS transistor, a PMOS transistor, or the like can be used.

The interval adjusting unit 3715 includes a plurality of extension switches 3717 connected to the output terminals of the plurality of sampling switches 3713 via respective input terminals and a plurality of extension switches 3717 sequentially delaying the reference signal by a second interval unit And a plurality of coarse delay cells 3716 for outputting the coarse delay cells 3716 to a control terminal of the coarse delay cell. Each of the plurality of expansion switches 3717 may be an NMOS transistor, but not limited thereto, and an NMOS transistor, a PMOS transistor, or the like can be used.

In addition, the sampling unit 3711 according to an embodiment of the present invention may further include a storage unit 3714 for storing an output value of the sampling unit 3711. [ The storage unit 3714 may be constituted by a capacitor. In addition, a plurality of storage units 3714 may be provided and may be connected to the output terminals of the respective sampling switches 3713.

The quantization unit 3717 may be configured to include a plurality of comparators and series resistors. The comparator may be an OP-AMP.

In operation, the IR-UWB impulse signal will be input to the input terminal of each of the plurality of sampling switches 3713 through the low noise amplifier. The plurality of fine delay cells 3712 may receive a reference signal, sequentially delay it, and output it to a control terminal of each of a plurality of sampling switches, and the reference signal may be an exemplary 500 kHz signal. Each of the fine delay cells may include 2n (n is a natural number) inverters, and the reference signal input thereto may be delayed by a predetermined time using the time delay of the output signal of the inverted output. By way of example, a fine delay cell can output a reference signal with a delay of 50 ps. The structure of the fine delay cell will be described in detail in Fig. 4 below.

On the other hand, the number of fine delay cells may be equal to the number of sampling switches. For example, in the analog-to-digital conversion of an IR-UWB impulse signal having a pulse width of 1 ns, if the fine delay cell outputs a reference signal delayed by 50 ps, an IR-UWB impulse signal having a pulse width of 1 ns Twenty sampling switches are needed to sample in 50ps, so twenty fine delay cells can be used.

As the signals are sequentially input to the control terminals of each of the plurality of sampling switches 3713, the respective sampling switches will be turned on sequentially. The current due to the conduction of the sampling switch flows to the storage portion 3714 connected to the output terminal and the storage portion 3714 will form a voltage value of a predetermined magnitude. The storage unit 3714 may maintain the voltage value until a signal is input to the control terminal of each of the plurality of expansion switches 3717. [

The reference signal may be input to the plurality of coarse delay cells 3715 when the sampling switches 3713 are all turned on and voltage values of a predetermined magnitude are formed in the respective storage portions 3714. [ The coarse delay cell may receive a reference signal, sequentially delay it, and output it to a control terminal of each of the plurality of extension switches, and the reference signal may be an exemplary 500 kHz signal. The coarse delay cell may include 2n (n is a natural number) inverters, and the input reference signal may be delayed by a predetermined time using a time delay of the inverted output signal. By way of example, the coarse delay cell can output the reference signal with a delay of 20ns. The structure of the coarse delay cell will be described in detail in Fig. 5 below.

As the signals are sequentially input to the control terminals of each of the plurality of extension switches 3717, each of the extension switches will be turned on sequentially. The voltage formed at the output terminal of each of the extension switches corresponding to conduction of the extension switch will be input to the inverting terminal of the comparator connected to the output terminal.

The quantizer 3717 generates a voltage corresponding to the quantization level using the reference voltage and the series resistance network as a noninverting terminal of the comparator and compares the voltage with the input voltage of the inverting terminal of the comparator to output the quantization value. On the other hand, conversely, a voltage corresponding to the quantization level can be generated at the inverting terminal of the comparator, and the input voltage can be applied to the inverting terminal of the comparator to compare them.

That is, the input IR-UWB impulse signal is sampled in units of 50 ps by a plurality of sampling switches 3713 which sequentially receive signals from the plurality of fine delay cells 3712 to the control terminal in units of 50 ps, and the sampled values are stored (Eg, a capacitor). Thereafter, a plurality of extension switches 3717 sequentially receiving a signal from the plurality of coarse delay cells 3715 in units of 20 ns to the control terminal are sequentially turned on. As a result, the sampled values are expanded in intervals of 20 ns, Unit 3717, as shown in Fig.

23 and 24 show the structure of a fine delay cell and a coarse delay cell according to an embodiment of the present invention.

Referring to FIGS. 23 and 24, the fine delay cell and the coarse delay cell according to an embodiment of the present invention may include 2n (n is a natural number) inverters. The inverter can delay the input signal by a predetermined time, and output the inverted signal. And the invertor is connected with 2n (n is a natural number) so that it can function as a buffer. For example, in order to delay the input signal of the fine delay cell by 50 ns and output it, it is necessary to measure the time taken for outputting the signal inputted to one inverting unit, can do.

In addition, the fine delay cell and the coarse delay cell according to an embodiment of the present invention may each include a logic gate. The logic gate may be illustratively implemented as an XOR gate. The logic gate receives an input signal and an output signal of a buffer composed of 2n (n is a natural number) inverters and outputs a signal having a predetermined pulse width.

 25 is an equivalent circuit diagram of a signal restoring unit according to an embodiment of the present invention. Referring to FIG. 25, the sampling unit 3711 may include a storage unit 3714. The sampling unit 3711 can operate as switches S1 to S90 that are short-circuited by a predetermined interval. The predetermined interval of the sampling unit 3711 may be, for example, 50 ps. That is, when the switch is short-circuited in units of 50 ps, the input IR-UWB impulse signal can be sampled in units of 50 ps and stored in the storage unit 3714.

The interval adjusting unit 3715 can operate as switches E1 to E90 that are short-circuited by a predetermined interval. The predetermined interval of the interval adjusting portion 3715 may be 20 ns as an example. Since the switches E1 to E90 are short-circuited in units of 20 ns, the interval of the sampling values stored in the storage unit 3714 can be extended in units of 20 ps in units of 50 ps and transferred to the quantization unit 3717.

FIG. 26 shows a process of processing a signal by each configuration of the signal restoring unit according to an embodiment of the present invention.

As shown in FIG. 26, the input IR-UWB impulse signal may be input to the sampling unit through the low-noise amplifier. The pulse width of the incoming IR-UWB impulse signal may be illustratively 1 ns. As described above, the sampling unit may exemplarily sample the input impulse signal in units of 50 ps. In this case, 20 sampling values will be taken and the total spacing of the sampled values will be equal to the pulse width of the impulse signal input at 1 ns.

Next, the sampled values can be extended in units of 20 ns by the interval adjusting unit. The total spacing of the sampled values extended by the spacing controller would be 400 ns. This is because 20 sampling values are extended in units of 20 ns. On the other hand, as described above, the interval adjusting unit will expand the interval of the sampling values in the interval before the input IR-UWB impulse signal is sampled and before the next IR-UWB impulse signal is input. The interval may be, for example, 2 microseconds. The expanded sampled values will be input to the quantization unit and quantized.

FIG. 27 shows a signal processing process of the sampling unit of the signal restoring unit according to an embodiment of the present invention in more detail. As shown in FIG. 27, an IR-UWB impulse signal having a pulse width of 1 ns as an example can be sampled in units of 50 ps.

28 illustrates a signal processing process of the interval adjusting unit of the signal restoring unit according to an embodiment of the present invention in more detail. As shown in FIG. 28, the interval of the sampled values sampled in units of 50 ps will be extended in units of 20 ns.

29 to 34 are graphs showing the results of the IR-UWB signal restoration process according to an embodiment of the present invention. It should be understood that the signal processing processes of Figs. 29 to 34 below are illustrative.

Referring to FIG. 29, the result of the signal processing of the signal restoring unit according to an embodiment of the present invention can be confirmed.

FIGS. 30 and 31 illustrate a process of inputting a signal when there is no delay, and FIGS. 32 and 33 show a process of inputting a signal when there is a delay. In the case where there is a delay, it may be understood as a delay in receiving a signal due to an obstacle or the like in the process of receiving a signal illustratively.

More specifically, FIG. 30 shows a result obtained by sampling the input signal in the first interval and delaying the interval of the sampled values by a second interval larger than the first interval when there is no delay. 31 shows a result of quantizing the sampling values extended in the second interval unit.

FIG. 32 shows a result obtained by sampling an input signal in a first interval and expanding the interval of sampling values by a second interval larger than the first interval when there is a delay, for example, when there is a delay of 20 ps. FIG. 33 shows a result obtained by quantizing the sampling values expanded in the second interval unit.

FIG. 34 shows a sampling result of the extended sampling values in units of a second interval when there is a delay and when there is no delay. Referring to FIG. 34, when there is a delay of 20 ps, there occurs a change in sampling values corresponding to the delay time. The graph in blue is for a delay of 20 ps and the graph in red for no delay.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the scope of the present invention is not limited to the above-described embodiments, but may be embodied in various forms without departing from the scope of the appended claims. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the appended claims.

Claims (18)

delete delete A receiving unit including at least a first antenna and a second antenna; And,
And a time-digital converter for measuring an arrival time difference between a first signal received through the first antenna and a second signal received through the second antenna,
The attenuation angle measuring device is connected between the receiver and the time digital converter to generate a first TDC signal having a rising or falling edge from the first signal to a first input of the time digital converter, And a signal generator for generating a second TDC signal having a rising or falling edge as a second input of the time digital converter,
Wherein the signal generator comprises:
A low noise amplifier for amplifying a signal received at a corresponding antenna;
An envelope detector coupled to the low noise amplifier and detecting a peak point of the low noise amplifier;
A comparator coupled to the envelope detector for comparing the envelope detector output signal with a reference level signal; And,
And a flip-flop for generating a TDC signal having a rising or falling edge from the comparator output. The method of claim 3,
Wherein the signal received by the antenna is an impulse signal and the signal generated by the signal generator from the impulse signal is a clock signal. A receiving unit including at least a first antenna and a second antenna;
A first time digital converter for measuring a time difference of arrival between a first signal received through the first antenna and a second signal received through the second antenna, the arrival time difference calculation block calculating the arrival time difference;
Digital converter to generate a first TDC signal having a rising or falling edge as a first input of the time-digital converter from the first signal and generating a first TDC signal from the second signal, A signal generator for generating a second TDC signal having a rising or falling edge as a second input of the first TDC signal; And
And a distance measuring unit for measuring a distance to the first antenna and / or the second antenna,
Wherein the signal generator comprises:
A low noise amplifier for amplifying a signal received at a corresponding antenna;
An envelope detector coupled to the low noise amplifier and detecting a peak point of the low noise amplifier;
A comparator coupled to the envelope detector for comparing the envelope detector output signal with a reference level signal; And,
And a flip-flop for generating a TDC signal having a rising or falling edge from the comparator output,
And the position of the measurement object is calculated from the arrival angle calculated from the arrival time difference and the distance from the first antenna and / or the second antenna. delete 6. The method of claim 5,
Wherein the distance measuring unit includes a second time digital converter having two inputs of the first TDC signal and the reference clock signal or the second TDC signal and the reference clock signal. 6. The method of claim 5,
The distance measuring unit includes:
A second time-digital converter receiving the first TDC signal and the reference level signal as inputs; And
And a third time-digital converter receiving the second TDC signal and the reference level signal as input. A receiving unit including at least a first antenna and a second antenna;
An arrival time difference calculation block for calculating an arrival time difference between a first signal received through the first antenna and a second signal received through the second antenna; And,
And a distance measuring unit for measuring a distance to the first antenna and / or the second antenna,
Wherein the arrival time difference calculation block includes a first time digital converter that receives as input the first TDC signal generated from the first signal and the second TDC signal generated from the second signal,
And the distance measuring unit includes a signal restoring unit connected to the first antenna or the second antenna and restoring the received signal. 10. The method of claim 9,
Wherein the signal restoring unit comprises:
Sampling the signals received by the antenna in units of a first interval, and quantizing the sampled values by changing intervals of the sampled values in units of a second interval larger than the first interval. 11. The method according to any one of claims 5 to 9,
And a position calculation unit connected to the arrival time difference calculation block and the distance measurement unit to calculate a position. Amplify the two signals received from the two antennas;
Detecting an envelope of the amplified two signals;
Compare the envelope of the two signals with the reference level signal;
Generating a TDC start signal and a TDC stop signal having edges from the comparison result;
Providing the TDC start signal and the TDC stop signal as inputs to a time digital converter to calculate an arrival time difference of two signals received at the two antennas;
Obtaining a difference in arrival distance between the two antennas from the arrival time difference; And
And obtaining an arrival angle from the distance difference and the distance between the two antennas. 13. The method of claim 12,
Wherein the reception signal of the antenna which received the signal first among the two antennas is the TDC start signal, and the reception signal of the antenna which received the signal later is provided to the time-digital converter as the TDC stop signal. Amplify the two signals received from the two antennas;
Detecting an envelope of the amplified two signals;
Compare the envelope of the two signals with the reference level signal;
Generating a TDC start signal and a TDC stop signal having edges from the comparison result;
Providing the TDC start signal and the TDC stop signal as inputs to a first time digital converter to calculate an arrival time difference of two signals received at the two antennas;
Measuring a distance from the signal received by the antenna to a measurement object; And
Calculating an arrival angle from the arrival distance difference and a distance between the two antennas, calculating a position of the measurement target from the arrival angle and the distance to the measurement target, ≪ / RTI > 15. The method of claim 14,
Wherein the first TDC signal is a TDC start signal, and the second TDC signal is a TDC stop signal. 15. The method of claim 14,
The distance from the signal received by the antenna to the measurement object is measured by:
Measuring the delay time of the signal received by the antenna; and
And calculating the distance to the measurement object using the delay time. 17. The method of claim 16,
The delay time of the signal received by the antenna is measured by:
Providing a reference clock signal to a TDC start signal of a second time digital converter;
Providing a signal received by the antenna as a TDC stop signal of a second time digital converter,
Wherein the delay time is a delay time between the reference clock signal and a signal received by the antenna. Providing the two signals received from the two antennas as inputs to the first time digital converter to calculate an arrival time difference of the two signals received from the two antennas;
Measuring a distance from the signal received by the antenna to a measurement object; And,
Calculating a position of the measurement object from the arrival angle and the distance calculated from the arrival time difference,
Wherein measuring the distance from the signal received by the antenna to the measurement object comprises:
Recovering a signal received by the antenna through direct sampling; And
And calculating a distance using the recovered signal.

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