KR101183164B1 - Distance detecting system and receiving device of distance detecting system - Google Patents

Abstract

The present invention relates to a distance measuring system using the IR-UWB method. In the distance measuring system using the IR-UWB method according to an embodiment of the present invention, a transmission apparatus for transmitting an impulse signal and the impulse signal are received, and a time interval (hereinafter, delay time) between a time point at which an impulse signal is transmitted and a time point for receiving the impulse signal is provided. ), And the receiving device measures the delay time using a TDC scheme. Therefore, the distance measuring system according to the embodiment of the present invention enables precise distance measurement.

Description

DISTANCE DETECTING SYSTEM AND RECEIVING DEVICE OF DISTANCE DETECTING SYSTEM}

The present invention relates to a distance measuring system, and more particularly to a distance measuring system using an impulse signal and a receiving device thereof.

Recently, research on a distance measuring system using an Impulse Radion-Ultra Wide Band (IR-UWB) method has been actively conducted. IR-UWB is a technology that uses a frequency band of several GHZ or more at baseband without using a wireless carrier, and is a new wireless technology applied to communication or radar. IR-UWB technology uses very narrow pulses of several nanoseconds or several picoseconds, which can be implemented at low power and can be used in conjunction with conventional communication systems.

However, such a distance measurement system using the IR-UWB method has a limitation in that precise distance measurement is generally difficult. That is, the conventional distance measuring system using the IR-UWB method is mainly applied to a field that allows errors of several m or several cm, such as a home application system, due to the difficulty of precise distance measurement.

It is an object of the present invention to provide a distance measuring system and a receiving device thereof capable of measuring distance precisely.

Distance measuring system using the IR-UWB method according to an embodiment of the present invention includes a transmitting device for transmitting an impulse signal; And a receiving device that receives the impulse signal and measures a time interval (hereinafter, a delay time) between a transmission time and a reception time of the impulse signal at all times, wherein the receiving device measures the delay time using a TDC scheme. Characterized in that.

According to an embodiment, the reception apparatus may delay a signal synchronized with a transmission point of the impulse signal (hereinafter referred to as a first signal) and a signal synchronized with a reception point of the impulse signal (hereinafter referred to as a second signal) at different time intervals. The delay time is measured.

In an embodiment, the first signal is delayed at a first time interval and the second signal is delayed at a second time interval shorter than the first time interval.

In an embodiment, the first and second time intervals are longer than the delay time.

In an embodiment, the transmitting apparatus includes a transmission clock signal generator for generating a transmission clock signal; An impulse generator for converting the transmission clock signal into a digital impulse signal; And a signal distortion filter for converting the digital impulse signal into the impulse signal.

In an embodiment, the impulse generator is implemented using at least one inverter and at least one XOR gate.

In example embodiments, the reception apparatus measures a coarse delay time between a signal synchronized with the transmission point of the impulse signal (hereinafter referred to as a first signal) and a signal synchronized with the reception point of the impulse signal (hereinafter referred to as a second signal). A counter; And a TDC for measuring a fine delay time between the first signal and the second signal.

In embodiments, the counter may further include a synchronizer controlling the counter and the TDC in response to the first and second signals.

In an embodiment, the synchronizer is implemented by at least one latch and at least one flip-flop.

The method may further include an operator for measuring the delay time by subtracting the fine delay time from the coarse delay time.

A distance measuring system according to an embodiment of the present invention includes a transmitting device for transmitting an impulse signal; And a receiver for transmitting the impulse signal and measuring a time interval between a transmission time and a reception time of the impulse signal, wherein the reception device demodulates the received impulse signal into a reception clock signal; And a distance measuring unit for measuring a time interval (hereinafter, referred to as a delay time) between the signal (hereinafter, referred to as a transmission clock signal) and the reception clock signal synchronized at the time of transmission of the impulse signal using a TDC scheme.

In an embodiment, the distance measuring unit delays the transmission clock signal and the reception clock signal at different time intervals to measure the delay time.

In example embodiments, the distance measuring unit may include: a counter configured to measure a coarse delay time between the transmission clock signal and the reception clock signal; And a TDC for measuring a fine delay time between the transmit clock signal and the receive clock signal.

The apparatus may further include a synchronizer configured to control the counter and the TDC in response to the rising edges of the transmit clock signal and the receive clock signal.

In an embodiment, the synchronizer is implemented by at least one latch and at least one flip-flop.

A receiving apparatus of a distance measuring system according to an embodiment of the present invention includes a demodulator for receiving an impulse signal and demodulating the received impulse signal into a received clock signal; And a distance measuring unit configured to measure a time interval (hereinafter, referred to as a delay time) between the transmission clock signal synchronized with the reception clock signal synchronized with the transmission time of the impulse signal using a TDC scheme.

In example embodiments, the distance measuring unit may include: a counter configured to measure a coarse delay time between the transmission clock signal and the reception clock signal; And a TDC for measuring a fine delay time between the transmit clock signal and the receive clock signal.

In an embodiment, the counter starts measuring the coarse delay time in response to the rising edge of the transmit clock signal, and the TDC starts measuring the fine delay time in response to the rising edge of the received clock signal. do.

In example embodiments, the delay time may be a time obtained by subtracting the fine delay time from the coarse delay time.

Distance measuring method using the IR-UWB according to an embodiment of the present invention comprises the steps of receiving an impulse signal; Converting the impulse signal into a received clock signal; And measuring a time interval (hereinafter, referred to as a delay time) between the transmission clock signal synchronized with the reception clock signal synchronized with the transmission time of the impulse signal using a TDC scheme.

The measuring of the delay time may include measuring a coarse delay time between the transmit clock signal and the receive clock signal; Measuring a fine delay time between the transmit clock signal and the receive clock signal; And subtracting the fine delay time from the coarse delay time.

The distance measurement system according to an embodiment of the present invention enables precise distance measurement by incorporating a TDC (Time to Digital Converter) method into an IR-UWB method.

1 shows a distance measuring system according to a first embodiment of the present invention.
2 shows a distance measuring system according to a second embodiment of the present invention.
3 is a block diagram illustrating the configuration of the transmitter of FIG. 1 in more detail.
4 shows the structure of the impulse generator of FIG. 3 in more detail.
5 is a timing diagram illustrating in more detail the operation of the transmitter of FIG. 3 and the impulse generator of FIG. 4.
6 is a block diagram illustrating in more detail the configuration of the receiving apparatus of FIG. 1.
7 is a block diagram illustrating the demodulator of FIG. 6 in more detail.
FIG. 8 is a timing diagram for describing an operation of the demodulator of FIG. 6.
9 is a block diagram illustrating in detail the distance measurer of FIG. 6.
10 is a block diagram illustrating in detail the synchronizer and the counter of FIG.
FIG. 11 is a timing diagram for describing in detail the operation of the synchronizer and the counter of FIG. 10.
12 is a block diagram illustrating the TDC of FIG. 9 in more detail.
FIG. 13 is a timing diagram illustrating the operation of the TDC of FIG. 9 in more detail.
14 and 15 show an application example in which the transmitting apparatus and the receiving apparatus of the radar type distance measuring system of FIG. 1 are applied to a chest compression depth measuring system for CPR.
16 and 17 show an application example in which the transmitting device and the receiving device of the transceiver type distance measuring system of FIG. 2 are applied to a chest compression depth measuring system for CPR.
18 is a perspective view showing a manikin for CPR training equipped with a distance measuring system according to an embodiment of the present invention.
19 is a cross-sectional view illustrating an embodiment of an internal configuration of the mannequin of FIG. 18.
20 is another embodiment of a cross-sectional view of the mannequin of FIG. 18.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily understand the technical spirit of the present invention.

1 shows a distance measuring system 10 according to a first embodiment of the present invention. In FIG. 1, a radar ranging system 10 is shown. Referring to FIG. 1, the distance measuring system 10 includes a transmitting device 100 and a receiving device 200. The distance measuring system 10 of FIG. 1 measures the distance between the distance measuring system 10 and a target.

In detail, the transmitting device 100 of the distance measuring system 10 transmits a signal to the target, and the receiving device 200 receives the signal reflected by the target 20. The distance measuring system 10 measures the delay time between the signal transmitted from the transmitting device 100 and the signal received from the receiving device 200, thereby providing a distance d between the distance measuring system 10 and the target 20. Measure

That is, when the position of the target 20 changes, the time for the signal transmitted from the transmitting apparatus 100 to be reflected by the target 20 and returned also varies, so that the distance measuring system 10 may be different from the distance measuring system 10. The distance d between the targets 20 may be measured. This may be expressed as in Equation 1.

[Equation 1]

d = (c × Δt) / 2, c = 3 × 10 ^ 8 m / s

Here, 'Δt' refers to a time taken for the signal transmitted from the transmitting apparatus 100 to return to the receiving apparatus 200 and may be referred to as a delay time.

2 shows a distance measuring system 20 according to a second embodiment of the present invention. 2 illustrates a transceiver measuring distance measuring system. The distance measuring system of FIG. 2 is similar to the distance measuring system of FIG. 1 and is therefore described using similar reference numerals. The distance measuring system 20 of FIG. 2 measures the distance between the transmitting device 300 and the receiving device 400.

Similar to the distance measuring system 10 of FIG. 1, the distance measuring system 20 of FIG. 2 measures the delay time between the signal transmitted from the transmitting device 300 and the signal received from the receiving device 400, The distance d between the transmitter 300 and the receiver 400 may be measured.

That is, when the distance between the transmitter 300 and the receiver 400 changes, since the time required until the signal transmitted from the transmitter 300 is received by the receiver 400 varies, the distance measuring system ( 20 may measure a distance between the transmitting device 300 and the receiving device 400. This may be expressed as in Equation 2.

&Quot; (2) "

d '= c × Δt, c = 3 × 10 ^ 8 m / s

Here, 'Δt' refers to a time taken until the signal transmitted from the transmitting device 300 is received by the receiving device 400, and may be referred to as a delay time as in FIG. 1.

1 and 2, the distance measuring system according to an exemplary embodiment of the present invention measures a distance by measuring a delay time. Therefore, in order to accurately measure the distance, it is required to precisely measure the delay time between the transmission signal and the reception signal. In addition, since the signal transmitted from the transmitting apparatus may be affected by multipath fading, it is required to minimize it.

Therefore, the transmission apparatus and the reception apparatus according to the embodiment of the present invention, which accurately measure the delay time between the transmission signal and the reception signal and simultaneously minimize the influence of multipath fading, are described in more detail. For convenience of description, the configuration and operation of the transmitter 100 and the receiver 200 of the distance measuring system 10 of FIG. 1 will be described below. However, it is obvious that this can be applied to the distance measuring system 20 of FIG. 2.

3 is a block diagram illustrating the configuration of the transmitting apparatus 100 of FIG. 1 in more detail. Referring to FIG. 3, the transmission apparatus 100 includes a transmission clock signal generator 110, an impulse generator 120, and a signal distortion filter 130.

The transmission clock signal generator 110 generates a transmission clock signal TCLK and transfers it to the impulse generator 120. Here, the transmission clock signal TCLK may be a clock signal having a constant frequency.

The impulse generator 120 receives the transmission clock signal TCLK from the transmission clock signal generator 110. The impulse generator 120 converts the transmission clock signal TCLK into a digital impulse signal DIP, and transfers it to the signal distortion filter 130.

The signal distortion filter 130 receives the digital impulse signal DIP from the impulse generator 120. The signal distortion filter 130 converts the digital impulse signal DIP into an analog impulse signal AIP and transmits the same through an antenna. In this case, the signal distortion filter 130 may further include a power amplifier (not shown) in order to increase the power of the transmitted analog impulse signal (AIP).

4 shows the structure of the impulse generator 120 of FIG. 3 in more detail. For example, as shown in FIG. 4, the impulse generator 120 may be implemented using an inverter and an XOR gate. However, this is merely an example and the technical spirit of the present invention is not limited thereto. For example, the impulse generator 120 may be implemented using an inverter and an XOR gate and / or a NAND gate.

FIG. 5 is a timing diagram for describing in more detail the operation of the transmitting apparatus 100 of FIG. 3 and the impulse generator 120 of FIG. 4.

3 to 5, the inverters of the impulse generator 120 receive the transmission clock signal TCLK generated by the transmission clock signal generator 110. The inverters of the impulse generator 120 delay the transmission clock signal TCLK to generate the delayed transmission clock signal D_TCLK. The XOR gate of the impulse generator 120 receives the delayed transmission clock signal D_TCLK and the transmission clock signal TCLK, and generates a digital impulse signal DIP by using the XOR gate. The signal distortion filter 130 receives the digital impulse signal DIP and converts it into an analog impulse signal AIP.

As described with reference to FIGS. 3 to 5, the transmitter according to the embodiment of the present invention generates an analog impulse signal for distance measurement. For example, the analog impulse signal may be an impulse signal used in a wireless communication technology of UWB or IR-UWB scheme. Since the impulse signal is used, the distance measuring system according to the embodiment of the present invention has an advantage of excellent transmittance to a building, a wall, and the like, and enables low power communication.

6 is a block diagram illustrating a configuration of the receiving apparatus 200 of FIG. 1 in more detail. Referring to FIG. 6, the receiver 200 includes a demodulator 201 and a distance measurer 202.

The demodulator 201 receives the delayed analog impulse signal DAIP transmitted from the transmitter 100 (refer to FIG. 1) and demodulates it into the received clock signal RCLK. Here, the delayed analog impulse signal DAIP is a signal in which the analog impulse signal AIP (see FIGS. 3 and 5) is delayed by a delay time (Δt, Equation 1) by the distance d (see FIG. 1), The reception clock signal RCLK is a signal in which the transmission clock signal TCLK (see FIGS. 3 and 5) is delayed by the delay time Δt by the distance d.

The distance measurer 202 receives the received clock signal RCLK from the demodulator 201. The distance measuring unit 202 measures the distance d using the delay time DELTA t between the reception clock signal RCLK and the transmission clock signal TCLK. In this case, the distance measuring unit 202 precisely measures the delay time Δt using a TDC (Time to Digital Convertor) technique.

FIG. 7 is a block diagram illustrating the demodulator 201 of FIG. 6 in more detail. Referring to FIG. 7, the demodulator 201 includes a low noise amplifier 210, a preamplifier 220, an outline detector 230, a comparator 240, and a T-flip flop 250.

The low noise amplifier 210 receives the delayed analog impulse signal DAIP and amplifies it. In this case, the low noise amplifier 210 will suppress the noise generated due to multipath fading or the like as much as possible. The low noise amplifier 210 outputs a low noise amplified signal (LNA) and transfers it to the preamplifier 220.

The preamplifier 220 receives the low noise amplified signal LNA from the low noise amplifier 210 and amplifies it. That is, the preamplifier 220 amplifies the low noise amplified signal LNA in a peak-to-peak manner to compensate for the gain of the low noise amplified signal LNA. The preamplifier 220 outputs a preamplified signal PRA and transmits it to the outline detector 230.

The outline detector 230 receives a preamplified signal PRA from the preamplifier 220. The outline detector 230 detects an outline of the preamplified signal PRA, for example, a peak point of the preamplified signal PRA. The outline detector 230 outputs the outline detection signal EVD and transmits the outline detection signal EVD to the comparator 240.

The comparator 240 receives the outline detection signal EVD from the outline detector 230. The comparator 240 compares the outline detection signal EVD with a reference level. For example, when the level of the edge detection signal EVD is lower than the reference level, the comparator 240 outputs '1'. When the level of the edge detection signal EVD is higher than the reference level, the comparator 240 outputs '0'.

That is, the comparator 240 converts the edge detection signal EVD into a delayed digital impulse signal DDIP which is a digital signal. The delayed digital impulse signal DDIP is a signal delayed by a delay time Δt (see Equation 1) compared to the digital impulse signal DIP (see FIGS. 3 and 5). Comparator 240 delivers a delayed digital impulse signal (DDIP) to T-flip-flop 250.

On the other hand, the reference level of the comparator 240 will be appropriately selected to minimize the effects of multipath fading. That is, the reference level of the comparator 240 may be set higher than the level of the noise generated due to the multipath fading and lower than the level of the signal generated through the direct path.

The T-flip-flop 250 receives a delayed digital impulse signal (DDIP) from the comparator 240. The T-flip-flop 250 generates a receive clock signal RCLK by using a rising edge of the delayed digital impulse signal DDIP. For example, the T-flip-flop 250 maintains a value between the rising edges of the delayed digital impulse signal DDIP at '1', thereby generating the received clock signal RCLK.

FIG. 8 is a timing diagram for describing an operation of the demodulator 201 of FIG. 6. In order to show the delay time DELTA t between the transmission clock signal TCLK and the reception clock signal RCLK, the transmission clock signal TCLK and the like shown in FIG. 5 are also shown in FIG. 8.

7 and 8, the low noise amplifier 210 receives a delayed analog impulse signal DAIP from an antenna and outputs a low noise amplified signal LNA. The low noise amplified signal LNA is converted into an edge detection signal EVD by the preamplifier 220 and the edge detector 230, and the edge detection signal EVD is converted by the comparator 240 into a delayed digital impulse signal DDIP. Is converted to.

In this case, the reference level of the comparator 240 is set higher than the noise level of the edge detection signal EVD, thereby minimizing the effects of multipath fading. In addition, by using the leading pulse among the pulses of the delayed digital impulse signal DDIP to measure the delay time DELTA t, the effect of multipath fading is minimized.

The delay digital impulse signal DDIP is converted into the received clock signal RCLK by the T-flip flop 250. In this case, the rising edge of the reception clock signal RCLK and the rising edge of the transmission clock signal TCLK have a time difference by a delay time DELTA t. Therefore, when the delay time Δt is measured, the distance measuring system 10 (see FIG. 1) according to the embodiment of the present invention may calculate the distance d (see FIG. 1). Hereinafter, the distance measuring unit 202 of FIG. 6 for precisely measuring the delay time Δt will be described in more detail.

9 is a block diagram illustrating the distance measuring unit 202 of FIG. 6 in more detail. Referring to FIG. 9, the distance measuring unit 202 includes a synchronizer 260, a counter 270, a TDC 280, and an operator 290.

The synchronizer 260 receives the received clock signal RCLK from the demodulator 201 (see FIG. 6). The synchronizer 260 receives a clock signal TCLK_s (hereinafter, referred to as a transmission clock signal TCLK_s) synchronized with the transmission clock signal TCLK from the outside. That is, the transmission clock signal TCLK_s and the reception clock signal RCLK have a time difference equal to the delay time DELTA t.

The synchronizer 260 is used to interlock the counter 270 and the TDC 280. That is, the synchronizer 260 is a signal CNT_en for controlling the counter 270 and a signal for controlling the TDC 280 in response to the rising edges of the transmission clock signal TCLK_s and the reception clock signal RCLK. Output TDC_strt and TDC_stp respectively.

The counter 270 receives the counter activation signal CNT_en from the synchronizer 260. The counter 270 measures the coarse delay time DELTA t_crs in response to the counter activation signal CNT_en. That is, the counter 270 measures the coarse delay time DELTA t_crs in order to quickly measure the delay time DELTA t.

The TDC 280 receives the TDC start signal TDC_strt and the TDC end signal TDC_stp from the synchronizer 260. The TDC 280 measures the fine delay time Δt_fn in response to the TDC start signal TDC_strt and the TDC end signal TDC_stp. That is, the TDC 280 measures the fine delay time DELTA t_fn in order to accurately measure the delay time DELTA t. In this case, the TDC 280 and the counter 270 may each perform an operation in parallel.

The operator 290 receives the coarse delay time Δt_crs and the fine delay time Δt_fn from the counter 270 and the TDC 280, respectively. The calculator 270 calculates the delay time DELTA t by subtracting the fine delay time DELTA t_fn from the coarse delay time DELTA t_crs. This may be expressed as in Equation 3.

&Quot; (3) "

Δt = Δt_crs-Δt_fn

The calculator 290 may calculate the distance d (see FIG. 1 and Equation 1) using the delay time Δt.

10 is a block diagram illustrating in detail the synchronizer 260 and the counter 270 of FIG. 9. Referring to FIG. 10, the synchronizer 260 includes an S-R latch 261 and a plurality of D-flip flops 262 to 264.

The transmission clock signal TCLK_s is applied to the set terminal S of the S-R latch 261, and the output signal of the D-flip flop 264 is applied to the reset terminal R. The S-R latch 261 generates a counter activation signal CNT_en in response to the transmission clock signal TCLK_s and the output signal of the third D-flip-flop 264, and provides the counter activation signal CNT_en to the counter 270.

The power supply voltage Vdd is applied to the input terminal D of the first D flip-flop 262, and the reception clock signal RCLK is applied to the clock terminal CLK. The output terminal Q of the first D flip-flop 262 is connected to the input terminal D of the second D flip-flop 263.

The input terminal D of the second D flip-flop 263 and the input terminal D of the third D flip-flop 264 are respectively the output terminal Q and the first terminal of the first D flip-flop 262. The output terminal Q of the 2D flip-flop 263 is connected. The clock signal CLK is provided to the clock terminal CLK of the second D flip-flop 263 and the third D flip-flop 264. Here, the clock signal CLK is a clock signal having a higher frequency than the reception clock signal RCLK and the transmission clock signal TCLK_s.

The counter 270 receives the counter activation signal CNT_en and the clock signal CLK. The counter 270 calculates the coarse delay time DELTA t_crs by counting the clock signal CLK while the counter activation signal CNT_en is at the high level H.

Meanwhile, in FIG. 10, the synchronizer 260 is implemented by the S-R latch 261 and the D-flip flops 262 to 264. However, this is for exemplary purposes only, and the technical idea of the present invention is not limited thereto. For example, the synchronizer 260 may be implemented by various logic gates, and the number of D-flip-flops may be adjusted in various ways.

FIG. 11 is a timing diagram for describing in detail the operations of the synchronizer 260 and the counter 270 of FIG. 10. Hereinafter, operations of the synchronizer 260 and the counter 270 of FIG. 9 will be described in detail with reference to FIGS. 10 and 11.

At a first time t1, the transmit clock signal TCLK_s transitions from a logic low L to a logic high H. In this case, the S-R latch 261 transitions the counter activation signal CNT_en from the logic low L to the logic high H in response to the transmission clock signal TCLK_s of the logic high H. The counter 270 starts counting the clock signal CLK in response to the counter activation signal CNT_en of the logic high H. For example, the counter 270 will begin counting the rising edge of the clock signal CLK.

At a second time t2, the received clock signal RCLK transitions from a logic low L to a logic high H. In this case, the reception clock signal RCLK of logic high H is applied to the clock terminal of the first D flip-flop 262. Accordingly, the first D flip-flop 262 outputs a power supply voltage Vdd and provides it to the input terminal D of the second D flip-flop 263. The second D flip-flop 263 delays the power supply voltage Vdd for one period of the clock signal CLK and transfers it to the third D flip-flop 264. The third D flip-flop 264 delays the power supply voltage Vdd for one period of the clock signal CLK and provides it to the reset terminal R of the S-R latch 261.

At the third time t3, the power supply voltage Vdd is provided to the reset terminal R of the S-R latch 261. That is, a signal of logic high H is provided to the reset terminal R of the S-R latch 261. In this case, the S-R latch 261 transitions the counter activation signal CNT_en from a logic high H to a logic low L. The counter 270 ends the counting of the clock signal CLK in response to the activation signal of the logic low L.

As described above, the counter 270 may measure the coarse delay time Δt_crs by counting the clock signal CLK during the first to third times t1 to t3. In this case, by adjusting the period of the clock signal CLK, the calculation speed of the coarse delay time DELTA t_crs can be adjusted.

10 and 11, the output signals of the reception clock signal RCLK and the third D-flip-flop 264 are the TDC start signal TDC_strt and the TDC end signal TDC-stp, respectively. Used.

Since the received clock signal RCLK transitions from the logic low L to the logic high H at the second time t2, the TDC start signal TDC_strt is at the logic low L at the second time t2. Transition to logic high (H). In addition, since the output signal of the third D-flip-flop 264 changes from the third time t3 to the power supply voltage Vdd, the TDC end signal TDC_stp is the logic low L at the third time t3. Transitions to a logic high (H) at.

Accordingly, the TDC 280 (see FIG. 9) may measure the fine delay time Δt_fn in response to the TDC start signal TDC_strt and the TDC end signal TDC_stp. The operator 290 (see FIG. 9) may calculate the delay time Δt by subtracting the fine delay time Δt_fn from the coarse delay time Δt_crs. Hereinafter, the structure and operation of the TDC 280 of FIG. 9 for measuring the fine delay time DELTA t_fn will be described in detail.

12 is a block diagram illustrating the TDC 280 of FIG. 9 in more detail. Referring to FIG. 12, the TDC 280 includes a delay comparison block 281 and an encoder 282.

Delay comparison block 281 includes a plurality of inverters and comparators. The delay comparison block 281 delays the TDC start signal TDC-strt and the TDC end signal TDC-stp at different time intervals, and compares them.

Specifically, the inverters each form a different delay line. For example, it is assumed that the inverters corresponding to the TDC start signal TDC_strt each form a delay line that delays the input signal by 60p and continuously delays the TDC start signal TDC-strt at a time interval of 60p. It is assumed that the inverters corresponding to the TDC end signal TDC_stp each form a delay line that delays the input signal by 50p and continuously delays the TDC end signal TDC_stp at a time interval of 50p. However, this is merely exemplary, and it will be understood that the technical spirit of the present invention is not limited thereto.

The first to n th comparators receive the TDC start signal and the TDC end signal which are delayed at different time intervals, respectively. The first to n th comparators respectively compare whether the rising edge of the received TDC end signal has precedence over the rising edge of the TDC start signal, and provide the comparison result to the encoder 282.

For example, the first comparator receives the first TDC start signal TDC_strt_1 delayed by 60p compared to the TDC start signal TDC_strt and the first TDC end signal TDC_stp delayed by 50p compared to the TDC end signal TDC_stp. The first comparator compares whether the rising edge of the first TDC end signal TDC_stp takes precedence over the first TDC start signal TDC_strt_1. For example, if the rising edge of one TDC end signal TDC_stp does not take precedence over the first TDC start signal TDC_strt_1, the first comparator will output '1' (ie, Q = 1). For example, if the rising edge of one TDC end signal TDC_stp takes precedence over the first TDC start signal TDC_strt_1, the first comparator will output '0' (ie, Q = 0).

The encoder 282 receives the output values Q1 to Qn of the first to n th comparators of the delay comparison block 281. The encoder 282 encodes output values Q1 to Qn of the first to n th comparators and outputs a fine delay time Δt_fn.

FIG. 13 is a timing diagram illustrating the operation of the TDC 280 of FIG. 9 in more detail. For simplicity, it is assumed in FIG. 13 that the rising edge of the third TDC end signal TDC_stp_3 takes precedence over the rising edge of the third TDC start signal TDC_strt_3. Hereinafter, the operation of the TDC 280 of FIG. 9 will be described in detail with reference to FIGS. 12 and 13.

At the second time t2, the TDC start signal TDC_strt transitions from a logic low L to a logic high H, and at a third time t3, the TDC end signal TDC_stp is logic at a logic low L. Transition to high (H). That is, the rising edge of the TDC start signal TDC_strt is located at the second time t2, and the rising edge of the TDC end signal TDC_stp is located at the third time t3. In this case, it is assumed that the time difference between the second time t2 and the third time t3 is a fine delay time Δt_fn as in FIG. 11.

First, the TDC start signal TDC_strt is delayed by 60p by the inverter. That is, the inverter outputs the first TDC start signal TDC_strt_1 which is 60p delayed compared to the TDC start signal TDC_strt. In addition, the TDC end signal TDC_stp is delayed by 50p by the inverter. That is, the inverter outputs a first TDC end signal TDC_stp_1 delayed by 50p compared to the TDC end signal TDC_stp. In this case, the rising edges of the first TDC start signal TDC_strt_1 and the first TDC end signal TDC_stp_1 are located at the fourth time t4 and the fifth time t5, respectively.

In this case, the first comparator compares whether the rising edge of the first TDC end signal TDC_stp_1 takes precedence over the rising edge of the first TDC start signal TDC_strt_1. Since the rising edge of the first TDC end signal TDC_stp_1 does not take precedence over the rising edge of the first TDC start signal TDC_strt_1, the first comparator outputs '1' (ie, Q1 = 1).

Thereafter, in the same manner, the first TDC start signal TDC_strt_1 and the first TDC end signal TDC_stp_1 are delayed by 60p and 50p, respectively. Accordingly, the second TDC start signal TDC_strt_2 and the second TDC end signal TDC_stp_2 are delayed by 120p and 100p, respectively, than the TDC start signal TDC_strt and the TDC end signal TDC_stp. That is, the rising edges of the second TDC start signal TDC_strt_2 and the second TDC end signal TDC_stp_2 are located at the sixth and seventh times t6 and t7, respectively. Since the rising edge of the second TDC end signal TDC_stp_2 does not take precedence over the rising edge of the second TDC start signal TDC_strt_2, the second comparator outputs '1' (ie, Q2 = 1).

Thereafter, in the same manner, the third TDC start signal TDC_strt_3 and the third TDC end signal TDC_stp_3 are delayed by 180p and 150p relative to the TDC start signal TDC_strt and the TDC end signal TDC_stp, respectively. In this case, the rising edge of the third TDC end signal TDC_stp_3 takes precedence over the rising edge of the third TDC start signal TDC_strt_3. Thus, the second comparator outputs '0' (ie, Q3 = 0).

Meanwhile, referring to FIG. 12, the encoder 282 receives the comparator output values Q1 to Qn from the delay comparison block 281. The encoder 282 will output the fine delay time Δt_fn by encoding the received comparator output values. For example, when 'Q3 = 0', the fine delay time DELTA t_fn may have a value of approximately 20-30p.

Meanwhile, as described with reference to FIG. 9, the calculator 290 subtracts the fine delay time Δt_fn measured by the TDC 280 from the coarse delay time Δt_crs measured by the counter 270, thereby reducing the delay time ( Δt) will be measured. The operator 290 will calculate the correct distance d (see FIG. 1) using the measured delay time Δt.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope and technical spirit of the present invention. For example, the structure and operation of the TDC 280 according to an embodiment of the present invention can be used in various applications. For example, TDCs having various structures, such as a digital delay line TDC scheme, a vernier delay line TDC, a time shrinking TDC, a resistor interpolation TDC, a time-amplifier TDC, and the like may be applied as an embodiment of the present invention.

On the other hand, the distance measuring system according to an embodiment of the present invention can be applied to various fields. For example, the distance measuring system according to an embodiment of the present invention may be applied to a chest compression depth measurement system for cardiopulmonary resuscitation.

According to the CPR recommendations of the International Liasion Committee on Resuscitation, chest compressions should be maintained at a depth of 4-5 cm during chest compressions. In actual CPR, however, the depth of chest compressions presented in the recommendations is not reported.

When the distance measuring system according to the embodiment of the present invention is applied to measure the depth of the chest compression, it is possible to precisely measure whether the actual chest compression depth is met the criteria of the recommendation. 14 to 17, application examples of the distance measuring system according to an embodiment of the present invention applied to a chest compression depth measuring system for CPR will be described in more detail.

14 and 15 illustrate an application example in which the transmitting device 100 and the receiving device 200 of the radar type distance measuring system 10 of FIG. 1 are applied to the chest compression depth measuring system 1000 for cardiopulmonary resuscitation.

Referring to FIG. 14, the chest compression depth measurement system 1000 for cardiopulmonary resuscitation includes a transmitting device 100, a receiving device 200, a reflector plate 1200, and a bed 1300. The transmitter 100 has the same configuration as the transmitter 100 of FIG. 1, and the receiver 200 may have the same configuration as the receiver 200 of FIG. 2.

The transmitting device 100 and the receiving device 200 may be integrally formed in the pad 1100. The pad 1100 is formed in a thin plate shape so as to be placed on the chest part of the human body. In addition to the transmitting device 100 and the receiving device 200, the pad 100 may further include a display device for displaying a depth of chest compression and a key input unit for inputting a user's command.

The transmitting device 100 transmits a radio signal to the human body. The reflector plate 1200 is located on the back of the human body and reflects the radio signal transmitted from the transmitter 100. The receiving device 200 receives the wireless signal reflected by the reflector plate 1200 and measures a delay time between the wireless signal transmitted by the transmitting device 100 and the wireless signal received by the receiving device 200. Thus, when actually performing CPR as shown in FIG. 15, the depth of chest compressions can be measured precisely. Since the configuration and operation principle of the transmitting apparatus 100 and the receiving apparatus 200 are the same as those described with reference to FIGS. 1 to 13, detailed description thereof will be omitted.

16 and 17 illustrate an application example in which the transmitting device 300 and the receiving device 400 of the transceiver type distance measuring system 20 of FIG. 2 are applied to the chest compression depth measuring system 2000 for cardiopulmonary resuscitation. Since the CPR chest compression depth measurement system 2000 of FIGS. 16 and 17 is similar to the CPR chest compression system 2000 of FIGS. 14 and 15, differences will be mainly described below.

Referring to FIG. 16, a chest compression depth measurement system 2000 for cardiopulmonary resuscitation includes a transmitting device 300, a receiving device 400, and a bed 2300.

The transmitting device 300 and the receiving device 400 may be formed of pads 2100 and 2200 having a thin plate-shaped structure, respectively. The transmitting device 300 may have the same configuration as the transmitting device 300 of FIG. 2, and the receiving device 400 may have the same configuration as the receiving device 400 of FIG. 2. In addition to the receiving device 400, the pad 2200 may further include a display device for displaying a depth of chest compression and a key input unit for inputting a user's command. The pad 2200 is placed on the chest of the human body, and the pad 2100 is placed on the back of the human body.

The transmitter 300 transmits a radio signal to a human body, and the receiver 400 receives a radio signal. The receiving device 400 measures the depth of chest compressions by measuring the delay time between the transmitted radio signal and the received radio signal. Therefore, when actually performing CPR as shown in FIG. 17, the depth of chest compressions can be measured precisely.

On the other hand, the distance measuring system according to an embodiment of the present invention can be applied not only to the case of performing the actual CPR, but also to the case of training CPR. For example, the distance measuring system according to an embodiment of the present invention may be mounted on a manikin for CPR training. This will be described in more detail with reference to FIGS. 18 to 20 below.

FIG. 18 is a perspective view illustrating a CPR training mannequin 3000 equipped with a distance measuring system according to an exemplary embodiment of the present disclosure, and FIG. 19 is a cross-sectional view illustrating an embodiment of an internal configuration of the mannequin of FIG. 18.

18 and 19, the CPR training mannequin 3000 includes a transmitting device 100, a receiving device 200, a reflecting plate 3200, an upper plate 3300, a lower plate 3400, and a compression spring 3500. ). The transmitting device 100 corresponds to the transmitting device 100 of FIG. 1, and the receiving device 200 corresponds to the receiving device 200 of FIG. 1. The transmitter 100 and the receiver 200 may be integrally formed in the pad 3100.

The upper plate 3300 represents the shape of the human chest, and the lower plate 3400 represents the shape of the back of the human body. The compression spring 3500 has an elastic property corresponding to the external force of the upper plate 3300 during chest compression. During chest compression, the wireless signal transmitted from the transmitting device 100 is reflected by the reflector 3200, and the reflected wireless signal is received by the receiving device 200. The receiving device 200 measures the delay time between the transmitted radio signal and the received radio signal, and measures the depth of chest compressions. Since the configuration and operation principle of the transmitting apparatus 100 and the receiving apparatus 200 are the same as those described with reference to FIGS. 1 to 13, detailed description thereof will be omitted.

20 is a cross-sectional view showing another embodiment of a manikin for CPR procedure equipped with a distance measuring system according to an embodiment of the present invention. Since the internal configuration of the mannequin 4000 of FIG. 20 is similar to the internal configuration of the mannequin 3000 of FIG. 19, the differences will be mainly described below.

Referring to FIG. 20, the CPR training mannequin 4000 includes an upper plate 4300 and a lower plate 4400, and the upper plate 4300 and the lower plate 4400 represent shapes of a human chest and the back, respectively. The transmitting device 300 and the receiving device 400 may be formed of pads 4100 and 4200, respectively, and are positioned below the upper plate 4300 and the upper plate 4400. The transmitting device 300 and the receiving device 400 correspond to the transmitting device 300 and the receiving device 400 of FIG. 2, respectively, and measure the depth of chest compression using a transceiver method during chest compression. do. This is similar to the chest compression depth measurement of FIGS. 16 and 17, and thus detailed description is omitted.

As described above, the distance measuring system according to an embodiment of the present invention may be applied to a distance measuring system for CPR or a mannequin for CPR training. However, this is exemplary and the application example of the present invention is not limited thereto. For example, the distance measuring system according to an embodiment of the present invention may be applied to a location recognition system. For example, a distance measuring system according to an embodiment of the present invention may be applied to a system for recognizing a location in a target space by measuring a distance between a target and at least three nodes.

Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be determined by the claims equivalent to the claims of the present invention as well as the claims of the following.

d: distance between the distance measuring system and the target
d ': distance between transmitter and receiver
TCLK: Transmit Clock Signal
TCLK_s: Signal synchronized with transmit clock signal
DIP: Digital Impulse Signal
DDIP: delay digital impulse signal
AIP: Analog Impulse Signal
DAIP: delayed analog impulse signal
D_TCLK: Transmission clock signal delayed by inverter
RCLK: Receive Clock Signal
LNA: Low Noise Amplified Signal
PRA: preamplified signal
EVD: Outline Detection Signal
CNT_en: counter enable signal
TDC_strt: TDC Start Signal
TDC_stp: TDC end signal
Δt: delay time
Δt_crs: coarse delay time
Δt_fn: fine delay time
CLK: clock signal
TDC_strt_1 to TDC_strt_n: first to nth TDC start signals
TDC_stp_1 to TDC_stp_n: first to nth TDC end signals

Claims (22)

A demodulator configured to receive an impulse signal and generate a demodulated signal; And,
And a distance measuring unit measuring a time interval between the synchronization signal synchronized with the demodulation signal at the time of transmission of the impulse signal using a TDC. The method of claim 1,
The synchronization signal synchronized with the transmission time of the impulse signal is a first clock signal,
The demodulation unit demodulates the demodulated signal by receiving the impulse signal is a second clock signal.
And the distance measuring unit measures a time interval between the first clock signal and the second clock signal using the TDC. The method of claim 2,
The distance measuring unit:
A coarse time measuring unit configured to measure a coarse time interval between a rising edge of the first clock signal and a rising edge of a third signal that is activated later than a reception time of the impulse signal; And,
And a fine time measurement unit measuring a fine time interval between the rising edge of the second clock signal and the rising edge of the third signal using the TDC. The method of claim 3, wherein
The fine time measuring unit:
A first delay line for delaying the second clock signal at a first time interval;
A second delay line for delaying the third signal at a second time interval shorter than the first time interval; And
And a comparator for comparing the rising edges of the second and third clock signals delayed through the respective delay lines. The method of claim 3, wherein
The coarse time measuring unit measures a time interval between the rising edge of the first clock signal and the rising edge of the third signal that is activated later than the reception time of the impulse signal, from the first clock signal and the second clock signal. An ultra-wideband distance measuring device including a counter for measuring by counting using a clock signal having a high frequency. The method of claim 5, wherein
And a synchronizer for controlling the counter and the TDC in response to the first clock signal and the second clock signal. The method according to claim 6,
And the synchronizer comprises at least one latch and at least one flip-flop. A demodulator for receiving an impulse signal and demodulating the received clock signal; And,
And a distance measuring unit measuring a delay interval between the transmission clock signal and the reception clock signal synchronized at the time of transmission of the impulse signal using a TDC method. The method of claim 8,
The distance measuring unit:
A synchronizer which receives the transmit clock signal and the receive clock signal and outputs a counter activation signal, a TDC start signal for controlling the TDC, and a TDC stop signal;
A counter for measuring a coarse time between a rising edge of the transmit clock signal and a rising edge of the TDC stop signal in response to the counter activation signal; And,
And a TDC for delaying the TDC start signal and the TDC end signal at different time intervals to measure a fine time between the rising edge of the TDC start signal and the rising edge between the TDC end signal. The method of claim 9,
The counter is counted using a clock signal higher than a frequency of the transmit clock signal and the receive clock signal to measure a coarse time between a rising edge of the transmit clock signal and a rising edge of the TDC stop signal. . The method of claim 9,
And the synchronizer is implemented by at least one latch and at least one flip-flop. The method of claim 9,
And an operator for measuring a delay time between the transmit clock signal and the receive clock signal by subtracting the fine time from the coarse time. The method of claim 9,
The TDC is:
A first delay line for delaying the TDC start signal at a first time interval;
A second delay line for delaying the TDC end signal at a second time interval shorter than the first time interval; And
And a comparator for comparing which of the rising edges of the TDC start signal and the TDC end signal, which are delayed through the respective delay lines, is prioritized. The method of claim 13,
The TDC further comprises an encoder for encoding the output value of the comparator. The method of claim 9,
The rising edge of the counter activation signal coincides with the rising edge of the transmit clock signal, the falling edge of the counter activation signal coincides with the rising edge of the TDC end signal, and the rising edge of the received clock signal is the TDC start signal. Ultra-wideband distance measuring device matching the rising edge of the. The method of claim 9,
And a rising edge of the TDC start signal coincides with a rising edge of the received clock signal and a rising edge of the TDC end signal coincides with a falling edge of the counter activation signal. An upper plate representing the chest shape of the human body;
A lower plate representing the back shape of the human body; And
Cardiopulmonary resuscitation training manikin comprising an ultra-wideband device located between the upper and lower plates and measuring the time interval between the transmission and reception of the impulse signal in a TDC method. The method of claim 17,
The ultra wideband device is:
A transmitter for transmitting the impulse signal and adjacent the lower plate; And,
And a receiver configured to receive an impulse signal transmitted by the transmitter and to be separated from the transmitter adjacent to the top plate. The method of claim 18,
CPR training mannequin further comprises a compression spring positioned between the transmitter and the receiver. The method of claim 17,
The ultra-wideband device is included in the same chip and includes a transmitter and receiver adjacent to the top plate CPR training mannequin. 21. The method of claim 20,
A reflector reflecting an impulse signal transmitted from the transmitter and adjacent to the lower plate;
CPR training mannequin further comprises a compression spring located between the reflector and the ultra-wideband device. delete

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