KR101371956B1 - Direct Copper Bonded board module - Google Patents

Direct Copper Bonded board module Download PDF

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Publication number
KR101371956B1
KR101371956B1 KR1020070060988A KR20070060988A KR101371956B1 KR 101371956 B1 KR101371956 B1 KR 101371956B1 KR 1020070060988 A KR1020070060988 A KR 1020070060988A KR 20070060988 A KR20070060988 A KR 20070060988A KR 101371956 B1 KR101371956 B1 KR 101371956B1
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dcb
substrate module
insulating layer
copper
pin
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KR1020070060988A
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Korean (ko)
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KR20080112496A (en
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전성호
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엘지이노텍 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

DCB 기판 모듈이 제공된다. 절연층과, 절연층의 양쪽면에 형성된 구리층을 포함하는 DCB(Direct Copper Bonded), 다수의 핀과, 상기 DCB의 배면과 밀폐된 구조로 결합되도록 형성된 하우징을 포함하는 핀블록을 포함한다. 본 발명에 의하면 DCB 기판 모듈에서 밀폐구조를 구현함으로써, 패키징 액 도포시에 패키징 액이 누출되는 것을 방지하고, 단차로 인한 부품파괴현상을 방지할 수 있는 효과가 있다. DCB substrate module is provided. It includes a pin block including an insulating layer, a direct copper bonded (DCB) including a copper layer formed on both sides of the insulating layer, a plurality of fins, and a housing formed to be coupled to the rear surface of the DCB in a sealed structure. According to the present invention, by implementing a sealed structure in the DCB substrate module, there is an effect that can prevent the leakage of the packaging liquid when the packaging liquid is applied, and prevent the destruction of parts due to the step.

DCB, 절연층, 하우징, 핀블록, 핀, 밀폐, 패키징 액, Copper. DCB, Insulation Layer, Housing, Pinblock, Pin, Sealed, Packaging Liquid, Copper.

Description

DCB 기판 모듈 {Direct Copper Bonded board module}DCC Substrate Module {Direct Copper Bonded board module}

도 1은 종래 DCB 기판 모듈의 전면을 보여주는 도면이다.1 is a view showing a front surface of a conventional DCB substrate module.

도 2는 종래 DCB 기판 모듈의 단면도이다.2 is a cross-sectional view of a conventional DCB substrate module.

도 3은 종래 DCB 기판 모듈 단면도를 확대한 도면이다.3 is an enlarged cross-sectional view of a conventional DCB substrate module.

도 4는 본 발명의 일 실시예에 따른 DCB 기판 모듈의 핀블록 배면을 보여주는 도면이다.4 is a view showing the rear of the pin block of the DCB substrate module according to an embodiment of the present invention.

도 5는 본 발명의 일 실시예에 따른 DCB 기판 모듈의 단면도이다.5 is a cross-sectional view of a DCB substrate module according to an embodiment of the present invention.

도 6은 본 발명의 일 실시예에 따른 DCB 기판 모듈 단면도를 확대한 도면이다.6 is an enlarged cross-sectional view of a DCB substrate module according to an embodiment of the present invention.

*도면의 주요 부분에 대한 부호의 설명*Description of the Related Art [0002]

110 절연층 120a, 120b 구리층110 insulation layer 120a, 120b copper layer

210 핀 220 하우징210 pin 220 housing

200 핀블록200 Pin Block

본 발명은 DCB 기판 모듈에 관한 것이다. The present invention relates to a DCB substrate module.

도 1은 종래 DCB 기판 모듈의 전면을 보여주는 도면이다. 1 is a view showing a front surface of a conventional DCB substrate module.

도 1에서 보는 바와 같이, 종래 DCB 기판 모듈은 DCB(Direct Copper Bonded)(10)와 핀블록(Pin block)(20)으로 이루어진다. As shown in FIG. 1, the conventional DCB substrate module includes a direct copper bonded (DCB) 10 and a pin block 20.

DCB(10)는 중간에 절연층이 있고, 절연층의 양쪽에 구리층이 형성되어 있다. 절연층은 세라믹 재질로 구성되고, 예를 들어 Al2O3 96%의 세라믹 소재가 사용될 수 있다. 구리층은 보통 300μm의 두께로 되어 있다. The DCB 10 has an insulating layer in the middle, and copper layers are formed on both sides of the insulating layer. The insulating layer is made of a ceramic material, for example, a ceramic material of Al 2 O 3 96% may be used. The copper layer is usually 300 μm thick.

핀블록(20)은 핀과 하우징으로 구성되어 있다. 예를 들어, 하우징은 GF(Glass Fiber) 40%와 미네랄 20%를 포함하는 재질로 구성되고, 핀은 구리재질로 구성된다. The pin block 20 is composed of a pin and a housing. For example, the housing is made of a material containing 40% GF (Glass Fiber) and 20% mineral, the pin is made of copper material.

도 2는 종래 DCB 기판 모듈의 A-A' 방향의 단면도이다. 도 3은 종래 DCB 기판 모듈 단면도를 확대한 도면이다.2 is a cross-sectional view taken along the line A-A 'of the conventional DCB substrate module. 3 is an enlarged cross-sectional view of a conventional DCB substrate module.

도 2 및 도 3에서 보는 바와 같이, 종래에는 핀(21)의 일부분이 DCB(20)의 구리층(13a)과 접촉되는 구조인데, 이때 절연층(11)과 구리층(13a) 사이에 단차가 생기고, 이에 따라 빈공간이 발생하게 된다. 따라서, 종래 DCB 기판 모듈에서는 패키징 액의 도포시에 패키징 액이 절연층(11)과 구리층(13a)사이의 단차로 인한 빈공간으로 누출되는 문제점이 있다. 또한 빈공간으로 인해 핀이 잘 휘어지고, 단차로 인한 파괴 위험성이 존재하는 문제점도 있다. As shown in FIGS. 2 and 3, conventionally, a portion of the fin 21 is in contact with the copper layer 13a of the DCB 20, wherein a step between the insulating layer 11 and the copper layer 13a is used. Is generated, thereby creating an empty space. Therefore, in the conventional DCB substrate module, the packaging liquid leaks into the empty space due to the step between the insulating layer 11 and the copper layer 13a when the packaging liquid is applied. In addition, the pin is bent well due to the empty space, there is a problem that there is a risk of destruction due to the step.

본 발명은 DCB 기판 모듈에서 밀폐구조를 구현할 수 있다. The present invention can implement a sealed structure in the DCB substrate module.

본 발명은 절연층과, 절연층의 양쪽면에 형성된 구리층을 포함하는 DCB(Direct Copper Bonded), 다수의 핀과, 상기 DCB의 배면과 밀폐된 구조로 결합되도록 형성된 하우징을 포함하는 핀블록을 포함한다. The present invention provides a pin block including an insulating layer, a direct copper bonded (DCB) including a copper layer formed on both sides of the insulating layer, a plurality of fins, and a housing formed to be coupled to the rear surface of the DCB in a sealed structure. Include.

이하, 첨부된 도면을 참조해서 본 발명의 실시예를 상세히 설명하면 다음과 같다. 우선 각 도면의 구성 요소들에 참조 부호를 부가함에 있어서, 동일한 구성 요소들에 한해서는 비록 다른 도면상에 표시되더라도 가능한 한 동일한 부호를 가지도록 하고 있음에 유의해야 한다. 그리고, 본 발명을 설명함에 있어서, 관련된 공지 기능 혹은 구성에 대한 구체적인 설명이 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우 그 상세한 설명을 생략한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used for the same reference numerals even though they are shown in different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

도 4는 본 발명의 일 실시예에 따른 DCB 기판 모듈의 핀블록 배면을 보여주는 도면이다. DCB 기판 모듈은 DCB(Direct Copper Bonded)(미도시)와 핀블록(200)으로 구성된다. DCB 기판 모듈은 핀블록(200)이 DCB의 후면에 결합되는 구조이다. 4 is a view showing the rear of the pin block of the DCB substrate module according to an embodiment of the present invention. The DCB substrate module is composed of DCB (Direct Copper Bonded) (not shown) and the pin block 200. The DCB substrate module has a structure in which the pin block 200 is coupled to the rear surface of the DCB.

도 5는 본 발명의 일 실시예에 따른 DCB 기판 모듈의 단면도이다. 도 5의 단면도는 도 4에서 A-A' 방향으로 절단한 단면도이다. 5 is a cross-sectional view of a DCB substrate module according to an embodiment of the present invention. 5 is a cross-sectional view taken along the line AA ′ of FIG. 4.

DCB는 절연층(110)과, 절연층(110)의 양쪽면에 형성된 구리층(120a, 120b)을 포함하여 이루어진다. The DCB includes an insulating layer 110 and copper layers 120a and 120b formed on both surfaces of the insulating layer 110.

핀블록(200)은 다수의 핀(210)과, DCB의 절연층(110)과 핀(210) 사이의 공간이 밀폐되도록 형성되어 있는 하우징(220)을 포함하여 이루어진다. The pin block 200 includes a plurality of pins 210 and a housing 220 formed to seal a space between the insulating layer 110 and the pins 210 of the DCB.

도 6은 본 발명의 일 실시예에 따른 DCB 기판 모듈 단면도를 확대한 도면이다.6 is an enlarged cross-sectional view of a DCB substrate module according to an embodiment of the present invention.

도 6에서 보는 바와 같이, 핀(210)은 L자 형태이며 일부분이 DCB의 배면에 형성된 구리층(120a)에 접해 있다.As shown in FIG. 6, the fin 210 is L-shaped and a portion of the fin 210 is in contact with the copper layer 120a formed on the rear surface of the DCB.

도 6을 종래 DCB 기판 모듈이 도시된 도 3과 비교하면, 종래 DCB 기판 모듈에서는 단차로 인한 빈공간이 존재하는 반면에 본 발명의 DCB 기판 모듈에서는 빈공간이 없이 밀폐된 구조로 핀블록(200)의 하우징이 형성되어 있음을 확인할 수 있다. Comparing FIG. 6 with FIG. 3, in which a conventional DCB substrate module is shown, in the conventional DCB substrate module, a space exists due to a step, whereas in the DCB substrate module of the present invention, the pin block 200 is enclosed without an empty space. It can be seen that the housing of the) is formed.

도 4의 실시예에서 구리층(120a)의 두께가 0.3mm 라고 하면, 구리층(120a)에 접촉하는 핀블록(200)의 깊이는 1.3mm이고, 절연층(110)에 접촉하는 핀블록(200)의 깊이는 1.6mm이다. In the embodiment of FIG. 4, when the thickness of the copper layer 120a is 0.3 mm, the depth of the pin block 200 contacting the copper layer 120a is 1.3 mm, and the pin block contacting the insulating layer 110 ( 200) is 1.6 mm deep.

이상 본 발명을 몇 가지 바람직한 실시예를 사용하여 설명하였으나, 이들 실시예는 예시적인 것이며 한정적인 것이 아니다. 본 발명이 속하는 기술분야에서 통상의 지식을 지닌 자라면 본 발명의 사상과 첨부된 특허청구범위에 제시된 권리범위에서 벗어나지 않으면서 다양한 변화와 수정을 가할 수 있음을 이해할 것이다.While the present invention has been described with reference to several preferred embodiments, these embodiments are illustrative and not restrictive. It will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the spirit of the invention and the scope of the appended claims.

이상에서 설명한 바와 같이, 본 발명에 의하면 DCB 기판 모듈에서 밀폐구조를 구현함으로써, 패키징 액 도포시에 패키징 액이 누출되는 것을 방지하고, 단차로 인한 부품파괴현상을 방지할 수 있는 효과가 있다. As described above, according to the present invention, by implementing a sealed structure in the DCB substrate module, it is possible to prevent the leakage of the packaging liquid when the packaging liquid is applied, and to prevent the component breakdown caused by the step.

Claims (3)

삭제delete 절연층과, 절연층의 양쪽면에 형성된 구리층을 포함하는 DCB(Direct Copper Bonded);Direct Copper Bonded (DCB) including an insulating layer and copper layers formed on both sides of the insulating layer; 다수의 핀과, 상기 DCB의 절연층과 핀 사이의 공간이 밀폐되도록 형성되어 있는 하우징을 포함하는 핀블록A pin block comprising a plurality of pins, the housing is formed so that the space between the insulating layer and the pin of the DCB is sealed 을 포함하며,/ RTI > 상기 핀은 L자 형태이며, 일부분이 상기 DCB의 배면에 형성된 구리층에 접해 있는 DCB 기판 모듈.The pin has an L-shape, a part of the DCB substrate module is in contact with the copper layer formed on the back of the DCB. 제2항에 있어서,3. The method of claim 2, 상기 구리층에 접촉하는 핀블록의 깊이는 1.3mm이고, 절연층에 접촉하는 핀블록의 깊이는 1.6mm인 DCB 기판 모듈.The depth of the pin block in contact with the copper layer is 1.3mm, the depth of the pin block in contact with the insulating layer is 1.6mm DCB substrate module.
KR1020070060988A 2007-06-21 2007-06-21 Direct Copper Bonded board module KR101371956B1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183329A (en) * 1993-12-22 1995-07-21 Toshiba Corp Device package and manufacture thereof
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
KR20010071079A (en) * 1998-07-31 2001-07-28 추후보정 Electrically isolated power semiconductor package

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183329A (en) * 1993-12-22 1995-07-21 Toshiba Corp Device package and manufacture thereof
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
KR20010071079A (en) * 1998-07-31 2001-07-28 추후보정 Electrically isolated power semiconductor package

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