KR101365800B1 - Methods of manufacturing indium zinc oxide semiconductor thin film transistor and indium zinc oxide semiconductor thin film transistor manufactured by the methods - Google Patents

Methods of manufacturing indium zinc oxide semiconductor thin film transistor and indium zinc oxide semiconductor thin film transistor manufactured by the methods Download PDF

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KR101365800B1
KR101365800B1 KR1020130031303A KR20130031303A KR101365800B1 KR 101365800 B1 KR101365800 B1 KR 101365800B1 KR 1020130031303 A KR1020130031303 A KR 1020130031303A KR 20130031303 A KR20130031303 A KR 20130031303A KR 101365800 B1 KR101365800 B1 KR 101365800B1
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precursor
zinc
thin film
film transistor
active layer
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KR1020130031303A
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Korean (ko)
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이문석
이동희
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부산대학교 산학협력단
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02565Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02628Liquid deposition using solutions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A method of manufacturing an indium zinc oxide semiconductor thin film transistor is disclosed. The indium zinc oxide semiconductor thin film transistor is formed by forming a gate electrode and a gate insulating film on the substrate, and then applying a precursor solution in which an indium precursor, a chlorine-free first zinc precursor and a chlorine-containing second zinc precursor are dissolved over the gate insulating film, thereby forming a semiconductor active layer. By forming a source electrode and a drain electrode on the semiconductor active layer.

Description

Method for manufacturing indium zinc oxide semiconductor thin film transistor and indium zinc oxide semiconductor thin film transistor manufactured by the same

The present invention relates to a method for manufacturing an indium zinc oxide semiconductor thin film transistor and an oxide semiconductor thin film transistor manufactured by the same, and to produce an indium zinc oxide semiconductor thin film transistor having an indium zinc oxide semiconductor active layer formed using a solution process. have.

Since oxide semiconductors can be applied to manufacturing high-performance TFTs for displays, many studies have been made. Since the oxide semiconductor can be manufactured by applying the existing silicon-based process unit as well, the oxide semiconductor can be manufactured at a low process cost and has high carrier mobility, uniformity and high transparency. Oxide semiconductors have a wide bandgap of about 3.1 eV or more and have high uniformity, which makes them widely applicable to large area, flexible and transparent displays.

Oxide semiconductors, however, use heavy metals with low reserves and require large vacuum equipment for deposition, which may incur cost burdens in the future. In order to solve this problem, research on the technology of the coating process and the printing process using a solution process is a recent trend. Semiconductor solution materials used in the solution process are classified into organic based and inorganic based materials. Initially, transistors using organic based materials have been studied, but the present conditions have not been completely solved. Recently, in various fields, inorganic materials have been prepared by a solution process.

However, it is true that the thin film transistor manufactured by the solution process of the inorganic material to date does not show the electrical characteristics as the device manufactured by the vacuum process, and the reliability of the voltage stress is also a problem to be solved.

An object of the present invention is to provide a method for manufacturing an indium zinc oxide semiconductor thin film transistor which can improve the reliability of the thin film transistor by forming a semiconductor active layer using a precursor solution in which chlorine-containing zinc precursor is dissolved.

Another object of the present invention is to provide an indium zinc oxide semiconductor thin film transistor prepared by the above method.

Method of manufacturing an indium zinc oxide semiconductor thin film transistor according to an embodiment of the present invention comprises the steps of forming a gate electrode on the substrate; Forming a gate insulating film covering the gate electrode on the substrate; Forming a semiconductor active layer by applying a precursor solution in which an indium precursor, a chlorine-free first zinc precursor, and a chlorine-containing second zinc precursor are dissolved over the gate insulating film; And forming a source electrode and a drain electrode on the semiconductor active layer.

In an embodiment, the forming of the semiconductor active layer may include dissolving the indium precursor, the chlorine-free first zinc precursor and the chlorine-containing second zinc precursor in a solvent to prepare the precursor solution; Applying the precursor solution on the gate insulating film; And heat-treating the applied precursor solution. In this case, the first zinc precursor is zinc acetate, zinc acetate dihydrate, zinc acetylacetonate hydrate, zinc carbonate, and zinc sulfate. At least one selected from the group consisting of, and the second zinc precursor may include zinc chloride.

In an embodiment, the first zinc precursor and the second zinc precursor may be mixed in a molar ratio of 1: 0.8 to 1: 1.2 in the precursor solution.

In one embodiment, the precursor solution may be applied on the gate insulating film by spin coating or printing.

In one embodiment, the heat treatment of the coated precursor solution may include heating the substrate to which the precursor solution is applied while heating the substrate to a maximum heat treatment temperature of 400 ° C. to 500 ° C. at a constant rate; Heating the substrate to which the precursor solution is applied at the highest heat treatment temperature for 0.5 to 2 hours; And cooling at a constant rate from the highest heat treatment temperature to room temperature.

An indium zinc oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention includes a gate electrode to which a gate voltage is applied, a semiconductor active layer forming a channel according to the gate voltage, a gate insulating layer positioned between the gate electrode and the semiconductor active layer, and And a source electrode and a drain electrode electrically connected to the semiconductor active layer and spaced apart from each other, wherein the semiconductor active layer is formed of indium zinc oxide doped with chlorine at a ratio of 1.1 at.% To 1.4 at.%.

According to the present invention, by forming a semiconductor active layer of a thin film transistor using a precursor solution containing a chlorine-free zinc precursor and a chlorine-containing zinc precursor, trapping of oxygen vacancies in the semiconductor active layer and trapping at the interface between the semiconductor active layer and the gate insulating layer is prevented. It is possible to suppress and, as a result, to significantly improve the reliability of the thin film transistor, such as reducing the threshold voltage shift.

1 is a flowchart illustrating a method of manufacturing an indium zinc oxide thin film transistor according to an embodiment of the present invention.
2 is a cross-sectional view illustrating an indium zinc oxide thin film transistor according to an exemplary embodiment of the present invention.
3A, 3B, and 3C are graphs showing results of thermogravimetric analysis (TGA) for determining mass loss according to temperatures of first to third precursor solutions.
4 is a graph showing the results of XRD (X-ray diffraction) analysis to determine the crystal structure of the semiconductor active layer of Example 1, Comparative Example 1 and Comparative Example 2.
5A to 5C are graphs showing IDS-VDS curves of the thin film transistors of Example 1, Comparative Example 1, and Comparative Example 2. FIG.
6A and 6B are graphs showing IDS-VGS curves of the thin film transistors of Example 1 and Comparative Example 2. FIG.
7 is a graph showing the stress analysis results for the thin film transistors of Example 1, Comparative Example 1 and Comparative Example 2.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and similarities. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In the present application, the term "comprises" or "having" is intended to designate the presence of stated features, elements, etc., and not one or more other features, It does not mean that there is none.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

<Indium zinc oxide semiconductor thin film transistor manufacturing method>

1 is a flowchart illustrating a method of manufacturing an indium zinc oxide thin film transistor according to an embodiment of the present invention.

Referring to FIG. 1, a method of manufacturing an indium zinc oxide (IZO) semiconductor thin film transistor according to an embodiment of the present invention includes forming a gate electrode on a substrate (S110) and covering the gate electrode on the substrate. Forming a gate insulating film (S120), applying a precursor solution in which an indium precursor, a chlorine-free first zinc precursor and a chlorine-containing second zinc precursor are dissolved on the gate insulating film to form a semiconductor active layer (S130), and a semiconductor Forming a source electrode and a drain electrode on the active layer (S140).

As the substrate, a conventional semiconductor substrate such as a silicon substrate, a flexible plastic substrate, or the like can be used without limitation.

The gate electrode is configured to apply a voltage for turning on / off the thin film transistor, and may be formed of a conductive material such as metal or metal oxide. For example, the gate electrode 120 may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, or a conductive oxide such as IZO (InZnO), AZO (AlZnO), or the like. The method of forming the gate electrode can be applied without any known technique. For example, the gate electrode can be formed by depositing a metal or conductive oxide onto a substrate and then patterning it.

The gate insulating layer may be formed on the base substrate to cover the gate electrode by using an insulating material commonly used in semiconductor devices. For example, the gate insulating film may be formed of silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, or the like. The method of forming the gate insulating film can be applied without any known technique. For example, the gate insulating film may be formed by depositing an insulating material on a substrate on which the gate electrode is formed.

The indium zinc oxide (IZO) semiconductor active layer is a precursor solution in which an indium (In) precursor, a chlorine (Cl) -free first zinc (Zn) precursor and a chlorine-containing second zinc precursor are dissolved on the gate insulating film. Can be formed.

In one embodiment of the present invention, the indium zinc oxide semiconductor active layer (a) dissolving an indium precursor, a chlorine-free first zinc precursor and a chlorine-containing second zinc precursor in a solvent to form a precursor solution (S131), (B) coating the precursor solution on the gate insulating film (S132) and (c) heat treating the coated precursor solution to form an IZO semiconductor active layer (S133).

In forming a precursor solution (S131), an indium (In) precursor, a chlorine (Cl) free first zinc (Zn) precursor, a chlorine-containing second zinc precursor and a stabilizer are dissolved.

Solvents for precursor solutions include methanol, ethanol, isopropyl alcohol, 1-propanol, 2-methoxyethanol and acetonitrile ), Dimethyl sulfoxide, tetrahydrofuran and the like can be used, and these can be used alone or in combination of two or more. Preferably methoxyethanol may be used as the solvent.

Indium precursors include indium acetate, indium acetate hydrate, indium acetylacetonate, indium butoxide, indium hydroxide, indium iodide (indium iodide), indium nitrate, indium nitrate hydrate, indium sulfate, indium sulfate hydrate, indium oxide, etc. These may be used alone or in combination of two or more thereof. Preferably, indium nitrate hydrate may be used as the indium precursor.

Chlorine-free first zinc precursors include zinc acetate, zinc acetate dihydrate, zinc acetylacetonate hydrate, zinc carbonate, zinc sulfate Etc. may be used, and these may be used alone or in combination of two or more thereof. Preferably, zinc acetate dihydrate may be used as the first zinc precursor.

Zinc chloride may be used as the chlorine-containing second zinc precursor.

Monoethanolamine may be used as a stabilizer. Stabilizers can impart viscosity to the precursor solution so that the precursor solution is well applied on the gate insulating film.

In one embodiment of the invention, the indium precursor, the first zinc precursor and the second zinc precursor may be mixed so that the molar ratio of indium and zinc in the precursor solution is about 1: 1. The second zinc precursor may be mixed at a molar concentration of about 0.8 to 1.2 based on the molar concentration of the first zinc precursor. Based on the molar concentration of the first zinc precursor, when the molar concentration of the second zinc precursor is less than 0.8, there may be a problem that a high leakage current (off current) occurs due to the carrier increase and the change of the threshold voltage under voltage stress increases In addition, when the molar concentration of the second zinc precursor exceeds 1.2, there may be a problem that the thin film transistor has a low current flicker ratio due to an increase in the trap of the interface.

In one embodiment of the invention, after adding the indium precursor, the first zinc precursor, the second zinc precursor and the stabilizer to the solvent, using a stirrer at a temperature of about 50 to 70 ℃, preferably at a temperature of about 60 ℃ The precursor material and stabilizer can be dissolved in the solvent by stirring for 1 to 3 hours, preferably about 2 hours. In addition, the solution in which the precursor materials are dissolved may be filtered with a filter of about 0.2 to 0.3 μm to prepare a final precursor solution.

In the step of applying the precursor solution on the substrate (S120), the precursor solution may be applied on the gate insulating film through a solution process, such as a coating process or a printing process.

For example, the precursor solution may be applied on the gate insulating film through a spin coating process, and in this case, the precursor solution may be hot plated at about 50 to 70 ° C. to improve adhesion between the gate insulating film and the precursor solution to be applied. plate and then spin coating process. The spin coating process may be performed such that the precursor solution applied on the gate insulating film is a thin film having a thickness of about 10 to 50 nm.

In the step (S130) of forming the IZO semiconductor active layer by heat treatment of the applied precursor solution, the heat treatment of the applied precursor solution may be performed by gradually heating up to the maximum heat treatment temperature and then slowly cooling to room temperature. For example, the substrate to which the precursor solution is applied is placed on a hot plate, and then gradually heated to a maximum heat treatment temperature of about 400 to 500 ° C., held at the maximum heat treatment temperature for about 0.5 to 2 hours, and then cooled slowly to room temperature. An IZO semiconductor active layer can be formed. For example, the substrate to which the precursor solution is applied on the hot plate is gradually heated at an initial temperature of about 60 ° C. to a maximum heat treatment temperature of about 450 ° C. at a rate of about 10 ° C./min, and maintained at a maximum heat treatment temperature for about 1 hour, followed by room temperature. By gradually cooling the final IZO semiconductor active layer can be formed.

The source electrode and the drain electrode may be formed to be spaced apart from each other and to be in contact with both sides of the semiconductor active layer. The source electrode and the drain electrode may be formed of a conductive material such as metal or metal oxide. For example, the source electrode and the drain electrode may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, or a conductive oxide such as IZO (InZnO), AZO (AlZnO), or the like. The method of forming the source electrode and the drain electrode can be applied without a known technique. For example, the source electrode and the drain electrode may be formed by depositing a metal or a conductive oxide on a substrate on which the semiconductor active layer is formed and then patterning it.

<Indium Zinc Oxide Semiconductor Thin Film Transistor>

2 is a cross-sectional view illustrating an indium zinc oxide thin film transistor according to an exemplary embodiment of the present invention.

2, an indium zinc oxide (IZO) semiconductor thin film transistor 100 according to an exemplary embodiment of the present invention may include a substrate 110, a gate electrode 120, a gate insulating layer 130, and indium zinc oxide. The semiconductor active layer 140, the source electrode 150, and the drain electrode 160 are included.

As the substrate 110, a conventional semiconductor substrate such as a silicon substrate, a flexible plastic substrate, or the like may be used without limitation.

The gate electrode 120 is positioned on the substrate 110 and is formed of a conductive material such as metal or metal oxide. For example, the gate electrode 120 may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, or a conductive oxide such as IZO (InZnO), AZO (AlZnO), or the like.

The gate insulating layer 130 is positioned on the substrate 110 to cover the gate electrode 120. The gate insulating layer 130 may be formed of an insulating material such as silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, or the like.

The indium zinc oxide (IZO) semiconductor active layer 140 is positioned on the gate insulating layer 130, has a thickness of about 10 to 50 nm, and is formed of indium zinc oxide doped with chlorine (Cl). For example, the indium zinc oxide semiconductor active layer 140 may include chlorine in an amount of about 1.1 at.% To 1.4 at.%. If the content of chlorine is less than 1.1 at.%, There may be a problem that does not affect the reliability improvement of the thin film transistor 100, and if the content of chlorine exceeds 1.4 at.%, The indium zinc oxide semiconductor active layer 140 The problem of lowering the carrier mobility of may occur.

Among the oxide semiconductor materials, indium zinc oxide semiconductor has a relatively large amount of electrons and has good carrier mobility due to the orbital overlap of indium orbitals, while the large amount of carriers makes it difficult to control the voltage and external environment. Accordingly, there is a problem in that the threshold voltage for switching is moved, thereby reducing the reliability of the thin film transistor. The reliability problem of the indium zinc oxide semiconductor is mainly caused by an electron trap at the interface between the semiconductor active layer and the gate insulating layer or a defect in the semiconductor active layer. This reliability problem is caused by the oxygen vacancy formed inside the semiconductor active layer. It can be reduced by inhibiting formation.

In the present invention, this problem is solved by doping chlorine to indium zinc oxide through a solution process. Doped chlorine is present in the indium zinc oxide semiconductor active layer 140 in the form of various ionic bonds, such as metal chlorides, and such chlorine is formed in the oxygen vacancy and the semiconductor in the indium zinc oxide semiconductor active layer 140. Trap at the interface between the active layer 140 and the gate insulating film 130 can be suppressed.

The source electrode 150 and the drain electrode 160 are spaced apart from each other to be in contact with both sides of the semiconductor active layer 140, respectively. The source electrode 150 and the drain electrode 160 may be formed of a conductive material such as metal or metal oxide. For example, the source electrode 150 and the drain electrode 160 may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, or a conductive oxide such as IZO (InZnO), AZO (AlZnO), or the like. Can be.

Example 1

Silicon oxide (SiO 2 ) was deposited as a gate insulating film on an arsenic (As) doped silicon wafer which can be used as a gate electrode because the electrical resistance is 0.005? -Cm or less.

Subsequently, the first precursor solution was spin-coated on the gate insulating film to form a semiconductor active layer.

The first precursor solution was 0.05 M of indium nitrate hydrate (In (NO 3 ) 3 xH 2 O), 0.025 M of zinc acetate dihydrate (Zn (CH 3 COO)) in a solvent of methoxy ethanol (2-methoxyethanol). 2 · 2H 2 O), 0.025M zinc chloride (ZnCl 2 ) and stabilizer monoethanolamine were added, followed by stirring at a temperature of 60 ° C. for 2 hours using a stirrer and filtering by a 0.2 μm filter.

Spin coating was performed after the substrate on which the gate insulating film was formed was heated on a hot plate set at 60 ° C. for 10 seconds. The spin coating was performed at 5000 rpm for 30 seconds so that the thickness of the semiconductor active layer was about 15 nm after the heat treatment. The substrate coated with the first precursor solution was placed on a hot plate and then heat treated in air. The heat treatment was performed by heating the substrate coated with the first precursor solution at an initial temperature of 60 ° C. to 450 ° C. at a rate of 10 ° C./min, maintaining the temperature at 450 ° C. for 1 hour, and then gradually lowering the temperature to room temperature. Progressed.

The source and drain electrodes were formed by depositing a conductive IZO on the semiconductor active layer by sputtering and patterning it.

In the finally prepared thin film transistor, the channel width of the semiconductor active layer was 2000 μm and the channel length was 150 μm.

Comparative Example 1

A thin film transistor was manufactured in the same manner and structure as in Example 1, except that the semiconductor active layer was formed using the first precursor solution and the second precursor solution.

The second precursor solution was 0.05 M of indium nitrate hydrate (In (NO 3 ) 3 xH 2 O), 0.05 M of zinc chloride (ZnCl 2 ) and stabilizer monoethanolamine in 2-methoxyethanol as a solvent. Was prepared, and zinc acetate dihydrate (Zn (CH 3 COO) 2 .2H 2 O) was not added.

[Comparative Example 2]

A thin film transistor was manufactured in the same manner and structure as in Example 1, except that the semiconductor active layer was formed using the first precursor solution and the third precursor solution.

The third precursor solution was 0.05 M of indium nitrate hydrate (In (NO 3 ) 3 xH 2 O), 0.05 M of zinc acetate dihydrate (Zn (CH 3 COO)) in 2-methoxyethanol as a solvent. 2 · 2H 2 O) and stabilizer monoethanolamine were added, and zinc chloride (ZnCl 2 ) was not added.

[Experimental Example]: Characteristic evaluation

3A, 3B, and 3C are graphs showing results of thermogravimetric analysis (TGA) for determining mass loss according to temperatures of first to third precursor solutions. TGA analysis was performed after heat treatment at 100 ° C. to prevent mass loss due to rapid evaporation of the first to third precursor solutions at room temperature.

Referring to FIG. 3, the first to third precursor solutions all showed a sharp decrease in mass between 200 ° C. and 270 ° C., and a slight change in mass due to thermal decomposition and desorption of organic residues around 300 ° C. Appeared to be visible.

When the heat treatment temperature is higher than 480 ° C. after 450 ° C., the third precursor solution without adding zinc chloride (ZnCl 2 ) does not show any further mass loss, but the first and second precursors with zinc chloride (ZnCl 2 ) added. The solution was found to continue to lose mass. In general, among zinc (Zn) precursors, chlorine-containing precursors have been reported to have a temperature higher than 600 ° C. to form metal oxides than other precursors. Therefore, in the case of the precursor solution to which zinc chloride (ZnCl 2 ) is added, it is determined that chlorine is not completely removed even at a high heat treatment temperature and is present in the form of metal chloride or various ionic bonds in the IZO semiconductor active layer. As such, chlorine remaining in the form of metal chloride or various ionic bonds may improve the reliability of the oxide semiconductor.

4 is a graph showing the results of XRD (X-ray diffraction) analysis to determine the crystal structure of the semiconductor active layer of Example 1, Comparative Example 1 and Comparative Example 2.

Referring to FIG. 4, the semiconductor active layers of Example 1, Comparative Example 1 and Comparative Example 2 did not show any peak except for the silicon phase of (211) at 33 kHz. Therefore, it can be seen that the semiconductor active layers of Example 1, Comparative Example 1, and Comparative Example 2 all have an amorphous structure.

5A to 5C are graphs showing I DS -V DS curves of the thin film transistors of Example 1, Comparative Example 1, and Comparative Example 2. FIG.

5A to 5C, when V GS is 30 V in the I DS -V DS curve, the maximum current amount of Example 1 is 1.5 × 10 −4 A, and the maximum current amount of Comparative Example 2 is 9.33 × 10 −4. It was found to be A. In addition, in the thin film transistor of Example 1, the maximum current amount converged to a constant value at a relatively low V DS voltage, whereas in the thin film transistor of Comparative Example 2, the maximum current amount did not converge and was continuously increased as the V DS voltage increased. When chlorine (Cl) is doped into the indium zinc oxide semiconductor, the doped chlorine (Cl) ions are formed as a combination of 'Metal-Cl' or 'Metal-O-Cl' in the semiconductor active layer, and the internal trap and oxygen Since the occurrence of vacancies can be suppressed, the maximum current amount is relatively low due to the decrease in the amount of carriers, but it is considered that it can exhibit excellent IDS-VDS characteristics.

In addition, the maximum current amount of Example 1 was 1.5 × 10 -4 A, the maximum current amount of Comparative Example 1 was found to be 18.7 × 10 -4 A. In addition, in the thin film transistor of Example 1, the maximum current amount converged to a constant value at a relatively low V DS voltage, whereas in the thin film transistor of Comparative Example 1, the maximum current amount did not converge and was continuously increased as the V DS voltage increased. In other words, when the indium zinc oxide semiconductor is doped with an excessive amount of chlorine (Cl), it is determined that the carrier amount of the semiconductor active layer is increased, and as a result, the electrical characteristics of the thin film transistor are degraded. Therefore, in order to improve the electrical characteristics and reliability of the thin film transistor, it is required to dope the optimum content of chlorine.

6A and 6B are graphs showing I DS -V GS curves of the thin film transistors of Example 1 and Comparative Example 2. FIG.

6A and 6B, in the case of the thin film transistor of Example 1, the mobility of 1.45 cm 2 / V · s, the subthreshold swing (SS) of 1.83 V / dec, the threshold voltage of 3.8 V, 10 5 The current flashing ratio characteristic is shown above. The thin film transistor of Comparative Example 2 has a mobility of 2.83 cm 2 / V · s, an SS of 2.48 V / dec, a threshold voltage of 0 V, and a current flashing ratio of 10 5 or more.

Although the thin film transistor of Example 1 has a lower mobility than the thin film transistor of Comparative Example 2, the thin film transistor has a lower SS value which is proportional to the maximum trap amount of the semiconductor active layer.

7 is a graph showing the stress analysis results for the thin film transistors of Example 1, Comparative Example 1 and Comparative Example 2. The stress analysis of FIG. 7 was measured in a state in which a gate voltage was applied at 20V at room temperature. Since the thin film transistors of Example 1, Comparative Example 1, and Comparative Example 2 all use silicon oxide (SiO 2 ) as the gate insulating film, the injection phenomenon may be assumed to be the same. Therefore, the difference in the threshold voltage change in the thin film transistors of Example 1, Comparative Example 1 and Comparative Example 2 can be considered to arise from the difference in trap phenomenon at the interface between each of the semiconductor active layer and the gate insulating film.

Referring to FIG. 7, in the thin film transistor of Comparative Example 2, the threshold voltage was shifted by 7 V or more after 2 hours. In the thin film transistor of Comparative Example 1, the threshold voltage was shifted by 6 V or more after 2 hours. On the contrary, after 2 hours, the thin film transistor of Example 1 showed a significant improvement in stability compared to the thin film transistors of Comparative Examples 1 and 2 as the threshold voltage only moved about 1.7V. That is, in the case of the thin film transistor of Example 1, the trap of the semiconductor active layer can be adjusted due to the chlorine remaining after the heat treatment, and as a result, it can be confirmed that the stability of the thin film transistor is significantly improved.

According to the present invention, by forming a semiconductor active layer of a thin film transistor using a precursor solution containing a chlorine-free zinc precursor and a chlorine-containing zinc precursor, trapping of oxygen vacancies in the semiconductor active layer and trapping at the interface between the semiconductor active layer and the gate insulating layer is prevented. It is possible to suppress and, as a result, to significantly improve the reliability of the thin film transistor, such as reducing the threshold voltage shift.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the following claims. It can be understood that it is possible.

Claims (8)

Forming a gate electrode over the substrate;
Forming a gate insulating film covering the gate electrode on the substrate;
Forming a semiconductor active layer by applying a precursor solution in which an indium precursor, a chlorine-free first zinc precursor, and a chlorine-containing second zinc precursor are dissolved on the gate insulating layer; And
A method of manufacturing an indium zinc oxide semiconductor thin film transistor comprising forming a source electrode and a drain electrode on the semiconductor active layer.
The method of claim 1, wherein the forming of the semiconductor active layer comprises:
Preparing the precursor solution by dissolving the indium precursor, the chlorine-free first zinc precursor and the chlorine-containing second zinc precursor in a solvent;
Applying the precursor solution on the gate insulating film; And
Method of manufacturing an indium zinc oxide semiconductor thin film transistor comprising the step of heat-treating the applied precursor solution.
In the second aspect,
The first zinc precursor is a group consisting of zinc acetate, zinc acetate dihydrate, zinc acetylacetonate hydrate, zinc carbonate, and zinc sulfate. One or more selected from,
The second zinc precursor is zinc chloride (zinc chloride) characterized in that the manufacturing method of the indium zinc oxide semiconductor thin film transistor.
The method of claim 2, wherein the first zinc precursor and the second zinc precursor are mixed in a molar ratio of 1: 0.8 to 1: 1.2. The method of claim 2, wherein the precursor solution is coated on the gate insulating layer by spin coating or printing. The method of claim 2, wherein the heat treatment of the applied precursor solution,
Heating the substrate to which the precursor solution is applied while raising the temperature to a maximum heat treatment temperature of 400 ° C. to 500 ° C. at a constant rate;
Heating the substrate to which the precursor solution is applied at the highest heat treatment temperature for 0.5 to 2 hours; And
Method of manufacturing an indium zinc oxide semiconductor thin film transistor comprising the step of cooling at a constant rate from the highest heat treatment temperature to room temperature.
A gate electrode to which a gate voltage is applied, a semiconductor active layer forming a channel according to the gate voltage, a gate insulating layer positioned between the gate electrode and the semiconductor active layer, and a source electrode and a drain electrically connected to the semiconductor active layer and spaced apart from each other In a thin film transistor comprising an electrode,
The semiconductor active layer is an indium zinc oxide semiconductor thin film transistor, characterized in that the chlorine is formed of indium zinc oxide doped at a ratio of 1.1 at.% To 1.4 at.%.
The indium zinc oxide semiconductor thin film transistor according to claim 7, wherein the semiconductor active layer has a thickness of 10 to 50 nm.
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