KR101341774B1 - Liquid Crystal Display and Method For Manufacturing of The Same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same. In particular, the liquid crystal display device includes a first substrate and a second substrate facing each other, a gate line and a data line crossing the first substrate to define a pixel region; A thin film transistor formed at an intersection of the gate line and the data line, a pixel electrode formed in the pixel region, a gate line, a data line, and a black matrix formed on the first substrate corresponding to an upper portion of the thin film transistor, And a liquid crystal layer between the first and second substrates and a color filter layer formed on at least two substrates corresponding to the pixel area.

LCD, black matrix, light leakage prevention, aperture ratio improvement

Description

Liquid Crystal Display and Method for Manufacturing of The Same

1 is an exploded perspective view showing a general liquid crystal display device

2 is a cross-sectional view showing a general liquid crystal display device.

3 is a plan view illustrating a liquid crystal display according to a first embodiment of the present invention.

4 is a cross-sectional view of a liquid crystal display device according to a first exemplary embodiment of the present invention, taken along lines II ′ and II-II ′ of FIG. 3.

5A through 5F are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention.

6 is a plan view showing a liquid crystal display according to a second embodiment of the present invention.

FIG. 7 is a cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention, taken along lines III-III 'and IV-IV' of FIG.

8A through 8F are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a second embodiment of the present invention.

9 is a plan view illustrating a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 10 is a cross-sectional view of a liquid crystal display according to a third exemplary embodiment of the present invention, taken along lines V-V ′ and VI-VI ′ of FIG. 9.

11A to 11I are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a third embodiment of the present invention.

<Name of main part of drawing>

11, 112, 212, 312: gate line

14, 120, 220, 320: data lines

17, 126, 226, 326: pixel electrode

21, 128, 228, 328: black matrix

24, 154, 323a: common electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same, by forming a black matrix on a lower substrate to increase the aperture ratio.

(PDP), Electro Luminescent Display (ELD), Vacuum Fluorescent (VFD), and the like have been developed in recent years in response to the demand for display devices. Display) have been studied, and some of them have already been used as display devices in various devices.

Among them, LCD is currently being used most frequently as a substitute for CRT (Cathode Ray Tube) for mobile image display devices because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the mobile use, various developments have been made for television and computer monitors for receiving and displaying broadcast signals.

1 is an exploded perspective view illustrating a general liquid crystal display device, and FIG. 2 is a cross-sectional view illustrating a general liquid crystal display device.

A general liquid crystal display device may be broadly divided into a liquid crystal panel displaying an image and a driver for applying a driving signal to the liquid crystal panel, and the liquid crystal panel has a predetermined space and is bonded to the substrate 10 and the second substrate 20. And the liquid crystal layer 30 injected between the first and second substrates 10 and 20.

In more detail, a plurality of gate lines 11 are arranged in one direction with a predetermined interval in order to define the pixel region P, and the substrate 10 has a constant interval in a direction perpendicular to the gate line 11. And a plurality of data lines 14 are arranged. In addition, a pixel electrode 17 is formed in each pixel region P defined by the gate line 11 and the data line 14, and a portion where each gate line 11 and the data line 14 cross each other. The thin film transistor T is turned on / off according to the scan signal of the gate line 11 to apply the data signal of the data line 14 to each pixel electrode 17. This is called a thin film transistor array substrate.

In this case, the thin film transistor T may include a gate electrode 11a protruding from the gate line 11, a gate insulating film 12 formed on the entire surface of the substrate including the gate electrode 11a, and a gate insulating film on the gate electrode 11a. The semiconductor layer 13 and the data line 14 formed on the semiconductor layer 13 protruding from the data line 14 and spaced apart at regular intervals are composed of a drain electrode 14b.

The second substrate 20 includes a black matrix layer 21 for blocking light in portions except the pixel region P, R, G, and B color filter layers 22 for expressing color colors, and an image. A common electrode 24 is formed to implement. This is called a color filter array substrate.

In the liquid crystal display as described above, the liquid crystal of the liquid crystal layer 30 formed between the first and second substrates 10 and 20 is aligned by an electric field between the pixel electrode 17 and the common electrode 24, and the liquid crystal layer is aligned. The amount of light passing through the liquid crystal layer 30 may be adjusted according to the degree of alignment of 30 to express the image.

On the other hand, the black matrix layer 21 formed on the second substrate 20 takes into account the bonding margin in order to prevent light leakage due to misalignment when the substrate 10 and the second substrate 20 are bonded to each other. Is formed. Therefore, since the width of the black matrix layer 21 is widened, there is a problem that the aperture ratio decreases.

In addition, the thin film transistor array substrate for a liquid crystal display device according to the related art uses at least five masks in order to form a gate line layer, a semiconductor layer, a data line layer, a contact hole of a passivation layer, and a pixel electrode. As the number of times of use increases, process efficiency is greatly reduced because the process becomes complicated and the process time and process cost are high.

Disclosure of Invention The present invention has been made to solve the above problems, and an object thereof is to provide a liquid crystal display device and a method of manufacturing the same, by forming a black matrix on a lower substrate, thereby increasing the aperture ratio without designing a bonding margin. .

Another object of the present invention is to provide a liquid crystal display and a method of manufacturing the same, which can simplify the process by reducing the frequency of use of the exposure mask.

In addition, it is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same, by forming a black matrix on a lower substrate so that only a color filter is formed on the upper substrate so that a defect due to rubbing does not occur.

The liquid crystal display device of the present invention according to the above object is a gate line and data line to define a pixel region by crossing each other on the first substrate and the second substrate facing each other, the gate line and the data line A thin film transistor formed at an intersection of the thin film transistor, a pixel electrode formed in the pixel region, the gate line, a data line, and a black matrix formed on the first substrate so as to correspond to an upper portion of the thin film transistor; And a liquid crystal layer between the color filter layer formed corresponding to the pixel region and the first and second substrates.

The liquid crystal display of the present invention according to the above object has a first substrate and a second substrate facing each other, a gate line and a data line to define a pixel region crossing each other on the first substrate, in parallel with the gate line A common line formed, a thin film transistor formed at an intersection of the gate line and a data line, a pixel electrode and a common electrode alternately formed in the pixel region, and corresponding to an upper portion of the gate line, a data line, and a thin film transistor, A common electrode pattern integrally formed with the electrode on the first substrate, a black matrix formed on the common electrode pattern, a color filter layer formed corresponding to at least the pixel region on the second substrate, and the first and second It characterized in that it comprises a liquid crystal layer between the two substrates.

The liquid crystal display device of the present invention according to the above object is a gate line and data line to define a pixel region by crossing each other on the first substrate and the second substrate facing each other, the gate line and the data line An insulating black matrix formed on the first substrate corresponding to an upper portion of the thin film transistor, the gate line, the data line, and the thin film transistor, wherein the black matrix is formed on the first substrate. And a pixel electrode electrically connected to the thin film transistor, a color filter layer formed corresponding to at least the pixel region on the second substrate, and a liquid crystal layer between the first and second substrates.

According to the above-described method, a method of manufacturing a liquid crystal display device according to the present invention may include preparing a first substrate and a second substrate, depositing a first metal material on the first substrate, and patterning the first metal material, thereby patterning the first and second substrates in one direction. Forming a gate line and a gate electrode protruding therefrom, a common line parallel to the gate line, forming a gate insulating film on an entire surface of the substrate including the gate line and the common line, and forming amorphous silicon on the gate insulating film Depositing a layer and patterning the semiconductor layer to form a semiconductor layer on the gate insulating layer on the gate electrode; depositing a second metal material layer on the entire surface of the substrate including the semiconductor layer; A data line defining a pixel region and protruding therefrom and spaced apart on the semiconductor layer Forming a source and a drain electrode, stacking a transparent metal layer and a light shielding metal layer on an entire surface of the substrate including the source and drain electrodes, and patterning the pixel electrode and the common electrode to alternate with each other in the pixel area; Forming a common electrode pattern on the first substrate and a black matrix on the common electrode pattern integrally with the common electrode and corresponding to the upper portion of the line, the gate electrode, and the source / drain electrode; And forming a color filter layer on the second substrate so as to correspond to at least the pixel region, and forming a liquid crystal layer between the first and second substrates.

According to the above-described method, a method of manufacturing a liquid crystal display device according to the present invention may include preparing a first substrate and a second substrate that face each other, depositing a metal material on the first substrate, and patterning the first and second substrates in one direction with a predetermined interval. Forming a gate line and a gate electrode protruding therefrom; forming a gate insulating film on the entire surface of the substrate including the gate line; stacking an amorphous silicon layer and a metal material layer on the entire upper surface of the gate insulating film; The semiconductor layer is patterned to intersect the gate line and protrudes over the gate electrode, the data line intersects the gate line to define a pixel region, and protrudes therefrom to form source and drain electrodes at predetermined intervals on the semiconductor layer. And the gate line, the data line, and the source / drain electrodes. Depositing a light blocking insulating layer on the entire surface of the substrate and patterning the light blocking insulating layer to form a black matrix on the gate line, the data line, the gate electrode, and the source / drain electrode, and depositing a transparent metal layer on the black matrix, Forming a pixel electrode in the pixel region except for the black matrix forming region through a lift-off process, forming a color filter layer on the second substrate to correspond at least to the pixel region, and the first and second And forming a liquid crystal layer between the substrates.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a plan view showing a liquid crystal display device according to a first embodiment of the present invention, and FIG. 4 shows a liquid crystal display device according to a first embodiment of the present invention along lines II ′ and II-II ′ of FIG. 3. It is a cross section.

3 and 4, the liquid crystal display according to the present invention, the gate line 112 formed in one direction at regular intervals on the transparent glass first substrate 110 and the gate electrode protruding therefrom The gate insulating layer 114 formed on the entire surface of the first substrate 110 including the gate lines 112 and 112a, and the semiconductor layer 116 formed on the gate insulating layer 114 above the gate electrode 112a. ), A data line 120 formed in a direction perpendicular to the gate line 114 to define a pixel region, and protrude from the data line 120 to the upper side of the semiconductor layer 116, and are spaced apart from each other by a predetermined distance. The first substrate 110 having a source electrode 120a and a drain electrode 122 formed thereon, and a contact hole on the drain electrode 122 and including a data line 120, a source electrode 120a, and a drain electrode 122. A protective film 124 formed on the entire surface and the drain electrode 122 by the contact hole ) And a black matrix 128 formed over the passivation layer 124 above the gate line 112 and the data line 120.

In this case, the black matrix 128 includes a thin film transistor including a gate electrode 112a, a gate insulating layer 114, a semiconductor layer 116, source / drain electrodes 120a and 122, a passivation layer 124, and a pixel electrode 126. It is further formed on the upper side of the.

In this case, the substrate on which the thin film transistor, the gate line 112, the data line 120, and the black matrix 128 are formed is called a thin film transistor array substrate.

Then, a color filter array substrate corresponding to the thin film transistor array substrate is formed. In the color filter array substrate, the color filter layer 152 and the common electrode 154 are formed on the transparent glass second substrate 150, and unlike the conventional art, the black matrix is not formed on the color filter array substrate.

In the above, the common electrode 154 is formed on the color filter array substrate to drive the pixel electrode 126 formed on the thin film transistor array substrate to form an electric field. However, the common electrode 154 is formed on the thin film transistor array substrate. It is also possible to generate and drive an electric field.

That is, by forming the black matrix on the thin film transistor array substrate, it is not necessary to consider the bonding margin between the thin film transistor array substrate and the color filter substrate in determining the width of the black matrix.

In addition, in the prior art, a step was generated at a portion where the black matrix and the color filter layer overlapped in the color filter substrate, and rubbing defects occurred, resulting in light leakage. Since it does not occur, the light leakage can be prevented to increase the contrast ratio.

The thin film transistor array substrate and the color filter substrate configured as described above are bonded to each other with a predetermined space, and a liquid crystal layer is formed between both substrates.

5A through 5F are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention.

In the manufacturing method of the liquid crystal display according to the first exemplary embodiment of the present invention, first, copper (Cu), aluminum (Al), and aluminum alloy (AlNd) are formed on the transparent first substrate 110 as shown in FIG. 5A. And at least one or more low-resistance metal materials such as molybdenum (Mo) and chromium (Cr).

Subsequently, the metal material is patterned through photo and etching processes to form a gate line 112 and a gate electrode 112a branching from the gate line. Subsequently, an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface of the first substrate 110 including the gate electrode 112a to form the gate insulating layer 114.

As shown in FIG. 5B, pure amorphous silicon and amorphous silicon including impurities are stacked on the entire surface of the gate insulating layer 114, and the pure silicon and the impurity-containing silicon are patterned through photo and etching processes to form a gate electrode ( The semiconductor layer 116 is formed on the gate insulating layer 114 on the upper portion 112a.

5C, copper (Cu), aluminum (Al), aluminum alloy (AlNd), molybdenum (Mo), and chromium (Cr) are formed on the entire surface of the first substrate 110 on the gate insulating layer 114 including the semiconductor layer 116. ), Any one of low-resistance metal materials such as titanium (Ti), tantalum (Ta), and molybdenum-tungsten (MoW) is deposited by sputtering, and patterned to define pixel regions crossing the gate lines. The data line 120 and the source electrode 120a and the drain electrode 122 protruding from the data line 120 to the semiconductor layer and spaced apart from each other by a predetermined interval are formed. The amorphous silicon layer including impurities located between the source electrode 120a and the drain electrode 122 is removed.

As shown in FIG. 5D, a method for chemical vapor deposition of SiNx and SiO ₂ , which are inorganic materials, on the entire surface of the first substrate 110 including the semiconductor layer 116, the data line 120, the source electrode 120a, and the drain electrode 122. Or a protective layer 124 is formed by applying BCB (Benzocyclobutene), an acrylic resin (acryl resin) as an organic material.

As illustrated in FIG. 5E, the passivation layer 124 is patterned to expose the surface of the drain electrode 122 to form a contact hole 140.

Next, a transparent metal, such as indium tin oxide (ITO) or indium zinc oxide (IZO), is deposited on the entire surface of the first substrate 110 including the contact hole 140, and the transparent metal is patterned through photo and etching processes. The pixel electrode 126 is formed to be electrically connected to the drain electrode 122 through the contact hole in the region.

In this case, the gate electrode 112a, the gate insulating layer 114, the semiconductor layer 116, the source / drain electrodes 120a and 122, the passivation layer 124, and the pixel electrode 126 intersect the gate line and the data line 114. The thin film transistor is formed at the site.

As shown in FIG. 5F, a resin, which is a photosensitive black organic material, is coated on the entire surface of the first substrate 110 on the protective film 124 to form a resin film. A mask is applied on the resin film, exposed using a UV lamp, and developed to form a black matrix 128 on the gate line, the data line 120, and the thin film transistor.

In this case, the resin film may be divided into a positive type in which a part receiving light is developed and a negative type in which a part not receiving light is developed.

In addition, the black matrix 128 may be formed through a photo and etching process using a metal such as chromium (Cr) as in the related art. However, when the resin is used as the black matrix 128 instead of chromium (Cr), the process of forming the black matrix 128 is simpler since no additional etching process is required after development as described above.

As shown in FIG. 5G, the R, G, and B color filter layers 152 are formed on the second glass substrate 150 made of transparent glass, and the common electrode 154 is formed on the entire surface of the upper portion. Unlike the prior art, the black matrix is not formed on the color filter array substrate.

Next, a liquid crystal layer is formed between the first and second substrates 110 and 150 facing each other.

6 is a plan view showing a liquid crystal display device according to a second embodiment of the present invention, and FIG. 7 is a liquid crystal display device according to a second embodiment of the present invention according to lines III-III 'and IV-IV' of FIG. 6. It is sectional drawing which shows.

6 and 7, the liquid crystal display according to the present invention has a gate line 212 formed in one direction at regular intervals on a transparent glass substrate 210 and a gate electrode 212a protruding therefrom. ), A common line 230 formed in parallel with the gate line 212, a gate insulating film 214 formed on the entire surface of the substrate 210 including the gate line 212 and the common line 230, and a gate The semiconductor layer 216 formed on the gate insulating layer 214 on the electrode 212a, the data line 220 crossing the gate line 212 to define the pixel region, and protruding from the semiconductor layer 216. A source electrode 220a formed on one side of the first electrode, a first pattern portion 222a formed on the other side of the semiconductor layer 216, a second pattern portion 222b formed on the common line 230, and a first And a connection part 222c connecting the second pattern parts 222a and 222b to each other. The substrate has a contact hole 240 on the second pattern portion 222b of the drain electrode 222 and includes a gate line 212, a data line 220, a source electrode 220a, and a drain electrode 222. A passivation layer 224 formed on the entire surface of the 210, a pixel electrode 226 electrically connected to the drain electrode 222 by the contact hole 240, and formed in parallel with the data line 220 in the pixel region; The common electrode pattern 232 formed over the first pattern portion 222a of the gate line 212, the data line 220, the gate electrode 212a, the source electrode 220a, and the drain electrode 222, and thus The common electrode 232a protrudes from the pixel electrode 226 and is alternately formed with each other, and a black matrix 228 formed on the common electrode pattern 232.

The ends of the common line 230 are electrically connected to the common electrode pattern 232.

The liquid crystal display is divided into a display area and a non-display area, and the common electrode pattern 232 is connected to the entire display area. In the non-display area, a pad part is formed, in which an electrode pattern is formed on the upper part so as to be connected to an external circuit, which is formed at the same time when the common electrode pattern 232 is formed, and is not electrically connected to each other. .

In this case, the substrate on which the gate line 112, the data line 120, the source / drain electrodes 220a and 222, and the black matrix 128 are formed is called a thin film transistor array substrate.

Although not shown, a color filter array substrate corresponding to the thin film transistor array substrate is formed. A color filter is formed on the color filter array substrate, and unlike the conventional art, the black matrix is not formed on the color filter array substrate.

That is, by forming the black matrix on the thin film transistor array substrate, it is not necessary to consider the bonding margin between the thin film transistor array substrate and the color filter substrate in determining the width of the black matrix.

In addition, in the prior art, a step was generated at a portion where the black matrix and the color filter layer overlapped in the color filter substrate, and rubbing defects occurred, resulting in light leakage. Since it does not occur, the light leakage can be prevented to increase the contrast ratio.

The driving mode of the liquid crystal display of the second embodiment is an in-plane switching mode, in which a common electrode is not formed on the color filter substrate but is formed on the thin film transistor array substrate. In this case, the common electrode and the pixel electrode are alternately formed to generate a transverse electric field.

The thin film transistor array substrate and the color filter substrate configured as described above are bonded to each other with a predetermined space, and a liquid crystal layer is formed between both substrates.

8A to 8F are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a second embodiment of the present invention.

In the manufacturing method of the liquid crystal display device according to the second embodiment of the present invention, first, as shown in FIG. 8A, on a transparent glass substrate 210, copper (Cu), aluminum (Al), aluminum alloy (AlNd), and molybdenum are used. Low-resistance metal materials, such as (Mo) and chromium (Cr), are deposited at least one or more layers.

Subsequently, the metal material is patterned through photo and etching processes to form a gate line 212 of FIG. 6, a gate electrode 212a protruding from the gate line, and a common line 230 formed in parallel with the gate line. . Subsequently, an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface of the substrate 210 including the gate line and the common line 230 to form the gate insulating layer 214.

As shown in FIG. 8B, pure amorphous silicon and amorphous silicon including impurities are stacked on the entire surface of the gate insulating layer 214, and the pure silicon and the impurity-containing silicon are patterned through a photo and etching process to form a gate electrode ( The semiconductor layer 216 is formed on the gate insulating layer 214 on the upper portion 212a).

Next, copper (Cu), aluminum (Al), aluminum alloy (AlNd), molybdenum (Mo), chromium (Cr), and titanium (Ti) on the entire surface of the substrate 210 on the gate insulating film 214 including the semiconductor layer 216. ), Any one of low-resistance metal materials such as tantalum (Ta) and molybdenum-tungsten (MoW) is deposited by a sputtering method, and patterned to intersect with the gate line to define a pixel region. And a source electrode 220a protruding from the data line 220 to one side of the semiconductor layer 216, a first pattern portion 222a on the other side of the semiconductor layer, and a second pattern portion on the common line 230. 222b and a drain electrode 222 formed of a connecting portion 222c connecting the first and second pattern portions to each other. The amorphous silicon layer including impurities located between the source electrode 220a and the first pattern portion 222a of the drain electrode 222 is removed.

At this time, the gate insulating film 214 is interposed between the common line 230 and the second pattern portion 222b of the drain electrode 222 to form a storage capacitor. Storage capacitors are needed to keep data signals stable.

As shown in FIG. 8C, an organic material, benzocyclobutene (BCB), an acrylic resin (acryl resin) is coated on the entire surface of the substrate including the gate line 212, the data line 220, the source electrode 220a, and the drain electrode 222. The protective film 224 is formed.

As shown in FIG. 8D, the passivation layer 224 is patterned to form a contact hole 240 so that the surface of the second pattern portion 222b of the drain electrode 222 is exposed to a predetermined portion.

Subsequently, a transparent metal layer 250 such as indium tin oxide (ITO) or indium zinc oxide (IZO) and a light shielding metal layer 252 including a double layer of chromium and chromium oxide are sequentially deposited on the entire surface of the substrate including the passivation layer 224. do.

Subsequently, after the photoresist 254, which is a photosensitive material, is applied on the light shielding metal layer 252, the diffraction mask 260 is corresponded, exposed using a UV lamp, and developed.

In this case, the diffraction mask 260 emits light from the data line 220, the gate line 212, the source electrode 220a, the first pattern portion 222a of the drain electrode 222, and the semiconductor layer 216. Light-shielding portion 260a for shielding light, semi-transmissive portion 260c for half-transmitting light at the portion where the common electrode (232a in FIG. 7) and pixel electrode (226 in FIG. 7) will be formed, and light passing through all the remaining portions It consists of the transmission part 260b.

Therefore, when the photoresist 254 is exposed and developed using the diffraction mask 260, the photoresist 254 corresponding to the light shielding portion 260a remains as it is, and the photoresist corresponding to the semi-transmissive portion 260c ( The photoresist 254 having a thickness thinner than that of the photoresist 254 corresponding to the light blocking portion 260a remains, and the photoresist 254 corresponding to the transmission portion 260b is completely removed.

As illustrated in FIG. 8E, the transparent metal layer 250 and the light shielding metal layer 252 are collectively patterned through an etching process using the developed photoresist 254 as a mask. At this time, both the transparent metal layer 250 and the light shielding metal layer 252 of the portion corresponding to the transmission portion 260b of the diffraction mask 260 are removed. On the other hand, the transparent metal layer 250 and the light shielding metal layer 252 of the portions corresponding to the light blocking portion 260a and the semi-transmissive portion 260c of the diffraction mask 260 remain.

In this case, the transparent metal layer 250 overlapping the upper portions of the first pattern portions 222a of the gate line 212, the data line 220, the gate electrode 212a, the source electrode 220a, and the drain electrode 222. The common electrode pattern 232 is formed, and the light blocking metal layer 252 on the common electrode pattern 232 is formed of a black matrix 228.

In the above, since the gate line 212, the data line 220, and the common electrode pattern 232 overlap each other with the passivation layer 224 interposed therebetween, parasitic capacitance is generated. However, in the present invention, parasitic capacitance can be reduced by lowering the dielectric constant of the protective film 224, which serves as a dielectric of the capacitance, by using an organic material, benzocyclobutene (BCB) or an acrylic resin, as the protective film.

Next, the photoresist 254 corresponding to the transflective portion 260c of the diffraction mask 260 is removed through an oxygen (O ₂ ) ashing process.

As illustrated in FIG. 8F, the light shielding metal layer 252 is patterned through an etching process using the ashed photoresist 256 as a mask. In this case, the light blocking metal layer 252 on the transparent metal layer 250 is removed from the pixel region, such that the pixel electrode 226 and the common electrode 232a alternate with each other in the pixel region are formed of the transparent metal layer 250. Here, the pixel electrode 226 is formed in parallel with the data line and is electrically connected to the drain electrode 222 by the contact hole 240. The common electrode 232a protrudes from the common electrode pattern 232 and crosses the pixel electrode 226.

Although the chromium and the chromium oxide film are used as the light blocking metal layer 252 in the above, the second embodiment of the present invention is not limited thereto, and any metal capable of blocking light may be used, which is within the protection scope of the present invention. This is natural.

Next, FIG. 9 is a plan view showing a liquid crystal display device according to a third embodiment of the present invention, and FIG. 10 is a liquid crystal of a third embodiment of the present invention according to lines V-V ′ and VI-VI ′ of FIG. 9. A cross-sectional view showing a display device.

9 and 10, the liquid crystal display according to the present invention, the gate line 312 formed in one direction at regular intervals on the transparent glass substrate 310 and the gate electrode 312a protruding therefrom ), A gate insulating film 314 formed on the entire surface of the substrate 310 including the gate line 312, a first semiconductor layer 315 formed to intersect the gate line 312, and a gate electrode 312a. The second semiconductor layer 316 formed on the upper gate insulating layer 314, the data line 320 formed on the first semiconductor layer 315, and both ends of the second semiconductor layer 316 protruding therefrom. The data line 320 and the source / drain electrode 320a having a source electrode 320a and a drain electrode 322 formed at regular intervals, and a contact hole 340 to expose a predetermined portion of the surface of the drain electrode 322. And a protective film 324 formed on the entire surface of the substrate 310 including the 322 and the contact hole 340. A pixel electrode 326 electrically connected to the drain electrode 322 and formed in the pixel region through the gate line 312, the data line 320, the source electrode 320a, and the drain electrode 340. The black matrix 328 is formed so as not to overlap with the electrode 326.

The gate line 312 and the data line 320 may further include a gate pad part G.P and a data pad part D.P, respectively, which are parts connected to an external driving circuit.

The gate pad part G.P includes a gate pad pattern 313 formed at an end of the gate line 312 and a first transparent electrode pattern 327 formed on the gate pad pattern 313. In this case, since the first pad hole 342 is formed in the gate insulating layer 314 on the gate pad pattern 313, the gate pad pattern 313 and the first transparent electrode pattern 327 are electrically connected to each other. .

The data pad part DP includes a third semiconductor layer 317 formed at the end of the first semiconductor layer 315 and a data pad pattern formed on the third semiconductor layer 317 at the end of the data line 320. 321 and a second transparent electrode pattern 329 formed on the data pad pattern 321. In this case, since the second pad hole 344 is formed in the passivation layer 324 on the data pad pattern 321, the data pad pattern 321 and the second transparent electrode pattern 329 are electrically connected to each other.

In this case, the substrate on which the gate line 312, the data line 320, the gate pad part G.P, the data pad part D.P, and the black matrix 328 are formed is called a thin film transistor array substrate.

Although not shown, a color filter array substrate corresponding to the thin film transistor array substrate is formed. The color filter and the common electrode are formed on the color filter array substrate, and unlike the related art, the black matrix is not formed on the color filter array substrate.

That is, by forming the black matrix on the thin film transistor array substrate, it is not necessary to consider the bonding margin between the thin film transistor array substrate and the color filter substrate in determining the width of the black matrix.

The thin film transistor array substrate and the color filter substrate configured as described above are bonded to each other with a predetermined space, and a liquid crystal layer is formed between both substrates.

In addition, in the prior art, a step was generated at a portion where the black matrix and the color filter layer overlapped in the color filter substrate, and rubbing defects occurred, resulting in light leakage. Since it does not occur, the light leakage can be prevented to increase the contrast ratio.

11A to 11I are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to a third embodiment of the present invention.

In the manufacturing method of the liquid crystal display according to the third embodiment of the present invention, first, as shown in FIG. 11A, copper (Cu), aluminum (Al), aluminum alloy (AlNd), and molybdenum on a transparent glass substrate 310 are used. Low-resistance metal materials, such as (Mo) and chromium (Cr), are deposited at least one or more layers.

Subsequently, the metal material is patterned through photo and etching processes to form a gate line 312a branched from the gate line (312 of FIG. 9) and the gate line, and a gate pad pattern 313 at an end of the gate line.

As illustrated in FIG. 11B, a gate insulating layer 314 is formed by depositing an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) on the entire surface of the substrate 310 including the gate electrode 312a and the gate pad pattern 313. do.

Subsequently, pure amorphous silicon and amorphous silicon containing impurities are stacked on the entire surface of the gate insulating layer 314 to form an amorphous silicon layer 372, and copper (Cu) and aluminum (Al) may be formed on the amorphous silicon layer 372. ), Any one of low-resistance metal materials such as aluminum alloy (AlNd), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum-tungsten (MoW) by sputtering method Deposition to form a metal material layer 374.

Subsequently, after the photoresist 354, which is a photosensitive material, is applied on the metal material layer 374, the first mask 360 is applied on the photoresist 354 to be exposed by using a UV lamp, and then exposed. The photoresist 354 is developed.

In this case, the first mask uses a diffraction mask to cause the developed photoresist 354 to have a double step, and the diffraction mask includes a data line (320 of FIG. 9), source / drain electrodes 320a and 322, and data. A light blocking part 360a that shields light from a portion where the pad pattern 321 is to be formed, and a semi-transmissive portion 360c that transmits only half of the light at a portion where a channel is formed between the source electrode 320a and the drain electrode 322. And a transmission part 360b that transmits all of the light in the remaining part.

Therefore, when the photoresist 354 is exposed and developed using the first mask 360, the photoresist 354 corresponding to the light shielding portion 360a remains as it is, and the photoresist corresponding to the semi-transmissive portion 360c. The photoresist 354 having a thickness thinner than that of the photoresist 354 corresponding to the light blocking portion 360a is left, and the photoresist 354 corresponding to the transmissive portion 360b is completely removed.

As shown in FIG. 11C, the metal material layer 374 and the amorphous silicon layer 372 are patterned using the developed photoresist 354 as a mask. At this time, both the metal material layer 374 and the amorphous silicon layer 372 of the portion corresponding to the transmission portion 360b of the first mask 360 are removed. In contrast, the metal material layer 374 and the amorphous silicon layer 372 corresponding to the light blocking part 360a and the semi-transmissive part 360c of the first mask 360 remain.

In this case, the first silicon layer 315 is patterned to intersect the gate line 312 and the second semiconductor layer is formed on the gate insulating layer 314 on the gate electrode 312a. 316 and a third semiconductor layer 317 formed at the end of the first semiconductor layer 315 are formed. The metal material layer 374 remains on the first to third semiconductor layers 315, 316, and 317.

Next, the photoresist 354 corresponding to the transflective portion 360c of the first mask 360 is removed through an oxygen (O ₂ ) ashing process.

As shown in FIG. 11D, the metal material layer 374 is patterned through an etching process using the ashed photoresist 356 as a mask, so that the data line 320 and the data line are formed on the first semiconductor layer 315. A data pad pattern protruding from and formed on the source electrode 320a and the drain electrode 322 and the third semiconductor layer 317 at the end of the data line 320 at regular intervals at both ends of the second semiconductor layer 316. 321 is formed. The channel is formed by removing the amorphous silicon layer including impurities located between the source electrode 320a and the drain electrode 322.

Subsequently, SiNx and SiO ₂ , which are inorganic materials, are deposited on the entire surface of the substrate including the data line 320, the source / drain electrodes 320a and 322, and the data pad pattern 321 by a chemical vapor deposition method, or BCB ( Benzocyclobutene) and an acrylic resin are applied to form a protective film 224.

In addition, a light blocking insulating layer 376 is formed by depositing or applying an insulating material that blocks light on the passivation layer 224.

As shown in FIG. 11E, after the photoresist 364, which is a photosensitive material, is applied on the light-shielding insulating layer 376, the second mask 362 is corresponded on the photoresist 364 and exposed using a UV lamp. Thereafter, the exposed photoresist 364 is developed.

In this case, the second mask 362 uses a diffraction mask to cause the developed photoresist 364 to have a double step. The diffraction mask shields light at a portion where the black matrix 328 of FIG. 9 is to be formed. In the light shielding portion 362a, the contact hole (340 of FIG. 9), the first pad hole 342 and the second pad hole 344 are formed in the transmission portion (362b) that transmits all the light, and the remaining portion It consists of the transflective part 362c which permeate | transmits light only half.

Therefore, when the photoresist 364 is exposed and developed using the second mask 362, the photoresist 364 corresponding to the light shielding portion 362a remains as it is, and the photoresist corresponding to the semi-transmissive portion 362c. 364, a photoresist 364 having a thickness thinner than that of the photoresist 364 corresponding to the light blocking portion 362a is left, and the photoresist 364 corresponding to the transmission portion 362b is completely removed.

As shown in FIG. 11F, the light-shielding insulating layer 376, the protective film 324, and the gate insulating film 314 are patterned using the developed photoresist 364 as a mask. At this time, the light shielding insulating layer 376 and the protective film 324 of the portion corresponding to the transmissive portion 362b of the second mask 362 are removed, while the light shielding portion 362a and the second mask 362 are removed. The light-shielding insulating layer 376 and the protective film 324 of the part corresponding to the transflective part 362c remain as it is.

In addition, the gate insulating layer 314 disposed on the gate pad pattern 313 is removed. At this time, not all of the gate insulating layers 314 of the portion corresponding to the transmission part 362b of the second mask 362 are removed, which is the drain electrode 322, the third semiconductor layer 317, and the data pad pattern 321. This is because the gate insulating layer under the N is protected by the drain electrode 322, the third semiconductor layer 317, and the data pad pattern 321 and is not etched.

Next, the photoresist 364 of the portion corresponding to the transflective portion 362c of the second mask 362 is removed through an oxygen (O ₂ ) ashing process.

As shown in FIG. 11G, the light blocking insulating layer 376 is patterned through an etching process using the ashed photoresist 366 as a mask to form a gate line 312, a gate electrode 312a, a data line 320, The black matrix 328 is formed on the source electrode 320a and the drain electrode 340. That is, the black matrix 328 is formed at portions except the pixel region.

In addition, the black matrix 328 is formed in the peripheral area of the first pad hole 342 and the second pad hole 344 in the gate pad part G.P and the data pad part D.P. That is, the black matrix 328 is formed at portions except the upper portion of the gate pad pattern 313 and the data pad pattern 321.

11H, a transparent metal layer 378 is deposited by depositing a transparent metal such as indium tin oxide (ITO) or indium zinc oxide (IZO) on the entire surface of the substrate 310 including the ashed photoresist 366 and the passivation layer 324. To form.

As illustrated in FIG. 11I, the photoresist 366 that is ashed through the lift off process is removed, and the transparent metal layer 378 formed on the ashed photoresist 366 is removed to remove the photoresist 366. A pixel electrode 326 electrically connected to the drain electrode 322 is formed in the pixel area.

In addition, a first transparent electrode pattern 327 is formed to be electrically connected to the gate pad pattern 313 through the first pad hole 342, and the third semiconductor layer 317 through the second pad hole 344. And a second transparent electrode pattern 329 electrically connected to the data pad pattern 321.

As described above, the liquid crystal display device and the manufacturing method thereof according to the present invention have the following effects.

First, since a black matrix is formed on the lower substrate, light leakage does not occur even when misalignment occurs between the upper and lower substrates during bonding, so that the aperture ratio increases because the black matrix does not need to be designed in consideration of the bonding margin.

Second, there is an effect that can reduce the process time and the unit cost by reducing the number of times of use of the exposure mask.

Third, by forming a black matrix on the lower substrate, only a color filter is formed on the upper substrate so that defects due to rubbing do not occur on at least one substrate, thereby preventing light leakage and increasing the contrast ratio.

Claims (28)

delete delete delete delete A first substrate and a second substrate facing each other; A gate line formed on the first substrate; A common line formed on the first substrate in parallel with the gate line; A gate insulating film formed on an entire surface of the first substrate to cover the gate line and the common line; A data line formed on the gate insulating film and crossing the gate line to define a pixel area; A thin film transistor formed at an intersection of the gate line and the data line; A protective film formed on an entire surface of the gate insulating film to cover the data line and the thin film transistor; A pixel electrode and a common electrode which are alternately formed in the pixel area on the passivation layer; A common electrode pattern formed on the passivation layer and overlapping the gate line, the data line, and the thin film transistor, respectively, and integrated with the common electrode; A black matrix formed on and in contact with the common electrode pattern; A color filter layer formed on the second substrate to correspond to at least the pixel area; And It comprises a liquid crystal layer formed between the first and the second substrate, An end portion of the common line is electrically connected to the common electrode pattern. delete 6. The method of claim 5, The common electrode and the pixel electrode are formed of indium tin oxide (ITO) or indium zinc oxide (IZO). delete 6. The method of claim 5, The black matrix is a liquid crystal display, characterized in that formed of a double layer of chromium and chromium oxide. delete 6. The method of claim 5, The protective layer is formed of BCB (Benzocyclobutene) or an acrylic resin (acryl resin). 6. The method of claim 5, The thin film transistor A gate electrode protruding from the gate line on the first substrate; A semiconductor layer formed on the gate insulating layer and overlapping the upper portion of the gate electrode; A source electrode formed on the gate insulating layer and protruding from the data line to be in contact with one side of the semiconductor layer; And A drain electrode formed on the gate insulating layer and having a first pattern portion contacting the other side of the semiconductor layer, a second pattern portion overlapping an upper portion of the common line, and a connection portion connecting the first and second pattern portions; Liquid crystal display device characterized in that consisting of. 13. The method of claim 12, And the common electrode pattern overlaps the gate electrode, the semiconductor layer, the source electrode, and the first pattern portion, respectively. delete delete delete delete Preparing a first substrate and a second substrate; Patterning a first metal material deposited on the first substrate to form a gate line in one direction spaced apart from each other at regular intervals, a gate electrode protruding from the gate line, and a common line parallel to the gate line ; Forming a gate insulating film on the entire surface of the first substrate, the gate insulating layer covering the gate line, the gate electrode, and the common line; Patterning an amorphous silicon layer deposited on the gate insulating layer to form a semiconductor layer overlapping the gate electrode; Patterning a second metal material layer deposited on the gate insulating layer including the semiconductor layer to define a pixel region, and a data line in a direction crossing the gate line, and protruding from the data line to one side of the semiconductor layer. Forming a source electrode in contact with the drain electrode and a drain electrode spaced apart from the source electrode and in contact with the other side of the semiconductor layer; Forming a passivation layer on the entire surface of the gate insulating layer to cover the data line, the source electrode, and the drain electrode; By patterning the transparent metal layer and the light shielding metal layer sequentially deposited on the passivation layer, the pixel electrode and the common electrode alternate with each other in the pixel region, are integral with the common electrode, and the gate line, the data line, the gate electrode, and the Forming a common electrode pattern overlapping an active layer, an upper portion of each of the source electrode and the drain electrode, and a black matrix on the common electrode pattern; Forming a color filter layer corresponding to at least the pixel area on the second substrate; And And forming a liquid crystal layer between the first and second substrates, An end portion of the common line is electrically connected to the common electrode pattern. The method of claim 18, The forming of the pixel electrode and the common electrode, the common electrode pattern, and the black matrix may include: Sequentially stacking the transparent metal layer and the light blocking metal layer on the entire surface of the passivation layer; Exposing and developing the photoresist applied on the light shielding metal layer in correspondence with a mask; Collectively patterning the transparent metal layer and the light shielding metal layer while using the developed photoresist as a mask to form the black matrix including the common electrode pattern made of the transparent metal layer and the light blocking metal layer formed on the common electrode pattern step; Ashing the developed photoresist; And And patterning the light shielding metal layer to form the pixel electrode and the common electrode formed of the transparent metal layer while the ashed photoresist is used as a mask. The method of claim 18, The common electrode and the pixel electrode are formed of indium tin oxide (ITO) or indium zinc oxide (IZO). delete The method of claim 18, And said black matrix is formed of a double layer of chromium and chromium oxide. The method of claim 18, In the forming of the data line, the source electrode, and the drain electrode, The drain electrode includes a first pattern portion in contact with the other side of the semiconductor layer, a second pattern portion overlapping an upper portion of the common line, and a connection portion connecting the first and second pattern portions, After forming the protective film, And forming a contact hole in the passivation layer on the upper portion of the second pattern portion. The method of claim 18, The protective film is formed of BCB (Benzocyclobutene) or acrylic resin (acryl resin) manufacturing method of a liquid crystal display device. delete delete delete delete

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