KR101331659B1 - Quad module tuner - Google Patents

Abstract

The present invention relates to a quad module tuner, comprising: a substrate module connected to a high frequency input terminal and a high frequency output terminal; A first dual tuning unit having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals; A second dual tuning unit having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals; A first dual demodulator for demodulating the tuned first and second intermediate frequency signals into first and second baseband signals; A second dual demodulator for demodulating the tuned third and fourth intermediate frequency signals into third and fourth baseband signals; A filter configured to pass a predetermined band signal of the high frequency signal to the first and second dual tuning units; And a low noise amplifier that removes and amplifies noise from the filtered high frequency signals. Since a quad module tuner is built in one can, miniaturization is possible, and a plurality of broadcasts can be simultaneously received or recorded. The grounding and internal chassis of the amplifier can improve tuner performance by eliminating heat dissipation in the circuit and signal interference between the circuits.

Description

Quad module tuner {QUAD MODULE TUNER}

The present invention relates to a quad module tuner.

Recently, in the digital TV set such as DVB-T (Digital Video Broadcasting-Terrestrial), which is a European digital terrestrial TV broadcasting standard, or in a set top box for digital TV, signal processing is performed. With digitalization, it is required to have two or three tuners mounted in one set. According to this desire, when two tuners are mounted in one set, one tuner can be used for watching TV, the other tuner can be used for recording, and the like.

As described above, the conventional hybrid tuning system having two or more tuners includes a first single conversion tuner for converting an RF signal corresponding to a first selected channel among the RF signals from the antenna ANT into an IF signal, and the antenna ANT. And a second single conversion tuner for converting an RF signal corresponding to the second selection channel among the RF signals from the IF signal.

However, in the conventional hybrid tuning system, since a normal TV reception operation cannot be performed due to interference between the same frequency or adjacent frequencies between two tuners (main tuner and sub tuner) adopting the same conversion scheme, one package There is a problem in that two tuner sections cannot be implemented.

For example, with respect to a DVB-T terminal having an intermediate frequency (IF) of 36 MHz, first, a case where the same channel is selected by the first single conversion tuner and the second single conversion tuner will be described. The oscillation frequency is 836MHz when the RF 800MHz is selected in the tuner, and the oscillation frequency is 836MHz when the RF 800MHz is selected in the second single conversion tuner, and the oscillation frequency of the first single conversion tuner and the second single conversion tuner Since each intermediate frequency is the same, interference between the intermediate frequencies occurs.

Next, when adjacent channels are selected in the first single conversion tuner and the second single conversion tuner, for example, when the RF 800 MHz is selected in the first single conversion tuner, the oscillation frequency is 836 MHz. When the RF 808MHz is selected in the 2 single conversion tuner, the oscillation frequency is 844MHz, and since the intermediate frequencies of the first single conversion tuner and the second single conversion tuner are adjacent to each other, interference between intermediate frequencies occurs.

In order to avoid such frequency interference, the first single conversion tuner and the second single conversion tuner are not implemented in one package, but are manufactured in separate packages, and each set is formed in a separate package. Two tuners are installed and installed.

In this case, since each tuner must be manufactured in a separate package, there is a limit in miniaturizing the tuning system.

In addition, since power consumption increases when a plurality of tuners are operated, the tuner performance may be deteriorated with respect to temperature characteristics.

Disclosure of Invention The present invention has been made to solve the above problems, and provides a quad module tuner capable of simultaneously receiving or recording a plurality of broadcasts by embedding a quad module tuner embedded in a single CAN.

In addition, the present invention is to provide a quad module tuner that dissipates heat generated from the circuit portion through the plurality of ground pins, and excludes signal interference between the circuit portions through the plurality of chassis.

In order to achieve the above object, according to an embodiment of the present invention, a quad module tuner includes: a substrate module connected to a high frequency input terminal and a high frequency output terminal; A first dual tuning unit formed on the substrate module and having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals; A second dual tuning unit formed on the substrate module and having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals; A first dual demodulator formed on the substrate module and configured to demodulate the first and second intermediate frequency signals tuned from the first dual tuner into first and second baseband signals; A second dual demodulator formed on the substrate module and configured to change and demodulate the third and fourth intermediate frequency signals tuned from the second dual tuner into third and fourth baseband signals; A filter formed on the substrate module and installed at a front end of the first dual tuning unit to pass predetermined band signals of the high frequency signals inputted from the high frequency input terminal to the first and second dual tuning units; And a low noise amplifier which removes and amplifies noise from the high frequency signals filtered through the filter.

The first dual tuning unit may include: a first high frequency processing unit converting and processing a first high frequency signal input from the high frequency input terminal into a first intermediate frequency signal; And a second high frequency processor configured to convert the second high frequency signal input from the high frequency input terminal into a second intermediate frequency signal and process the same.

The second dual tuning unit may further include: a third high frequency processing unit converting and processing a third high frequency signal input from the high frequency input terminal into a third intermediate frequency signal; And a fourth high frequency processor configured to convert the fourth high frequency signal input from the high frequency input terminal into a fourth intermediate frequency signal to process the fourth high frequency signal.

The first dual demodulator may include: a first baseband processor configured to convert a first intermediate frequency signal tuned from the first dual tuner into a first baseband frequency signal and process the first baseband frequency signal; And a second baseband processor for converting and processing the second intermediate frequency signal tuned from the first dual tuning unit into a second baseband frequency signal.

The second dual demodulator may further include: a third baseband processor configured to convert a third intermediate frequency signal tuned from the second dual tuner into a third baseband frequency signal and process the third baseband signal; And a fourth baseband processor for converting and processing the fourth intermediate frequency signal tuned from the second dual tuning unit into a fourth baseband frequency signal.

The quad module tuner may include: an external chassis formed at a predetermined height along an edge of the substrate module to protect a plurality of circuit parts formed in the substrate module and inserted into and coupled to the high frequency input terminal and the high frequency output terminal; A plurality of inner chassis formed between each of the plurality of circuit parts formed in the substrate module and connected to the external chassis to shield signal interference between the plurality of circuit parts; And a plurality of ground pins formed to correspond to the circuit parts at a predetermined height along the edge of the outer chassis to insert heat generated from each circuit part formed in the substrate module and inserted into and coupled to the substrate module.

The plurality of internal chassis may further include: a first internal chassis formed between the filter and the low noise amplifier; A second internal chassis formed between the low noise amplifier and the first and second dual tuning units; A tuning unit internal chassis formed between the first dual tuning unit and the second dual tuning unit; A third internal chassis formed between the first and second dual tuning units and the first and second dual demodulators; And a demodulator internal chassis formed between the first dual demodulator and the second dual demodulator.

The plurality of ground pins may include: a first ground pin configured to discharge heat generated from the first dual tuning unit; A second ground pin dissipating heat generated from the first dual demodulator; A third ground pin dissipating heat generated from the low noise amplifier; Fourth and fifth ground pins for dissipating heat generated from the first dual tuning unit; Sixth and seventh ground pins for dissipating heat generated from the second dual demodulator; An eighth ground pin that fixes one side of the substrate module and releases heat generated from the filter; And a ninth ground pin that fixes the other side of the substrate module and releases heat generated from the second dual tuning unit or the second dual demodulator according to a position.

The first dual tuning unit and the second dual tuning unit independently perform channel tuning.

The first dual demodulator and the second dual demodulator perform independently tuned channel signal demodulation.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to this, terms and words used in the present specification and claims should not be construed in a conventional, dictionary sense, and should not be construed as defining the concept of a term appropriately in order to describe the inventor in his or her best way. It should be construed in accordance with the meaning and concept consistent with the technical idea of the present invention.

According to the present invention, since a quad module tuner is built into one can, miniaturization is possible, and at the same time, a plurality of broadcasts are received or recorded, thereby improving user convenience.

In addition, according to the present invention, the tuner performance can be improved by releasing heat generated from the circuit portion through a plurality of ground pins and eliminating signal interference between the circuit portions through the plurality of chassis.

1 is a block diagram of a quad module tuner according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a chassis structure of the quad module tuner shown in FIG. 1. FIG.
3 illustrates coupling the tuner chassis of FIG. 2 to the quad module tuner of FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The objectives, specific advantages and novel features of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. It should be noted that, in the present specification, the reference numerals are added to the constituent elements of the drawings, and the same constituent elements are assigned the same number as much as possible even if they are displayed on different drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a quad module tuner according to an embodiment of the present invention, FIG. 2 is a diagram illustrating a chassis structure of the quad module tuner illustrated in FIG. 1, and FIG. 3 is a diagram illustrating a quad module tuner of FIG. 1. A diagram showing the coupling of the tuner chassis of the.

First, referring to FIG. 1, the quad module tuner 100 according to an exemplary embodiment of the present disclosure may include a substrate module 1, a first dual tuning unit 130, a second dual tuning unit 140, and a first dual The demodulator 150 and the second dual demodulator 160 are configured.

The first dual tuning unit 130 receives the first and second high frequency signals, respectively, and converts the first and second intermediate frequency signals to output the first and second intermediate frequency signals.

The first dual tuning unit 130 may include a first high frequency processor 132 that receives and tunes the first high frequency signal and a first high frequency processor 132 that receives and tunes the second high frequency signal. have.

The second dual tuning unit 140 receives the third and fourth high frequency signals, and converts the third and fourth intermediate frequency signals to output the third and fourth intermediate frequency signals.

The second dual tuning unit 140 may include a third high frequency processor 142 for receiving and tuning the third high frequency signal and a fourth high frequency processor 144 for receiving and tuning the fourth high frequency signal. have.

In this case, the first dual tuning unit 130 and the second dual tuning unit 140 perform channel tuning independently.

The first dual demodulator 150 receives the first and second intermediate frequency signals converted from the first dual tuning unit 130, respectively, and converts the first and second baseband signals into first and second baseband signals.

The first dual demodulator 150 receives the first intermediate frequency signal and demodulates it into a first baseband signal, or receives the second intermediate frequency signal and demodulates the second baseband signal into a first baseband signal. A processor 152 and a second baseband processor 154 that receives the first intermediate frequency signal and demodulates it into a first baseband signal, or receives the second intermediate frequency signal and demodulates it into a second baseband signal. Can be.

The second dual demodulator 160 receives the third and fourth intermediate frequency signals converted from the second dual tuning unit 140, respectively, and converts the third and fourth baseband signals into third and fourth baseband signals.

The second dual demodulator 160 receives the third intermediate frequency signal and demodulates it into a third baseband signal, or receives the fourth intermediate frequency signal and demodulates the fourth baseband signal into a fourth baseband signal. A processing unit 162 and a fourth baseband processing unit 164 that receives the fourth intermediate frequency signal and demodulates the fourth baseband signal or receives and demodulates the third intermediate frequency signal to a third baseband signal. Can be.

In this case, the first dual demodulator 150 and the second dual demodulator 160 perform independently tuned channel signal demodulation.

In addition, the quad module tuner 100 according to an embodiment of the present invention is a high frequency signals (eg, first, second, third and fourth) input from an antenna in front of the first dual tuning unit 130. And a low noise amplifier (LNA) 120 that removes and amplifies noise from the high frequency signals filtered through the filter 110.

Here, the filter 110 may be, for example, a Saw filter.

As described above, the plurality of high frequency signals tuned and converted from the quad module tuner 100 according to an exemplary embodiment are demodulated into audio / video signals of respective corresponding frequency bands through the MPEG TS 200.

Meanwhile, as shown in FIGS. 2 and 3, the quad module tuner 100 according to an embodiment of the present invention is coupled to and fixed to the substrate module 1 and includes a plurality of circuit parts formed in the substrate module 1. (Eg, to protect the filter 110, the low noise amplifier 120, the first and second dual tuning units 130 and 14, and the first and second dual demodulators 150 and 160), It is formed at a predetermined height along the edge of the module 1, and is formed between each of the plurality of circuit parts formed in the substrate module 1, the external chassis (SH-OUT) inserted and coupled to the high frequency input terminal and the high frequency output terminal And a plurality of internal chassis SH10, SH20, SH25, SH30, and SH35 connected to the external chassis SH-OUT to shield signal interference between the plurality of circuit parts, and each circuit part formed in the substrate module 1. In order to dissipate the heat generated from the It further includes a plurality of ground pins (G1 ~ G9) formed to correspond to each of the circuit portion and inserted into the substrate module (1).

Specifically, the plurality of internal chassis SH10, SH20, SH25, SH30, and SH35 may include, for example, a first internal chassis SH10 and the low noise amplifier formed between the filter 110 and the low noise amplifier 120. And a second internal chassis SH20 formed between the first and second dual tuning units 130 and 140, and between the first dual tuning unit 130 and the second dual tuning unit 140. A third internal chassis SH30 formed between the tuning unit internal chassis SH25, the first and second dual tuning units 130 and 140, and the first and second dual demodulation units 150 and 160. And a demodulator internal chassis SH25 formed between the first dual demodulator 150 and the second dual demodulator 160.

In addition, the plurality of ground pins G1 to G9 may include, for example, a first ground pin G1 for dissipating heat generated from the first dual tuning unit 130 and the first dual demodulation unit 150. A second ground pin G2 for dissipating heat generated from the second ground pin, a third ground pin G3 for dissipating heat generated from the low noise amplifier, and a second ground pin G3 dissipating heat generated from the first dual tuning unit 130. Fourth and fifth ground pins G4 and G5, sixth and seventh ground pins G6 and G7 for dissipating heat generated from the second dual demodulator 160, and one side of the substrate module 1 The eighth ground pin G8 for fixing and dissipating heat generated from the filter 110, and the second dual tuning unit 140 or the second according to the position of the eighth ground pin G8. It may include a ninth ground pin (G9) for dissipating heat generated from the dual demodulator 160.

As described above, the quad module tuner 100 according to an embodiment of the present invention can be miniaturized by embedding a quad module tuner in one can and simultaneously receives or records a plurality of broadcasts. Convenience can be improved.

In addition, a plurality of ground pins (eg, G1 to G9) release heat generated from the corresponding circuit part, and signal interference between the corresponding circuit parts through a plurality of internal chassis (eg, SH10, SH20, SH30, SH25, and SH35). Tuner performance can be improved.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. And changes may be made without departing from the spirit and scope of the invention.

100: quad module tuner 110: filter
120: low noise amplifier 130: first dual tuning unit
140: second dual tuning unit 150: first dual demodulation unit
160: second dual tuning unit 200: MPEG TS
SH-OUT: External Chassis
SH10, SH20, SH30, SH25, SH35: Internal Chassis
G1 ~ G9: Ground Pin

Claims (10)

delete A substrate module connected to the high frequency input terminal and the high frequency output terminal;
A first dual tuning unit formed on the substrate module and having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals;
A second dual tuning unit formed on the substrate module and having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals;
A first dual demodulator formed on the substrate module and configured to demodulate the first and second intermediate frequency signals tuned from the first dual tuner into first and second baseband signals;
A second dual demodulator formed on the substrate module and configured to change and demodulate the third and fourth intermediate frequency signals tuned from the second dual tuner into third and fourth baseband signals;
A filter formed on the substrate module and installed at a front end of the first dual tuning unit to pass predetermined band signals of the high frequency signals inputted from the high frequency input terminal to the first and second dual tuning units; And
A low noise amplifier which removes and amplifies noise from the high frequency signals filtered through the filter,
The first dual tuning unit,
A first high frequency processing unit converting and processing a first high frequency signal input from the high frequency input terminal into a first intermediate frequency signal; And
And a second high frequency processor configured to convert and process a second high frequency signal input from the high frequency input terminal into a second intermediate frequency signal. A substrate module connected to the high frequency input terminal and the high frequency output terminal;
A first dual tuning unit formed on the substrate module and having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals;
A second dual tuning unit formed on the substrate module and having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals;
A first dual demodulator formed on the substrate module and configured to demodulate the first and second intermediate frequency signals tuned from the first dual tuner into first and second baseband signals;
A second dual demodulator formed on the substrate module and configured to change and demodulate the third and fourth intermediate frequency signals tuned from the second dual tuner into third and fourth baseband signals;
A filter formed on the substrate module and installed at a front end of the first dual tuning unit to pass predetermined band signals of the high frequency signals inputted from the high frequency input terminal to the first and second dual tuning units; And
A low noise amplifier which removes and amplifies noise from the high frequency signals filtered through the filter,
The second dual tuning unit,
A third high frequency processor converting and processing a third high frequency signal input from the high frequency input terminal into a third intermediate frequency signal; And
And a fourth high frequency processor configured to convert the fourth high frequency signal input from the high frequency input terminal into a fourth intermediate frequency signal to process the fourth high frequency signal. A substrate module connected to the high frequency input terminal and the high frequency output terminal;
A first dual tuning unit formed on the substrate module and having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals;
A second dual tuning unit formed on the substrate module and having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals;
A first dual demodulator formed on the substrate module and configured to demodulate the first and second intermediate frequency signals tuned from the first dual tuner into first and second baseband signals;
A second dual demodulator formed on the substrate module and configured to change and demodulate the third and fourth intermediate frequency signals tuned from the second dual tuner into third and fourth baseband signals;
A filter formed on the substrate module and installed at a front end of the first dual tuning unit to pass predetermined band signals of the high frequency signals inputted from the high frequency input terminal to the first and second dual tuning units; And
A low noise amplifier which removes and amplifies noise from the high frequency signals filtered through the filter,
The first dual demodulation unit,
A first baseband processor for converting and processing the first intermediate frequency signal tuned from the first dual tuning unit into a first baseband frequency signal; And
And a second baseband processor configured to convert the second intermediate frequency signal tuned from the first dual tuner into a second baseband frequency signal. A substrate module connected to the high frequency input terminal and the high frequency output terminal;
A first dual tuning unit formed on the substrate module and having an IC for converting and tuning first and second high frequency signals input from the high frequency input terminal into first and second intermediate frequency signals;
A second dual tuning unit formed on the substrate module and having an IC for converting and tuning third and fourth high frequency signals input from the high frequency input terminal into third and fourth intermediate frequency signals;
A first dual demodulator formed on the substrate module and configured to demodulate the first and second intermediate frequency signals tuned from the first dual tuner into first and second baseband signals;
A second dual demodulator formed on the substrate module and configured to change and demodulate the third and fourth intermediate frequency signals tuned from the second dual tuner into third and fourth baseband signals;
A filter formed on the substrate module and installed at a front end of the first dual tuning unit to pass predetermined band signals of the high frequency signals inputted from the high frequency input terminal to the first and second dual tuning units; And
A low noise amplifier which removes and amplifies noise from the high frequency signals filtered through the filter,
The second dual demodulation unit,
A third baseband processor for converting and processing a third intermediate frequency signal tuned from the second dual tuning unit into a third baseband frequency signal; And
And a fourth baseband processor configured to convert the fourth intermediate frequency signal tuned from the second dual tuner into a fourth baseband frequency signal. The method according to any one of claims 2 to 5, wherein the quad module tuner,
An external chassis formed at a predetermined height along an edge of the substrate module to protect a plurality of circuit parts formed in the substrate module and inserted into and coupled to the high frequency input terminal and the high frequency output terminal;
A plurality of inner chassis formed between each of the plurality of circuit parts formed in the substrate module and connected to the external chassis to shield signal interference between the plurality of circuit parts; And
Quad module tuner including a plurality of ground pins formed to correspond to the circuit portion at a predetermined height along the outer chassis edge and inserted into the substrate module to dissipate heat generated from each circuit portion formed in the substrate module. . The method of claim 6, wherein the plurality of internal chassis,
A first internal chassis formed between the filter and the low noise amplifier;
A second internal chassis formed between the low noise amplifier and the first and second dual tuning units;
A tuning unit internal chassis formed between the first dual tuning unit and the second dual tuning unit;
A third internal chassis formed between the first and second dual tuning units and the first and second dual demodulators;
And a quad module tuner including a demodulator internal chassis formed between the first dual demodulator and the second dual demodulator. The method of claim 6, wherein the plurality of ground pins,
A first ground pin for dissipating heat generated from the first dual tuning unit;
A second ground pin dissipating heat generated from the first dual demodulator;
A third ground pin dissipating heat generated from the low noise amplifier;
Fourth and fifth ground pins for dissipating heat generated from the first dual tuning unit;
Sixth and seventh ground pins for dissipating heat generated from the second dual demodulator;
An eighth ground pin that fixes one side of the substrate module and releases heat generated from the filter; And
And a ninth ground pin that fixes the other side of the substrate module and releases heat generated from the second dual tuning unit or the second dual demodulation unit according to a position. The quad module tuner according to any one of claims 2 to 5, wherein the first dual tuning unit and the second dual tuning unit independently perform channel tuning. The quad module tuner according to any one of claims 2 to 5, wherein the first dual demodulator and the second dual demodulator perform independently tuned channel signal demodulation.

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