KR101296628B1 - Display device and method for fabricating of the same - Google Patents

Abstract

The present invention relates to a display device and a method of manufacturing the same, which include a plurality of device forming parts inside the display panel to form a plurality of semiconductor devices to simplify the manufacturing process of the display device and reduce manufacturing costs. A display panel having lines and a plurality of gate lines, a plurality of data integrated circuits mounted on one side of the display panel to supply image signals to the data lines, and embedded on one side of the display panel; And a plurality of device forming parts generating or converting and outputting control signals for controlling the data integrated circuit.

Element Formation, Data Pads, Capacitors, Resistors

Description

Display device and method for fabrication of the same

1 is a block diagram showing a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating in detail a region A including the element forming unit illustrated in FIG. 1. FIG.

3 is a cross-sectional view illustrating a III-III ′ section of the first capacitor illustrated in FIG. 2.

＊ Description of symbols for main parts of the drawings ＊

10 TFT array substrate 20 liquid crystal panel

30: gate integrated circuit 40: data integrated circuit

50: timing controller 60: motherboard

70: element forming unit 80: control signal transmission film

The present invention relates to a display device and a method of manufacturing the same, which include a plurality of device forming parts inside the display panel to form a plurality of semiconductor devices to simplify the manufacturing process of the display device and reduce manufacturing costs.

Recently, various flat panel display devices that can reduce weight and volume, which are disadvantages of cathode ray tubes, have emerged. Examples of such flat panel display devices include a liquid crystal display, a field emission display, a plasma display panel, and a light emitting display.

Among the flat panel displays, liquid crystal displays are actively applied to notebooks, desktop monitors, and mobile terminals due to their excellent resolution, color display, and image quality.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel having a liquid crystal cell, a backlight unit for applying light to the liquid crystal panel, and a driving circuit for driving the liquid crystal cell.

Here, the driving circuit includes a drive integrated circuit for driving the liquid crystal cell, and a tape carrier package and a chip on film according to a method of connecting the driving integrated circuit to the liquid crystal panel. ) And chip on glass (hereinafter referred to as 'COG').

A liquid crystal display using a conventional COG method will be described below.

Conventional liquid crystal displays have a liquid crystal panel in which pixel cells are formed for each region defined by a plurality of data lines and a plurality of gate lines, and a plurality of data mounted on a first side of the liquid crystal panel to supply image signals to data lines. An integrated circuit, a data circuit film for transmitting a data driving signal to each of the plurality of data integrated circuits, a plurality of gate integrated circuits mounted on a second side of the liquid crystal panel to supply gate pulses to gate lines, and a plurality of gates And a main circuit board having a gate circuit film for supplying a gate driving signal to each integrated circuit, and a controller for supplying gate and data control signals to the gate integrated circuit and the data integrated circuit.

The liquid crystal panel is composed of a lower substrate and an upper substrate bonded to each other. In this case, a liquid crystal layer is formed between the lower substrate and the upper substrate, and a spacer is formed to maintain a constant gap between the lower substrate and the upper substrate.

A color filter, a common electrode, a black matrix, and the like, which are not shown, are formed on the upper substrate. Here, the common electrode may be formed on the lower substrate.

The lower substrate includes a plurality of data lines and a plurality of gate lines formed to cross each other, a thin film transistor formed in a region defined by the plurality of data lines and the plurality of gate lines, and a pixel cell connected to the thin film transistor. The thin film transistor supplies the image signal from the data line to the pixel cell in response to the gate pulse from the gate line. Since the pixel cell is composed of the common electrode facing the liquid crystal layer and the pixel electrode connected to the thin film transistor, the pixel cell can be equivalently expressed as a liquid crystal capacitor. Further, the pixel cell includes a storage capacitor for holding the image signal charged in the liquid crystal capacitor until the next image signal is charged.

A data pad portion connected to each of the plurality of data lines is formed on the first side of the lower substrate, and a gate pad portion connected to each of the plurality of gate lines is formed on the second side of the lower substrate.

The data pad unit includes a plurality of data pads connected to the data circuit film, a plurality of data links connected to each of the data lines, and a data integrated circuit mounting region provided between the data pads and the data links.

The gate pad part includes a plurality of gate pads connected to the gate control signal transmission film, a plurality of gate links connected to each of the gate lines, and a gate driving integrated circuit mounting region provided between the gate pads and the gate link.

The data circuit film is connected to a plurality of data pads provided on the lower substrate to supply data signals, data control signals, and data driving power from outside to each data integrated circuit. In this case, the data circuit film is a flexible printed circuit film and is electrically connected to the plurality of data pads by an anisotropic conductive film.

The gate circuit film is connected to a plurality of gate pads provided on the lower substrate to supply gate control signals and gate driving power from the outside to each gate integrated circuit. At this time, the gate circuit film is electrically connected to the plurality of gate pads by the anisotropic conductive film as the flexible printed circuit film.

Each of the plurality of data integrated circuits is mounted in each data integrated circuit mounting area of the data pad unit. Each data integrated circuit receives a data driving signal, that is, a data signal, a data control signal, and a data driving power, from a controller through a data circuit film and a main board. Each data integrated circuit converts the data signal into an image signal in accordance with the data control signal and supplies the data signal to the data line through a plurality of data links. Each of the plurality of data integrated circuits supplies an image signal to n data lines of the plurality of data lines.

Each of the plurality of gate integrated circuits is mounted in each gate integrated circuit mounting area of the gate pad part. Each gate integrated circuit receives a gate driving signal, that is, a gate control signal and a gate driving power, from a controller through a gate circuit film and a main board. Each gate integrated circuit generates a gate pulse according to a gate control signal and supplies the gate pulse to the gate line through a plurality of gate links. Each of the plurality of gate integrated circuits supplies a gate pulse to gate lines of m units among the plurality of gate lines.

The controller is mounted on the main board to align the source data from the outside to be suitable for driving the liquid crystal panel to generate a data signal. The controller generates a data control signal for controlling the driving timing of each data integrated circuit and a gate control signal for controlling the driving timing of each gate integrated circuit.

However, the liquid crystal display device using the conventional COG method configured as described above is provided with elements for converting a plurality of gate and data control signals and a plurality of signals such as data signals and gate pulses supplied to the liquid crystal panel. Specifically, a plurality of capacitors are provided for removing the pulse width, amplitude, and noise for the plurality of signals. These capacitors are formed embedded in the motherboard in which the control unit is built. Therefore, the margin on which the capacitors are formed on the main board must be secured, which is complicated because the manufacturing process is different from that of the liquid crystal panel. In addition, the capacitors formed on the main board cause the manufacturing cost of the liquid crystal display to increase.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object thereof is to provide a flat panel display device having a plurality of element forming parts inside the display panel to simplify the manufacturing process of the display device and reduce the manufacturing cost. .

A display device according to the present invention for achieving the above object is a display panel having a plurality of data lines and a plurality of gate lines, and a plurality of display panels mounted on one side of the display panel to supply an image signal to the data lines And a plurality of device forming parts embedded in one side of the display panel and generating or converting and outputting control signals for controlling the display panel and the data integrated circuit.

In addition, the manufacturing method of the display device according to the present invention for achieving the above object comprises the steps of: forming at least one data pad having a different area and shape in the liquid crystal panel, Forming an element forming material on the at least one data pad, and forming a transparent electrode on the element forming material.

Hereinafter, a flat panel display device according to an embodiment of the present invention having the above characteristics will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

The liquid crystal display shown in FIG. 1 includes a liquid crystal panel 20 in which pixel cells are formed in a region defined by a plurality of data lines and a plurality of gate lines on a TFT array substrate 10, and a liquid crystal panel 20 of the liquid crystal panel 20. A plurality of data integrated circuits 40 mounted on one side and supplying image signals to the data lines according to the data control signal, and mounted on the second side of the liquid crystal panel 20 to the gate lines according to the gate control signal. The main board includes a plurality of gate integrated circuits 30 for supplying gate pulses and a timing controller 50 for generating data and gate control signals for controlling each of the plurality of data and gate integrated circuits 40 and 30. 60 and a plurality of element forming parts 70 formed inside the liquid crystal panel 20 to convert or generate control signals of the liquid crystal panel 20 and a plurality of data and gate integrated circuits 40 and 30; Between the liquid crystal panel 20 and the main board 60 And a control signal transmission film 80 connected to transmit data and gate control signals from the main board 60 to the liquid crystal panel 20.

The liquid crystal panel 20 is composed of a TFT array substrate 10 and a color filter substrate bonded together to face each other. At this time, a liquid crystal layer is formed between the TFT array substrate 10 and the color filter substrate, and a spacer is formed to keep the gap between the TFT array substrate 10 and the color filter substrate constant.

A color filter, a common electrode, a black matrix, and the like are formed on a color filter substrate (not shown). Here, the common electrode may be formed on the TFT array substrate 10.

The TFT array substrate 10 includes a plurality of data lines and a plurality of gate lines formed to cross each other, a thin film transistor formed in a region defined by the plurality of data lines and a plurality of gate lines, and a pixel cell connected to the thin film transistor. It includes. The thin film transistor supplies the image signal from the data line to the pixel cell in response to the gate pulse from the gate line. Since the pixel cell is composed of the common electrode facing the liquid crystal layer and the pixel electrode connected to the thin film transistor, the pixel cell can be equivalently expressed as a liquid crystal capacitor. Further, the pixel cell includes a storage capacitor for holding the image signal charged in the liquid crystal capacitor until the next image signal is charged.

Then, on the first side of the TFT array substrate 10, a data pad portion 81 connected to each of the plurality of data integrated circuits 40 is formed. The TFT array substrate 10 is provided with a plurality of data pads (DAPs) connected to the control signal transmission film 80 and connected to each of the plurality of data integrated circuits 40.

The main board 60 includes a timing controller 50 for supplying a data signal to each data integrated circuit 40 and controlling each data integrated circuit 40 and each gate integrated circuit 30.

The timing controller 50 generates a data signal by aligning source data from the outside to be suitable for driving the liquid crystal panel 20. In addition, the timing controller 50 generates a data control signal for controlling the driving timing of each data integrated circuit 40 and a gate control signal for controlling the driving timing of each gate integrated circuit 30.

The element forming unit 70 is formed by being integrated in the liquid crystal panel 20 when the TFT array substrate 10 is formed. In the device forming unit 70, a plurality of capacitors are formed to remove pulse width, amplitude, and noise with respect to the liquid crystal panel 20 and the control signals of the plurality of data and gate integrated circuits 40 and 30. The device forming unit 70 will be described in detail later with reference to the drawings.

The control signal transmission film 80 includes a connection part CNT protruding from one side and connected to the main board 60, and a data connection part connected to a plurality of data pads DAP provided in the data pad part 81. do. In this case, the control signal transmitting film 80 may be a flexible printed circuit film.

The control signal transmission film 80 includes a data signal wiring DSL for transmitting a data signal, a control signal wiring for transmitting data and a gate control signal, and a driving power signal wiring for transmitting driving power. Is formed. Each output pad of the control signal transmission film 80 is electrically connected to the data pad DAP of the liquid crystal panel 20 by an anisotropic conductive film.

FIG. 2 is a configuration diagram illustrating a region A including the element formation unit illustrated in FIG. 1 in detail.

The element forming unit 70 shown in FIG. 2 is in contact with at least one of the data pads DAP1 to DAP6, respectively, and has first and second capacitors Cap1 and Cap2 formed in different areas, and the first and second capacitors. The first to third contact holes CH1 to CH3 connect the first side terminals of the caps 1 and 2 to the second and fifth data pads DAP2 and DAP5, respectively.

Here, the first and second data pads DAP1 and DAP2 and the fourth and sixth data pads DAP4 and DAP6 for forming the first and second capacitors Cap1 and Cap2 are the third and fifth data pads. It is formed longer than (DAP3, DAP5). In addition, the first and second data pads DAP1 and DAP2 are formed longer than the fourth and sixth data pads DAP4 and DAP6, and the first data pad DAP1 is formed in a b-shaped bold shape.

Accordingly, organic insulating layers are provided in the first and second data pads DAP1 and DAP2 and the fourth and sixth data pads DAP4 and DAP6 that are formed longer than the third and fifth data pads DAP3 and DAP5. First and second capacitors Cap1 and Cap2 are formed. That is, the organic insulating layer is formed in the region protruding longer than the third and fifth data pads DAP3 and DAP5.

In addition, a transparent electrode is formed on the first to third contact holes CH1 to CH3 and the organic insulating layer to electrically connect the second data pad DAP2 and the first side terminal of the first capacitor Cap1. In addition, the sixth data pad DAP6 and the first side terminal of the second capacitor Cap2 are electrically connected to each other.

Meanwhile, the second side terminals of the first and second capacitors Cap1 and Cap2 are in direct contact with the first and fourth data pads DAP1 and DAP4 through the organic insulating layer to form a capacitor region using the organic insulating layer. do.

In detail, the first capacitor Cap1 is connected to the first and second data pads DAP1 and DAP2 with a plurality of data pads (not shown) interposed therebetween. The area in which the first capacitor Cap1 is formed may be the same as that of the plurality of data pads DAP not shown between the first side terminal and the second side terminal.

The second capacitor Cap2 has a first side terminal and a second side terminal connected to the fourth and sixth data pads DAP4 and DAP6 with the fourth data pad DAP4 interposed therebetween. The area in which the second capacitor Cap2 is formed is formed only in a portion formed longer than the fifth data pad DAP5 among the fourth and sixth data pads DAP4 and DAP6. That is, it is formed in a small capacity.

In FIG. 2, only the first and second capacitors Cap1 and Cap2 have been described as an example, but the plurality of element forming units 70 include a large capacity and a small capacity capacitor to have different capacities according to the conversion methods of the respective control signals. Can form a capacitor.

In addition to forming a plurality of contact holes to connect the plurality of data pads with the terminals of the first side of the capacitors, a laser welding process may be performed to connect the first side terminals of the plurality of capacitors to the respective data pads. Can be connected to

3 is a cross-sectional view illustrating a III-III ′ section of the first capacitor illustrated in FIG. 2.

The first capacitor Cap1 shown in FIG. 3 is formed on the first and second data pads DAP1 and DAP2 formed on the TFT array substrate 10 and the first and second data pads DAP1 and DAP2. The transparent electrode formed on the entire surface of the organic insulating layer 31 including the organic insulating layer 31, the second contact hole CH2 formed to expose the second data pad DAP2, and the second contact hole CH2. 32).

Referring to Figure 3 describes a method of forming a capacitor according to an embodiment of the present invention.

First, a data pad metal layer is formed on a TFT array substrate 10 through a deposition method such as plasma enhanced chemical vapor deposition (PECVD) or sputtering. Here the data pad metal layer is formed identical to the source / drain metal layer of the TFT.

Specifically, in the capacitor according to the present invention, a part of the TFT forming process of the TFT array substrate 10 is performed in the same manner. That is, when the TFT array substrate 10 is formed, first and second capacitors Cap1 and Cap2 are also formed integrally therewith. Accordingly, the source / drain metal layer used for forming the metal layer for forming the TFT and the wiring is formed of the data pad metal layer. As the source / drain metal layer, that is, the data pad metal layer, chromium (Cr), titanium (Ti), tantalum (Ta), or the like is used.

Thereafter, a photoresist pattern is formed by a photolithography process using a mask. The data pad metal layer is patterned by a wet etching process using a photoresist pattern to form first and second data pads DAP1 and DAP2.

Next, the organic insulating layer 31 is formed on the entire surface of the TFT array substrate 10 including the first and second data pads DAP1 and DAP2 by a deposition method such as PECVD or sputtering. Herein, the organic insulating layer 31 is a material layer formed as a protective film, and an organic insulating material such as an acryl-based organic compound having a low dielectric constant, BCB, or PFCB is used.

 Thereafter, the second contact hole CH2 is formed to expose the second data pad DAP2 by a photolithography process and an etching process, and is formed on the entire surface of the organic insulating layer 31 including the second contact hole CH2. The transparent electrode 32 is formed.

As the transparent electrode material, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), tin oxide (TO), and the like are used. Alternatively, in the case of a semi-transmissive display device, the display device may be formed of the same reflective metal layer as the reflective electrode of the image display area.

According to the present invention, a plurality of capacitors Cap1 and Cap2 including a plurality of data pads DAP1 to DAP6, an organic insulating layer 32, and a transparent electrode 32 are formed in the liquid crystal panel 20. Form.

Accordingly, the liquid crystal panel may be formed by using the first and second capacitors Cap1 and Cap2 provided in the liquid crystal panel 20 without forming the first and second capacitors Cap1 and Cap2 on the main board 60. 20 and signals supplied to the gate and data integrated circuits 30 and 40 may be converted. That is, control signals may be smoothed using the first and second capacitors Cap1 and Cap2 formed in the non-display area of the liquid crystal panel 20 according to the present invention, and the pulse width and amplitude may be converted or noise may be removed. Can be.

Meanwhile, in the exemplary embodiment of the present invention, only the plurality of capacitors Cap1 and Cap2 have been described as an example. In addition to the plurality of capacitors Cap1 and Cap2, the organic insulation is provided between the data pads DAP1 to DAP6 and the transparent electrode 32. A plurality of resistance elements may be formed by forming amorphous silicon, polysilicon, or the like instead of the layer 31.

That is, in the device forming unit 70 according to the present invention, semiconductor devices such as a plurality of resistors including a plurality of capacitors Cap1 and Cap2 may be integrated.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

As described above, the display device and the manufacturing method thereof according to the present invention have the following effects.

The present invention forms a plurality of semiconductor devices by providing a plurality of device forming parts inside the display panel. Accordingly, the manufacturing process of the display device can be simplified and the manufacturing cost can be reduced.

Claims (14)

A display panel in which a plurality of data lines and a plurality of gate lines are formed; A plurality of data integrated circuits mounted on one side of the display panel to supply image signals to the data lines; And A plurality of element forming parts embedded in one side of the display panel to generate or convert and output control signals for controlling the display panel and the data integrated circuit; At least one capacitor is formed in the element forming portion, The at least one capacitor First and second data pads formed with at least one data pad therebetween and longer than the at least one data pad, An organic insulating layer formed on each of the first and second data pads and formed only on a portion formed longer than the at least one data pad, and And a transparent electrode formed on each of the organic insulating layers so as not to overlap the at least one data pad and electrically connecting the organic insulating layers. delete delete The method of claim 1, The at least one capacitor And at least one contact hole is formed to pass through the organic insulating layer so that the transparent electrode and the at least one data pad are electrically connected to each other. The method of claim 1, In the element forming unit At least one resistance element is further formed. 6. The method of claim 5, The at least one resistor element At least one third data pad having a different area and shape, A polysilicon layer formed on the at least one third data pad, and And a transparent electrode formed on the polysilicon layer. delete delete In the method of forming a plurality of element formation portion in the liquid crystal panel, Forming at least one capacitor in the element forming portion, The at least one capacitor forming step Forming at least one data pad with the first and second data pads longer than the at least one data pad, Forming an organic insulating layer on each of the first and second data pads, each of which is formed longer than the at least one data pad, and And forming a transparent electrode on each of the organic insulating layers so as not to overlap the at least one data pad to electrically connect the respective organic insulating layers. The method of claim 9, Forming the transparent electrode on the organic insulating layer And forming at least one contact hole in the organic insulating layer to expose one of the data pads of the first and second data pads. delete delete The method of claim 1, One of the data pads of the first and second data pads is And a portion formed longer than the at least one data pad in between is formed to be thicker in the shape of “a”. The method of claim 9, One of the data pads of the first and second data pads is And a portion formed longer than the at least one data pad interposed therebetween is formed to be thicker in a "-" shape.

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