KR101284167B1 - An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System - Google Patents

An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System Download PDF

Info

Publication number
KR101284167B1
KR101284167B1 KR1020110114809A KR20110114809A KR101284167B1 KR 101284167 B1 KR101284167 B1 KR 101284167B1 KR 1020110114809 A KR1020110114809 A KR 1020110114809A KR 20110114809 A KR20110114809 A KR 20110114809A KR 101284167 B1 KR101284167 B1 KR 101284167B1
Authority
KR
South Korea
Prior art keywords
solar cell
wafer
resistivity
semi
zone
Prior art date
Application number
KR1020110114809A
Other languages
Korean (ko)
Other versions
KR20130049662A (en
Inventor
조진형
백성선
Original Assignee
에스티엑스 솔라주식회사
금오공과대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에스티엑스 솔라주식회사, 금오공과대학교 산학협력단 filed Critical 에스티엑스 솔라주식회사
Priority to KR1020110114809A priority Critical patent/KR101284167B1/en
Publication of KR20130049662A publication Critical patent/KR20130049662A/en
Application granted granted Critical
Publication of KR101284167B1 publication Critical patent/KR101284167B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864Annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Photovoltaic Devices (AREA)

Abstract

본 발명은 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법에 대한 것으로, 통상의 솔라셀 제조공정에 있어 특성검사공정에서 측정된 반가공 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 층별화한 다음 각 계층에 대하여 서로 다른 소성조건으로 가공하되, 보다 상세하게는 저항률의 범위가 1.5 ~ 2.5Ω·㎝에 속하는 제1대역(A)의 웨이퍼는 760 ~ 780℃의 온도에서, 2.5 ~ 3.5Ω·㎝에 속하는 제2대역(B)의 웨이퍼는 740 ~ 760℃의 온도에서, 0.5 ~ 1.5Ω·㎝에 속하는 제3대역(C)의 웨이퍼는 780 ~ 800℃의 온도에서 각각 5 ~ 10초간 소성하는 것을 특징으로 하는 공정관리방법을 제공함으로써, 규격외 반제품의 폐기로 인한 손실을 줄임과 아울러 완성제품의 품질을 향상할 수 있음에 따라 궁극적으로는 생산성을 극대화할 수 있는 '솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법'에 관한 것이다.The present invention relates to a process control method for efficient fabrication for solar cell grade improvement, wherein the wafers are layered according to the resistivity characteristics of the semi-processed wafers measured in the characteristic inspection process in the conventional solar cell manufacturing process. Processed under different firing conditions for the layer, more specifically, the wafer in the first zone (A) having a resistivity in the range of 1.5 to 2.5 Pa · cm, at a temperature of 760 to 780 ° C., at 2.5 to 3.5 Pa · cm Wafers in the second zone (B) belonging to the baking in the temperature of 740 ~ 760 ℃, the wafers in the third zone (C) belonging to 0.5 ~ 1.5 Ω · cm are baked for 5 to 10 seconds at a temperature of 780 ~ 800 ℃, respectively By providing a process control method, it is possible to reduce the loss due to the disposal of semi-finished products outside the standard and to improve the quality of the finished product, thereby ultimately maximizing productivity. efficiency It relates to a method for process control in manufacturing.

Description

솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법{An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System}{An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System}

본 발명은 공정관리방법에 관한 것으로, 특히 N형 확산공정 및 소성공정을 포함하는 솔라셀 제조공정에 있어서, N형 확산공정 후 측정되는 반가공 웨이퍼의 특성치에 따라 상기 웨이퍼를 층별화한 다음 각 계층에 대한 최적의 소성조건을 확립함으로써, 종래 N형 확산공정 후 폐기되던 규격외품의 공차가 확장되어 상기 규격외품이 소성가공 후 최종 제품의 품질기준을 만족할 수 있도록 할 뿐만 아니라, 규격품에 대해서는 소성가공 후 그 등급이 향상되도록 함으로써, 궁극적으로는 생산성을 극대화할 수 있는 '솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법'에 관한 것이다.
The present invention relates to a process control method. In particular, in a solar cell manufacturing process including an N-type diffusion process and a firing process, the wafers are layered according to characteristics of semi-processed wafers measured after the N-type diffusion process. By establishing the optimum firing conditions for the layers, the tolerances of out-of-standard products that were discarded after the conventional N-type diffusion process can be extended, so that the out-of-standard products can satisfy the quality standards of the final product after plastic processing, and also fire for the standard products. By improving the grade after processing, it ultimately relates to a 'process control method for efficient manufacturing for improving the solar cell grade' that can maximize productivity.

최근 대체에너지에 대한 관심이 높아지면서 자원고갈 및 환경오염의 문제가 없는 태양에너지가 주목받고 있고, 상기의 태양에너지는 솔라셀(solar cell)을 이용하여 태양광을 전기에너지로 변환시켜 사용하는 방법이 일반적이라 할 수 있는바, 하기에서 솔라셀에 대하여 보다 구체적으로 살펴본다.
Recently, with increasing interest in alternative energy, solar energy has been attracting attention without problems of resource depletion and environmental pollution. The solar energy is a method of converting sunlight into electrical energy using a solar cell. This general can be said, in more detail with respect to the solar cell in the following.

솔라셀은 반도체의 성질을 이용한 태양 전지로서, 기본적으로 P형 반도체와 N형 반도체의 접합 구조로 이루어지는데, 솔라셀에 빛이 입사되면 빛과의 상호작용에 의해 (-)전하를 띤 전자와 (+)전하를 띤 정공이 발생하여 이들이 이동하면서 전류가 흐르게 된다. 이를 광기전력효과(photovoltaic effect)라 하는데, 태양전지를 구성하는 P형 및 N형 반도체 중 전자는 N형 반도체 쪽으로, 정공은 P형 반도체 쪽으로 끌어 당겨져 각각 N형 반도체 및 P형 반도체와 접합된 전극으로 이동하게 되고, 이 전극을 전선으로 연결하면 전기가 흐르게 되어 전력을 얻을 수 있다.
A solar cell is a solar cell using the properties of a semiconductor, and basically consists of a junction structure of a P-type semiconductor and an N-type semiconductor. When light is incident on the solar cell, electrons having negative charges are formed by interaction with the light. Positively charged holes are generated, which flow through them as they move. This is called a photovoltaic effect. Among the P-type and N-type semiconductors constituting the solar cell, the electrons are attracted to the N-type semiconductor and the holes are drawn to the P-type semiconductor, and are bonded to the N-type semiconductor and the P-type semiconductor, respectively. When the electrode is connected with a wire, electricity flows to obtain power.

그리고 솔라셀은 전면전극, 반사방지막, N형 에미터, P형 베이스, 이면전극층이 순차적으로 적층된 구조로 이루어지는데, 이와 같은 구조를 갖는 통상적인 솔라셀의 개략적인 제조공정을 도 1을 참고하여 살펴보면, 종래 솔라셀 제조공정은 규소(Si) 원소만을 고순도로 정제한 폴리실리콘을 원료로 하여 6n~11n까지 정제된 실리콘을 잉곳(Ingot)으로 성장 소결하는 잉곳성형공정(S100)과, 상기 잉곳을 가공하여 단/다결정의 웨이퍼를 형성하는 웨이퍼가공공정(S200)과, 상기 가공된 웨이퍼에 N형 도펀트를 확산하여 광전변환층을 형성하는 N형 확산공정(S300)과, 상기 N형 반도체가 확산된 반가공된 웨이퍼의 특성으로서 저항률과 라이프타임(Life time)을 측정하는 특성검사공정(S400)을 포함하며, 이때 저항률과 라이프타임이 소정의 규격에 미달하는 반제품(이하 '규격외품'이라 함)은 제조공정에서 배제된다.
In addition, the solar cell has a structure in which a front electrode, an antireflection film, an N-type emitter, a P-type base, and a back electrode layer are sequentially stacked. Referring to FIG. 1, a schematic manufacturing process of a conventional solar cell having such a structure is shown. In the conventional solar cell manufacturing process, an ingot forming step (S100) of growing and sintering silicon refined to 6 to 11 n ingots using polysilicon refined with high purity of silicon (Si) element as a raw material, and the A wafer processing step (S200) for processing an ingot to form a single / polycrystalline wafer, an N-type diffusion step (S300) for diffusing an N-type dopant on the processed wafer to form a photoelectric conversion layer, and the N-type semiconductor Is a characteristic of a semi-processed wafer with diffused characteristics, and includes a characteristic inspection process (S400) for measuring resistivity and life time, wherein the semi-finished product having a resistivity and life time below a predetermined standard The term oepum ') is excluded from the manufacturing process.

이후, 규격에 준하는 선별된 반제품(이하 '규격품'이라 함)은 반사막과 함께 전극을 도포하여 전면전극층과 이면전극층을 형성하는 반사막/전극 도포공정(S500)과, 상기 도포공정을 마친 규격품을 고온으로 소결하여 솔라셀으로서의 기능을 활성화하는 소성공정(S600)과, 상기 소성가공된 솔라셀의 발생전류 및 발생전압과 최대전압의 범위를 측정하여 양품과 불량품을 선별하는 품질검사공정(S700)을 거쳐 완제품으로 생산되어 진다.
Subsequently, the selected semi-finished product (hereinafter referred to as 'standard product') according to the standard is coated with an electrode together with a reflective film to form a front electrode layer and a back electrode layer, a reflective film / electrode application process (S500), and a standard product having finished the application process at a high temperature. Sintering process to activate the function as a solar cell (S600), and the quality inspection process (S700) to select the good and defective products by measuring the range of the generated current, the generated voltage and the maximum voltage of the plastic processed solar cell It is produced as a finished product.

한편, 상기 종래 솔라셀 제조공정에 있어 특성검사공정(S400)을 도 2를 참고하여 더욱 상세히 살펴보면, 특성검사공정(S400)에서는 N형 도펀트를 확산시킨 반가공된 웨이퍼에 대한 중간평가 기준으로서 상기 웨이퍼의 일정단위(㎝)당 전도율을 나타내는 라이프타임이 1㎲ 이상에 이르지 않거나, 특히 일정단위(㎝)당 전기저항을 나타내는 저항률의 범위가 3Ω·㎝ 이내의 범위에 속하지 않는 약 15% 내외의 규격외품은 폐기하고 위 기준에 준하는 규격품에 대해서만 다음 공정을 수행하는데, 이는 최종 완제품으로서 솔라셀의 품질을 결정하는 발생전류량이 전적으로 상기 반제품 웨이퍼의 저항률 특성치에 의하여 결정되는 것은 아니지만 상당히 밀접한 상관관계(相關關係)에 있기 때문이며, 이에 따라 종래에는 반사막/전극 도포공정(S500) 및 소성공정(S600)을 수행하기에 앞서 특성검사공정(S400)에서 저항률을 측정하고 소정의 기준에 미달하는 규격외품의 경우에는 이후 소성공정(S600)을 거치더라도 완제품 솔라셀의 발생전류량이 최종 품질기준에 미치지 못하는 것으로 간주하여 제조공정에서 배제시킴으로써 최종 공정에서의 불량품 양산에 따른 부담을 줄일 수 있었다.
Meanwhile, in the conventional solar cell manufacturing process, the characteristic inspection process S400 will be described in more detail with reference to FIG. 2. In the characteristic inspection process S400, the intermediate evaluation criteria for the semi-processed wafer in which the N-type dopant is diffused are described above. The lifetime of the conductivity per unit of cm of the wafer does not reach 1 ㎲ or more, and the resistivity of the electric resistance of the unit of cm is not more than 3 Ω · cm. Discard the out-of-standard product and perform the following process only for the standard product that meets the above criteria, which means that the amount of generated current that determines the quality of the solar cell as the final finished product is not entirely determined by the resistivity characteristics of the semi-finished wafer, but has a very close correlation ( This is because the reflection film / electrode coating step (S500) and the firing step (S600) are conventionally performed. In the case of out-of-standard products whose resistivity is measured in the characteristic inspection process (S400) and does not meet a predetermined standard before performing the process, the generated current amount of the finished solar cell does not meet the final quality standard even after the firing process (S600). By excluding them from the manufacturing process, the burden of mass production of defective products in the final process could be reduced.

그러나, 상기와 같은 솔라셀 제조에 있어서의 종래 공정관리방법은, 불량품으로 양산될 가능성이 있는 반제품을 제조공정의 중간 단계에서 배제시켜 이후의 공정에 대한 부담을 줄일 수 있을 뿐, 전체 제조공정에 있어서의 불량품 발생량을 줄이는 것이 아님은 물론이고, 상기 특성검사공정(S400)에 앞선 N형 확산공정(S300)의 경우에도 이미 전체 공정의 70~80%를 진행한 상태이므로 고가의 자재를 폐기처분하는 결과에 이르러 상당한 경제적 손실을 피할 수 없는 문제점이 있었다.
However, such a conventional process control method for manufacturing a solar cell can reduce the burden on subsequent processes by eliminating semi-finished products that may be mass produced as defective products at an intermediate stage of the manufacturing process. Of course, it does not reduce the quantity of defective products in the process, and even in the case of the N-type diffusion process (S300), which has already gone through the characteristic inspection process (S400), 70-80% of the entire process has already been disposed of, thus disposing of expensive materials. As a result, significant economic losses were inevitable.

또한, 저항률 특성이 소정의 규격에 준하는 85% 내외의 반가공 웨이퍼의 경우, 그 저항률의 분포가 도 2에 도시된 바와 같이 규격범위 내에서 넓게 산포되어 있음에도, 종래에는 일률적인 소성조건을 거쳐 솔라셀을 제조함에 따라 완성된 솔라셀의 품질기준으로서 발생전류의 분포 또한 최상급에 집중되지 못하고 여러 등급의 품질로 넓게 산포되는 문제점이 있었다.
In addition, in the case of a semi-processed wafer having a resistivity characteristic of about 85% that conforms to a predetermined standard, although the distribution of the resistivity is widely distributed within the standard range as shown in FIG. 2, conventionally, the solar cell is subjected to uniform firing conditions. As the cell was manufactured, there was a problem in that the distribution of generated current as a quality standard of the completed solar cell was also not widely concentrated in the highest grade and widely distributed in various grades of quality.

한편으론, 보다 향상된 품질의 솔라셀을 제조하기 위하여 신소재를 개발하거나 전혀 새로운 제조방법을 구상하는 것과 같은 다양한 연구개발이 이루어지고 있지만, 이와 별개로 기존의 솔라셀 제조시스템 하에서 저렴한 투자비용으로 보다 향상된 품질의 솔라셀을 제조할 수 있도록 하는 연구개발의 필요성 또한 절실하다.
On the other hand, various researches and developments are being carried out such as developing new materials or envisioning a completely new manufacturing method to manufacture solar cells of higher quality. There is also an urgent need for research and development that enables the manufacture of quality solar cells.

본 발명은 상기와 같은 종래 문제점을 해결하기 위한 것으로, N형 도펀트를 확산시킨 반가공된 웨이퍼를 고온으로 소성하여 활성화함에 있어 그 소성온도 및 소성시간의 변화에 따라 최종 완제품인 솔라셀의 발생전류량에 차이가 발생한다는 점에 착안하여, 상기 반가공된 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 층별화한 다음 각 계층에 대한 최적의 소성조건을 제공함으로써, 종래 규격을 만족하는 반제품에 대해서는 보다 향상된 품질을 갖는 솔라셀의 제조가 가능하고, 폐기되던 규격외품에 대해서는 그 규격범위가 확장되어 최종 솔라셀의 품질기준을 만족시킬 수 있어, 궁극적으로는 생산성을 극대화하는 데 본 발명의 목적이 있다.
The present invention is to solve the conventional problems as described above, the amount of generated current of the solar cell is the final product in accordance with the change in the firing temperature and firing time in the firing and activation of the semi-processed wafer diffused N-type dopant at high temperature In view of the fact that the difference occurs, the wafer is layered according to the resistivity characteristic value of the semi-finished wafer and then the optimum firing conditions for each layer are improved, thereby improving quality for semi-finished products that meet the conventional specification. It is possible to manufacture a solar cell having, and for the out-of-standard product that is discarded, the standard range can be extended to meet the quality standards of the final solar cell, ultimately, an object of the present invention to maximize productivity.

상기와 같은 목적을 달성하기 위한 본 발명에 따른 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법은, N형 확산공정, 특성검사공정, 반사막/전극 도포공정, 소성공정, 품질검사공정을 포함하는 솔라셀 제조공정에 있어서, 상기 특성검사공정에서 측정된 반가공 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 층별화하고, 상기 소성공정시 각 계층에 대하여 서로 다른 소성조건으로 가공함으로써, 규격외 반제품의 폐기로 인한 손실을 줄임과 아울러 완성제품의 품질을 향상할 수 있는 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법을 특징으로 한다.
Process management method for efficient manufacturing for improving the solar cell grade according to the present invention for achieving the above object, includes an N-type diffusion process, characteristic inspection process, reflecting film / electrode coating process, firing process, quality inspection process In the solar cell manufacturing process, the wafers are layered according to the resistivity characteristic values of the semi-processed wafers measured in the characteristic inspection step, and processed in different firing conditions for each layer during the firing step, thereby producing It features a process control method for efficient manufacturing to improve solar cell grade, which can reduce the loss due to disposal and improve the quality of the finished product.

그리고 본 발명은, 상기 반가공 웨이퍼를 층별화 함에 있어 저항률의 범위가 1.5 ~ 2.5Ω·㎝에 속하는 제1대역과, 2.5 ~ 3.5Ω·㎝에 속하는 제2대역과, 0.5 ~ 1.5Ω·㎝에 속하는 제3대역으로 층별화하고, 소성공정시 제1대역에 속하는 웨이퍼는 760 ~ 780℃의 온도에서 5 ~ 10초간 소성하고, 제2대역에 속하는 웨이퍼는 740 ~ 760℃의 온도에서 5 ~ 10초간 소성하며, 제3대역에 속하는 웨이퍼는 780 ~ 800℃의 온도에서 5 ~ 10초간 소성하는 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법에 다른 특징이 있다.
In the present invention, in the layering of the semi-finished wafer, the resistivity ranges from the first band belonging to 1.5 to 2.5 Pa · cm, the second band belonging to 2.5 to 3.5 Pa · cm, and from 0.5 to 1.5 Pa · cm The wafers belonging to the first zone are fired for 5 to 10 seconds at a temperature of 760 to 780 ° C, and the wafers belonging to the second zone are 5 to 5 at a temperature of 740 to 760 ° C. The wafer which is fired for 10 seconds and belongs to the third band has another feature in a process control method for efficient manufacturing for solar cell grade improvement which is fired for 5 to 10 seconds at a temperature of 780 to 800 ° C.

상기한 바와 같은 본 발명에 의하면, 저항률이 넓게 산포된 반제품 웨이퍼를 그 저항률에 따라 층별화한 다음 각 계층에 대한 최적의 소성조건을 제공함으로써, 완성된 솔라셀의 품질기준으로서 발생전류의 분포를 최상급으로 집중시켜 보다 균일하고 향상된 품질을 갖는 솔라셀의 제조가 가능할 뿐만 아니라, 종래 폐기되던 규격외 반가공 웨이퍼에 대해서는 그 규격범위가 확장되어 최종 솔라셀의 품질기준을 만족시킬 수 있으므로 고가의 자재에 대한 폐기를 최소화하여 경제적 손실을 예방하고, 궁극적으로는 솔라셀 제조공정의 생산성을 극대화하는 효과가 있다.
According to the present invention as described above, by dividing the semi-finished wafer with a large resistivity according to the resistivity, and then providing the optimum firing conditions for each layer, the distribution of the generated current as a quality standard of the finished solar cell It is not only possible to manufacture cells with more uniform and improved quality by concentrating at the highest level, but also to expand the standard range for semi-processed wafers that were discarded in the past, which can satisfy the quality standards of final solar cells. Minimizing waste disposal to prevent economic loss and ultimately maximize the productivity of the solar cell manufacturing process.

도 1은 종래 솔라셀 제조공정을 나타내는 순서도
도 2는 소성가공 이전의 웨이퍼 저항률 분포를 나타내는 분포도
도 3은 본 발명의 공정관리방법에 따른 솔라셀 제조공정을 나타내는 순서도
도 4는 본 발명에 있어 웨이퍼의 저항률 특성치에 따른 층별화 대역을 나타내는 저항률 분포도
도 5는 본 발명에 있어 최종 제품인 솔라셀의 품질등급을 비교한 도표
1 is a flow chart showing a conventional solar cell manufacturing process
2 is a distribution chart showing wafer resistivity distribution before plastic working;
3 is a flowchart showing a solar cell manufacturing process according to the process control method of the present invention.
Figure 4 is a resistivity distribution chart showing the layered band according to the resistivity characteristic value of the wafer in the present invention
Figure 5 is a table comparing the quality grade of the final product solar cell in the present invention

이하 본 발명에 따른 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법의 바람직한 실시예를 도 2 내지 도 5를 참고하여 살펴보되, 도 1과 동일한 구성은 설명의 중복을 피하고자 동일부호로 나타낸다.
Hereinafter, a preferred embodiment of a process control method for an efficient manufacturing for improving solar cell rating according to the present invention will be described with reference to FIGS. 2 to 5, wherein the same configuration as that shown in FIG. .

본 발명의 공정관리방법에 따른 솔라셀 제조공정은 도 3에 도시된 바와 같이 통상의 잉곳성형공정(S100), 웨이퍼가공공정(S200), N형 확산공정(S300), 특성검사공정(S400), 반사막/전극 도포공정(S500), 소성공정(S600) 및 품질검사공정(S700)를 포함하며, 상기 각 공정에 있어 특성검사공정(S400)은 N형 반도체를 확산시켜 반가공된 웨이퍼에 제품정보를 각인하는 마킹단계(S410)와 상기 마킹된 웨이퍼의 특성으로서 저항률 및 라이프타임을 검사하는 측정단계(S420) 및 측정된 반가공 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 분류하는 층별화단계(S430)를 포함한다.
Cell manufacturing process according to the process control method of the present invention is a conventional ingot forming process (S100), wafer processing process (S200), N-type diffusion process (S300), characteristic inspection process (S400) as shown in FIG. , Reflective film / electrode coating process (S500), firing process (S600) and quality inspection process (S700), each of which is a characteristic inspection process (S400) to diffuse the N-type semiconductor product on the semi-processed wafer Marking step of stamping information (S410), measuring step (S420) of checking the resistivity and life time as characteristics of the marked wafer and the layering step of classifying the wafer according to the measured resistivity characteristic value of the semi-finished wafer (S430) ).

상기 특성검사공정(S400)의 각 단계를 보다 구체적으로 살펴보면, 마킹단계(S410)는 N형 확산공정(S300)을 거친 폴리실리콘 웨이퍼에 통상의 고속 레이저마킹장치를 이용하여 고유번호 등을 각인함으로써 추후 해당 웨이퍼에 대한 제품정보를 식별가능토록 하는 단계로서, 전술한 레이저 마킹은 약 4인치의 단위 웨이퍼별로 실시하며 날짜 및 순번과 공정 등의 정보를 포함하도록 함이 바람직하다. 그리고 측정단계(S420)는 상기 레이저마킹장치와 인접한 위치에 다수의 접촉식 저항률 측정기 및 전도율 측정기를 구비하여 반제품 웨이퍼에 대한 저항률과 라이프타임을 측정하도록 하되, 상기 측정된 데이터는 마킹된 각 웨이퍼에 대한 제품정보를 기록할 수 있도록 한 별도의 데이터베이스에 저장하거나 또는 상기 웨이퍼에 직접 인쇄할 수도 있다. 또한, 층별화단계(S430)는 통상의 웨이퍼 정보 리더기를 배치함으로써 그 분류가 가능한바, 이로써 전술한 모든 웨이퍼는 자체의 이력을 갖게 되고 이를 이용하여 투입 자재의 층별화가 가능하다.
Looking at each step of the characteristic inspection step (S400) in more detail, the marking step (S410) is by stamping the unique number, etc. using a conventional high-speed laser marking device on the polysilicon wafer passed through the N-type diffusion process (S300) As a step of identifying product information on the wafer in the future, the above-described laser marking may be performed for each wafer of about 4 inches and include information such as date, order, and process. And measuring step (S420) is provided with a plurality of contact resistivity and conductivity meter at a position adjacent to the laser marking device to measure the resistivity and life time for the semi-finished wafer, the measured data is recorded on each marked wafer The product information may be stored in a separate database for recording or printed directly on the wafer. In addition, the layering step (S430) can be classified by placing a conventional wafer information reader, whereby all the above-described wafers have their own history, it is possible to layer the input material using this.

한편, 도 4의 저항률 분포도를 참고하여 웨이퍼의 저항률 특성치에 따른 층별화 대역을 구체적으로 살펴보면, 반가공된 웨이퍼의 저항률의 범위가 1.5 ~ 2.5Ω·㎝에 속하면 제1대역(A)으로, 2.5 ~ 3.5Ω·㎝에 속하면 제2대역(B)으로, 0.5 ~ 1.5Ω·㎝에 속하면 제3대역(C)으로 층별화함이 바람직한데, 상기 제1 내지 제3대역(A)(B)(C)은 본 발명에 있어 후술하는 소정공정 후 완제품 솔라셀의 발생전류량이 품질기준을 만족하는 범위와 같고, 상기 도 4의 분포도에 따르면 상기 제1 내지 제3대역(A)(B)(C)의 경우 기존의 반제품 웨이퍼에 대한 규격으로서 저항률의 규격상한선(USL, Upper Specification Limit)을 넘어선 대역에까지 그 규격범위(공차범위)가 확장됨을 알 수 있으며, 상기 규격범위의 확장에 따라 종래 규격범위에 미달하는 것으로 판정되어 폐기되던 약 15%의 규격외품 중 5~10%(도 4의 빗금 부분)를 규격품으로 가공할 수 있다.
Meanwhile, referring to the resistivity distribution chart of FIG. 4, the layering zone according to the resistivity characteristic value of the wafer is specifically described. When the resistivity of the semi-processed wafer is in the range of 1.5 to 2.5 Ω · cm, the first band A may be used. If it belongs to 2.5 to 3.5 Ω · cm it is preferable to layer into the second band (B), and if it belongs to 0.5 to 1.5 Ω · ㎝ to the third band (C), the first to third band (A) ( B) (C) is equal to the range in which the generated current amount of the finished solar cell after the predetermined process described later satisfies the quality standard, and according to the distribution diagram of FIG. 4, the first to third bands (A) and (B). ) (which can be seen that C) is a standard upper limit of the resistivity as a standard for a traditional semi-finished wafer (USL, U pper S pecification L imit) to far beyond the band the standard range (tolerance range) expansion cases, the standard range Out of about 15% of standard that was discarded because it was judged to be out of range of conventional standard due to expansion 5-10% (hatched part of FIG. 4) of the product can be processed into a standard product.

그리고 상기 웨이퍼의 저항률 특성치에 따른 층별화와 유기적으로 연계하여 저항률 규격범위의 확장이 가능토록 하는 소성공정(S600)은 상기 층별화에 따른 각 계층에 대하여 서로 다른 소성조건을 제공하는바, 제1대역(A)에 속하는 웨이퍼는 760 ~ 780℃의 온도에서 5 ~ 10초간 소성하고, 제2대역(B)에 속하는 웨이퍼는 740 ~ 760℃의 온도에서 5 ~ 10초간 소성하며, 제3대역(C)에 속하는 웨이퍼는 780 ~ 800℃의 온도에서 5 ~ 10초간 소성함이 바람직하다.
In addition, the sintering process (S600) which enables the expansion of the resistivity specification range in organic connection with the layering according to the resistivity characteristic value of the wafer provides different firing conditions for each layer according to the layering. The wafer belonging to the zone A is baked for 5 to 10 seconds at a temperature of 760 to 780 ° C., and the wafer belonging to the second zone B is baked for 5 to 10 seconds at a temperature of 740 to 760 ° C., and the third zone ( The wafer belonging to C) is preferably baked for 5 to 10 seconds at a temperature of 780 to 800 ° C.

상기 소성공정(S600)을 보다 구체적으로 살펴보면, 솔라셀의 물질 특성은 폴리실리콘을 기재로 한 P-N접합의 일종으로 반도체 특성을 가지므로 통상 불순물의 도핑량에 따라 그에 따른 저항률과 전류 특성을 갖지만 소성가공에 의한 활성화 과정에 의해 최종 전류 특성이 변화함은 기지의 사실이고, 이에 P-N접합의 폴리실리콘 웨이퍼는 열처리의 적정성에 따라 발생 전류 밀도를 최적으로 할 수 있으며, 그 처리가 적절치 않으면 생산된 솔라셀의 전류 발생 밀도의 산포는 매우 크게 된다.
Looking at the firing step (S600) in more detail, the material properties of the solar cell is a kind of polysilicon-based PN junction has a semiconductor characteristic, and usually has a resistivity and current characteristics according to the doping amount of impurities, but firing It is a known fact that the final current characteristics change by the activation process by processing, so that the polysilicon wafer of PN junction can optimize the generated current density according to the heat treatment adequacy. The spread of the current generating density of the cell becomes very large.

즉, 저항률의 규격상한선(USL) 범위 이내의 규격품을 종래처럼 고정된 열처리조건에서 소성가공을 할 경우 완제품 솔라셀의 발량전류량 또한 상기 저항률의 산포와 같이 넓게 분포되고 상기 저항률의 규격상한선(USL)에 근접한 규격품의 경우에는 소성가공 후 완성된 솔라셀의 품질등급이 도 5의 도표에서 낮은 등급에 속하게 되지만, 본 발명에 따른 소성공정(S600)으로서 저항률에 따라 층별화된 웨이퍼에 대하여 최적의 소성조건을 제공할 경우에는 도 5의 도표에서 확인할 수 있는 바와 같이 종래에 대비하여 완제품 솔라셀의 발량전류량이 높은 품질의 등급에 밀집될 수 있는 것이다.
In other words, when plastic processing a standard product within the upper limit of the resistivity (USL) range in a fixed heat treatment condition as in the prior art, the amount of current produced by the finished solar cell is also distributed as widely as the distribution of the resistivity, and the upper limit of the resistivity (USL) In the case of a standard product close to, the quality grade of the finished cell after plastic processing belongs to the low grade in the diagram of FIG. 5, but the optimum firing for the wafer layered according to the resistivity as the firing process (S600) according to the present invention. In the case of providing the condition, as shown in the diagram of FIG. 5, the amount of current generated in the finished solar cell may be concentrated in a high quality grade in comparison with the conventional art.

이하, 본 발명에 따른 공정관리방법의 작용을 살펴보면, 솔라셀 제조공정에 있어 특성검사공정(S400)에서 측정된 반가공 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 층별화한 다음 각 계층에 대하여 서로 다른 소성조건으로 가공하되, 저항률의 범위가 1.5 ~ 2.5Ω·㎝에 속하는 제1대역(A)의 웨이퍼는 760 ~ 780℃의 온도에서 5 ~ 10초간 소성하고, 2.5 ~ 3.5Ω·㎝에 속하는 제2대역(B)의 웨이퍼는 740 ~ 760℃의 온도에서 5 ~ 10초간 소성하며, 0.5 ~ 1.5Ω·㎝에 속하는 제3대역(C)의 웨이퍼는 780 ~ 800℃의 온도에서 5 ~ 10초간 소성함으로써, 웨이퍼의 저항률 특성이 "0"에서 규격상한선(USL) 사이의 중심부에 있는 웨이퍼는 물론이고, 상기 저항률 특성이 규격상한선(USL)에 근접한 웨이퍼에 대해서도 소성가공 후 완제품 솔라셀의 발생전류량이 높은 등급에 밀집되어 균일한 품질을 갖는 솔라셀을 생산할 수 있다.
Hereinafter, referring to the operation of the process management method according to the present invention, the wafer is layered according to the resistivity characteristic value of the semi-processed wafer measured in the characteristic inspection process (S400) in the solar cell manufacturing process and then different for each layer. The wafer of the first zone (A) having a resistivity in the range of 1.5 to 2.5 Pa · cm was fired for 5 to 10 seconds at a temperature of 760 to 780 ° C., and belonged to 2.5 to 3.5 Pa · cm. The wafer in the second zone (B) is baked for 5 to 10 seconds at a temperature of 740 to 760 ° C, and the wafer in the third zone (C) belonging to 0.5 to 1.5 mW · cm is for 5 to 10 seconds at a temperature of 780 to 800 ° C. By firing, the amount of generated current of the finished solar cell after firing is performed not only on the wafer whose resistivity characteristic is at the center between the upper limit line (USL) and "0" but also on the wafer whose resistivity characteristic is close to the upper limit line (USL). It is densely packed in high grade and uniform It is possible to produce cells with quality.

뿐만 아니라, 종래 저항률 특성이 규격상한선(USL)을 벗어난 규격외품에 대해서도 소성가공 후 완제품 솔라셀의 품질기준에 만족시킬 수 있으므로 투입자재의 약 95%이상을 양질의 상품으로 만드는 것이 가능하다.
In addition, it is possible to make about 95% or more of the input materials into high-quality products because the resistivity characteristic can satisfy the quality standards of the finished solar cell after plastic processing even for out-of-standard products outside the USL.

따라서, 본 발명에 따른 공정관리방법에 의하면 규격외품의 폐기로 인한 손실을 줄임과 아울러 완성제품의 품질을 향상하여 그 분포가 높은 등급에 밀집될 수 있음에 따라, 궁극적으로는 기존의 솔라셀 제조시스템 하에서 공정관리방법만을 개선하여 적은 투자비용으로 생산성을 극대화할 수 있다.
Therefore, according to the process control method according to the present invention can reduce the loss due to the disposal of out-of-standard products, and also improve the quality of the finished product, the distribution can be concentrated in a high grade, ultimately the existing solar cell manufacturing By improving only the process control method under the system, productivity can be maximized at a low investment cost.

S100: 잉곳성형공정 S200: 웨이퍼가공공정
S300: N형 확산공정 S400: 특성검사공정
S410: 마킹단계 S420: 측정단계
S430: 층별화단계 S500: 반사막/전극 도포공정
S600: 소성공정 S700: 품질검사공정
A: 제1대역 B: 제2대역
C: 제3대역
S100: Ingot forming process S200: Wafer processing process
S300: N-type diffusion process S400: Characteristic inspection process
S410: marking step S420: measuring step
S430: layering step S500: reflective film / electrode coating process
S600: firing process S700: quality inspection process
A: first band B: second band
C: third band

Claims (2)

N형 확산공정, 특성검사공정, 반사막/전극 도포공정, 소성공정, 품질검사공정을 포함하는 솔라셀 제조공정에 있어서;
상기 특성검사공정에서 측정된 반가공 웨이퍼의 저항률 특성치에 따라 상기 웨이퍼를 층별화하되, 저항률의 범위가 1.5 ~ 2.5Ω·㎝에 속하는 제1대역(A)과, 2.5 ~ 3.5Ω·㎝에 속하는 제2대역(B)과, 0.5 ~ 1.5Ω·㎝에 속하는 제3대역(C)으로 층별화하고;
상기 소성공정시 제1대역(A)에 속하는 웨이퍼는 760 ~ 780℃의 온도에서 5 ~ 10초간 소성하고, 제2대역(B)에 속하는 웨이퍼는 740 ~ 760℃의 온도에서 5 ~ 10초간 소성하며, 제3대역(C)에 속하는 웨이퍼는 780 ~ 800℃의 온도에서 5 ~ 10초간 소성함으로써, 규격외 반제품의 폐기로 인한 손실을 줄임과 아울러 완성제품의 품질을 향상할 수 있도록 한 것을 특징으로 하는 솔라셀 등급향상을 위한 효율적 제조에 관한 공정관리방법.
A solar cell manufacturing process including an n-type diffusion process, a characteristic inspection process, a reflection film / electrode application process, a firing process, and a quality inspection process;
The wafers are layered according to the resistivity characteristic values of the semi-processed wafers measured in the characteristic inspection process, but the resistivity ranges from the first band A, which belongs to 1.5 to 2.5 Pa · cm, and belongs to 2.5 to 3.5 Pa · cm. Layered into a second band (B) and a third band (C) belonging to 0.5 to 1.5 kHz · cm;
In the firing process, the wafer belonging to the first zone A is baked for 5 to 10 seconds at a temperature of 760 to 780 ° C, and the wafer belonging to the second zone B is baked for 5 to 10 seconds at a temperature of 740 to 760 ° C. In addition, the wafer belonging to the third zone (C) is baked for 5 to 10 seconds at a temperature of 780 ~ 800 ℃, to reduce the loss due to the disposal of semi-finished products out of specification and to improve the quality of the finished product Process Control Method for Efficient Manufacturing for Cell Grade Improvement.
삭제delete
KR1020110114809A 2011-11-04 2011-11-04 An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System KR101284167B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020110114809A KR101284167B1 (en) 2011-11-04 2011-11-04 An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110114809A KR101284167B1 (en) 2011-11-04 2011-11-04 An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System

Publications (2)

Publication Number Publication Date
KR20130049662A KR20130049662A (en) 2013-05-14
KR101284167B1 true KR101284167B1 (en) 2013-07-09

Family

ID=48660345

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020110114809A KR101284167B1 (en) 2011-11-04 2011-11-04 An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System

Country Status (1)

Country Link
KR (1) KR101284167B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101661839B1 (en) * 2015-01-05 2016-09-30 금오공과대학교 산학협력단 Management method of manufacturing process for solar cell
CN114843369A (en) * 2022-04-28 2022-08-02 晶科能源(海宁)有限公司 Monitoring method of solar cell preparation process

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11238903A (en) * 1998-02-19 1999-08-31 Rohm Co Ltd Semiconductor device, semiconductor wafer, and manufacture of semiconductor device
JP2005235920A (en) 2004-02-18 2005-09-02 Mitsubishi Heavy Ind Ltd Thin-film solar cell manufacturing system, and inspection method in thin-film solar cell manufacturing system
JP2008218993A (en) 2007-02-09 2008-09-18 Kobe Steel Ltd Method of recycling scrap wafer, and method for producing silicon substrate for solar cell
KR20100132201A (en) * 2009-06-09 2010-12-17 (유)에스엔티 Manufacturing system for solar cell

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11238903A (en) * 1998-02-19 1999-08-31 Rohm Co Ltd Semiconductor device, semiconductor wafer, and manufacture of semiconductor device
JP2005235920A (en) 2004-02-18 2005-09-02 Mitsubishi Heavy Ind Ltd Thin-film solar cell manufacturing system, and inspection method in thin-film solar cell manufacturing system
JP2008218993A (en) 2007-02-09 2008-09-18 Kobe Steel Ltd Method of recycling scrap wafer, and method for producing silicon substrate for solar cell
KR20100132201A (en) * 2009-06-09 2010-12-17 (유)에스엔티 Manufacturing system for solar cell

Also Published As

Publication number Publication date
KR20130049662A (en) 2013-05-14

Similar Documents

Publication Publication Date Title
JP6302405B2 (en) Method for treating heterojunction solar cell and method for manufacturing solar cell
EP2763190B1 (en) Heat treatment process of solar cells
US20140295612A1 (en) Solar cell and manufacturing method thereof
CN102725854B (en) Manufacture the method for photovoltaic cell, consequent photovoltaic cell and application thereof
CN102969399B (en) MWT solar cell and preparation method thereof
Herasimenka et al. Surface passivation of n-type c-Si wafers by a-Si/SiO2/SiNx stack with< 1 cm/s effective surface recombination velocity
Sepeai et al. Design optimization of bifacial solar cell by PC1D simulation
TWI424582B (en) Method of fabricating solar cell
Lanterne et al. Understanding of the annealing temperature impact on ion implanted bifacial n‐type solar cells to reach 20.3% efficiency
CN110660883A (en) Preparation method of solar cell and solar cell
KR101284167B1 (en) An Efficient Process Control Method for Class Level-up of Solar Cell Product in Solar Cell Manufacturing System
CN105702805A (en) A laser enhancement hydrogen passivation method for defects and impurities of high-efficiency passivation low-price silicon materials and application of the method
CN109196665A (en) Method for handling silicon materials
CN102637776B (en) N type solar cell and manufacturing method thereof
Wang et al. Influence of novel photovoltaic welding strip on the power of solar cells and photovoltaic assembly
Libal et al. Low-cost, high-efficiency solar cells for the future: ISC Konstanz’s technology zoo
CN202307917U (en) N-type substrate silicon solar battery
Tjengdrawira et al. World first 17% efficient multi-crystalline silicon module
JPWO2012176589A1 (en) Photoelectric conversion device
CN108695410B (en) N-type polycrystalline silicon solar cell and manufacturing method thereof
Kloeter et al. Current status of high-efficiency Q. ANTUM technology at Hanwha Q CELLS
CN112054085A (en) Efficient IBC battery structure and preparation method thereof
Singh et al. A comparative study of different emitter diffusion profiles on the performance of Si solar cells
Lee et al. A novel method for crystalline silicon solar cells with low contact resistance and antireflection coating by an oxidized Mg layer
CN102222732A (en) Method for sintering solar battery cell

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee