KR101276600B1 - Data communication method between processors, code stored computer-readable media for implementing the same method, and multi-processor computing system - Google Patents

Abstract

Dividing a two-dimensional data area into a plurality of sub-data areas among the two-dimensional or more data areas and assigning them to each processor, and generating a parallel processing object for allocating a data area of more than two dimensions to the processor array; Generating a communication object defining a data communication method between the processors using the parallel processing object, and according to the data communication method defined by the communication object, giving the first processor of the processor array a second processor of the processor array. A method of inter-processor data communication is disclosed, comprising transmitting a value of a boundary area of a second sub-data area assigned to.

Description

Data communication method between processors, code stored computer-readable media for implementing the same method, and multi-processor computing system}

TECHNICAL FIELD The present invention relates to multiprocessor computing technology, and more particularly to interprocessor data communication technology.

According to Flynn's classification scheme, multiple-instruction multiple-data (MIMD) computers fall into two categories: shared-memory parallel computers and distributed-memory parallel computers, depending on whether the processors share memory (see [1] below). Reference). In addition, there are two different parallel programming methods: shared-memory programming and message passing. OpenMP and Message Passing Interface (MPI) are representative standard programming models for shared-memory programming and message passing, respectively (see [1] and [2] below).

Distributed-memory parallel computers are generally more cost-saving and scalable than ordinary shared-memory parallel computers (see [3] below). MPI programming is generally preferred as an efficient parallel program because only MPI programs can run on both distributed-memory and shared-memory parallel computers. However, MPI programming is much more difficult to design than OpenMP programming, because programmers must design details such as domain allocation and buffer handling for interprocessor communication. Pacheco [1] compared MPI programming to assembly programming to compare the difficulties of MPI programming. For this reason, even professional programmers have a problem, for example, requiring several years to parallelize the most widely known weather model, Mesoscale Model5 (MM5) (see [4] below).

[1] P. Pacheco, Parallel Programming with MPI . San Francisco, Calif .: Morgan Kaufmann, pp. 12-31, 1996.

[2] R. Chandra, L. Dagum, D. Kohr, D. Maydan, J. McDonald and R. Menon, Parallel Programming in OpenMP . San Francisco, Calif .: Morgan Kaufmann, pp. 8-12, 2000.

[3] Y. Kim, Y. Lee, J. Choi and J. Oh, "Implementation and Performance Analysis of PC Clusters using Fast PCs & High Speed Network," J. of KISS , vol. 29, no. 2, pp. 57-64, 2002.

[4] Y. Kim, Z. Pan, E. Takle and S. Kothari, "Parallel Implementation of Hydrostatic MM5 (Mesoscale Model)," Proc . The Eighth SIAM Conf . on Parallel Processing for Scientific Computing , Oct. 1997.

The present invention provides a method for easily implementing a parallel program executed on a plurality of processors. The scope of the present invention is not limited by the above-mentioned object.

The present invention includes information on High Performance Computing Classes (HPCC) designed to support high level routines for message passing based on MPI. In addition, HPCC can be written in an object-oriented style that is conceptually easy to understand and use (see [9] below).

In general, parallel processing improves speed because the subdomains assigned to each processor are calculated simultaneously. Therefore, two issues are raised by parallel processing, firstly index transformation for managing subregions and secondly data communication between processors (see [4] and [5]). Objects defined by the HPCC may provide methods (or functions) for, for example, information required for parallel processing in parallel Fortran programs, such as index transformations and inter-processor communication in real time. HPCC also provides macros for index conversion, making it easier to manage source code because sequential and parallel programs have the same code at the same time as index conversion.

HPCC can support programs such as Fortran, primarily based on finite difference method (FDM) models for calculating hydrodynamic problems. Since FDM basically requires closest communication in distributed-memory programming, it is suitable for creating portable classes for defining data communication functions within HPCC.

In the detailed description of the present invention, details of the HPCC are described. In addition, an example in which a parallel implementation of legacy code using HPCC is described to show an application example of HPCC.

In order to solve the above problems of the prior art, there is provided a method for inter-processor data communication according to an aspect of the present invention. This method is a method of performing data communication between each processor of a processor array having a two-dimensional topology by using a program having an object-oriented class, wherein a plurality of sub-data is divided into two-dimensional data regions of two or more data regions. Creating a parallel processing object by dividing it into regions and assigning them to each of the above processors, and allocating a data area of more than two dimensions to the processor array, using the above parallel processing objects. Creating a communication object defining a data communication method between processors, and assigning the first processor of the above processor array to the second processor of the above processor array according to the data communication method defined by the above communication object. And transmitting a value of the boundary area of the second sub-data area.

According to another aspect of the present invention, a computer readable medium is provided. The medium is a computer system including a processor array having a two-dimensional topology, using a program having an object-oriented class, by dividing the two-dimensional data area of the two-dimensional or more data areas into a plurality of sub-data areas. Allocating to each processor of the processor array of the processor, and generating a parallel processing object for allocating a data area of more than two dimensions to the processor array of the processor array. Generating a communication object defining a data communication method, and assigning to the first processor of the processor array according to the data communication method defined by the communication object; Recorded a program for executing the step of transmitting the value of the boundary area of the sub-data area; A medium that can be read by a computer.

According to another aspect of the present invention, a computing system is provided. The system includes a storage device and a processor array having a two-dimensional topology, wherein the storage device divides the two-dimensional data area of the two-dimensional or more data areas into a plurality of sub-data areas, thereby providing the processor array. The first program code for executing the step of allocating to each processor in the step of generating a parallel processing object for allocating a data area of a dimension exceeding the above two dimensions to the processor array using the above parallel processing object According to the second program code for executing the step of generating a communication object defining a data communication method between each of the above processors, and the data communication method defined by the communication object, to the first processor of the above processor array Transmitting a value of the boundary area of the second sub-data area allocated to the second processor of the processor array above. Third program code for executing the system is recorded.

According to another aspect of the present invention, a method for communicating data between processors is provided. This method is a method of performing data communication between each processor of a process array having a two-dimensional topology, wherein the two-dimensional data area of the two-dimensional or more data area is divided into a plurality of sub-data areas and assigned to each of the above processors. Assigning a data area of a dimension exceeding the above two dimensions to the processor array, and calculating a value of a boundary area of the sub-data area allocated to the first processor of the processor array, And transmitting the value of the boundary area of the sub-data area allocated to the second processor of the processor array of to the first processor.

[5] Y. Kim, "Parallel Implementation of the MAS (Mesoscale Atmospheric Simulation) Model for Distributed Memory Computers," K orean J. of the Atmospheric Sciences , vol. 6, no. 2, pp. 63-69, 2003.

[6] J. Michalakes, "RSL: A parallel runtime system library for regional atmospheric models with nesting, in Structured Adaptive Mesh Refinement (SAMR) Grid Methods, IMA Volumes in Mathematics and Its Applications (117), Springer, New York, 2000 , pp. 59-74.

[7] P. Burton, "Vector returns: A New Supercomputer for the NET Office Proc. The Tenth ECMWF Workshop on the Use of High Performance Computing in Meteorology , 2003.

[8] Research Applications Laboratory Annual Report: 2007, http://www.ral.ucar.edu/lar/2007

[9] JE Akin, Object oriented programming via Fortran 90/95 . Cambridge, UK: Cambridge Univ. Press, pp. 23-30, 2003.

According to the present invention, a method for easily implementing a parallel program executed in a plurality of processors can be provided. The scope of the present invention is not limited by the above-mentioned effects.

1 illustrates an example of logical region partitioning used by HPCC, according to an embodiment of the present invention.
2 illustrates an example in which a three-dimensional area is projected and divided into a two-dimensional processor array according to an embodiment of the present invention.
3 is a diagram for describing a communication method between nearest neighbors according to an embodiment of the present invention.
4 (a) shows a symbol table for a communication template according to an embodiment of the present invention.
Figure 4 (b) shows the names of the eight entries matching the communication direction according to an embodiment of the present invention.
FIG. 5 illustrates a process of combining several subregions into one host processor according to an embodiment of the present invention.
6 is a table comparing the results using the HPCC according to an embodiment of the present invention with the results using the MPI function.
7 shows the speed of a parallel TIDE program in each case using different numbers of processors in a PC cluster.
8 shows the speed of a parallel QPM program obtained using different numbers of processors in a PC cluster.
9 illustrates the speed of a parallel ACDM program obtained using different numbers of processors in a PC cluster.
10A, 10B, and 10C are flowcharts schematically illustrating a method for communicating data between processors according to an embodiment of the present invention.

Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings. The following specific examples are merely illustrative of the present invention and are not intended to limit the scope of the present invention. In describing the present invention, when it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

In one embodiment of the invention, HPCC is Parallel Class and Comm It consists of two main object-oriented classes called classes. These two classes can be written, for example, in the programming language Fortran90. The objects defined by these two classes can maintain information and methods for real-time parallel processing during program execution.

Parallel Objects defined by classes generate information for parallelism, and parallel programs can use this information at run time. Hereinafter, a method of dividing a domain into subregions will be described.

Dividing a region into subregions is an important strategy for determining a parallel programming style. It can be divided into physical decomposition and logical decomposition (see [10] below). HPCC uses two-dimensional logical region partitioning, which means that all processors initially read the same entire region, and then each processor calculates the allocated subregions. Logical region partitioning has the following comparative advantage over physical region partitioning. First, no local index is needed because the original index is used. Instead, each processor only needs to know the extent of its assigned subregion. Second, an unused area that is not allocated to a subregion can be used as a buffer and thus does not require another physical communication buffer. Third, because all regions are statically allocated, no recomplie is needed even when different numbers of processors are used. Other parallelization libraries also use logical domain partitioning.

1 shows an example of logical region partitioning used by HPCC. In FIG. 1, the size of the region is 16 * 16, and four processors P0, P1, P2, and P3 may be arranged in the form of a 2 * 2 processor array. All processors initially read the entire 16 * 16 area, and each processor can then calculate the allocated 8 * 8 subfields, shown in bold solid lines.

Higher dimensions beyond two dimensions, such as three-dimensional and four-dimensional regions, can be projected onto a two-dimensional processor array. 2 shows an example in which a three-dimensional area is projected and divided into a two-dimensional processor array. Here, the calculation for one column of nodes may be allocated to one processor. 2 shows an example in which processors are allocated to nine two-dimensional subregions arranged 3 * 3 in the i and j directions. Subregions having the same i and j values but different k values may be calculated in the same processor. Or less, Parallel Describes an object defined by a class.

Parallel The class may generate information for parallel processing, such as process identifiers, processor topology, local range, communication buffers, and the like. The information in this object can be used internally by other objects and macros, rather than being exposed to the user according to the 'information hiding' rules (see [9] above).

The HPCC can use a two-dimensional topology of the processor array, so that the size of the projected two-dimensional region can be provided as a parameter to define the object by Parallel . For example, if the size of the three-dimensional region is given by (X * Y * Z), only X and Y representing the size of the one-dimensional and two-dimensional regions can be provided to the class. [Code 1] and [Code 2] below are exemplary codes.

[Code 1] type ( process _ type ) :: process

[Code 2] process = hpcc _ define _ parallel (X, Y)

In this example, process is the name of the object defined by Parallel , and the size of the projected area is X * Y. If different sized regions are used in the same program, different objects can be defined with different sizes. Hereinafter, a method of calculating a two-dimensional optimal value according to the number of processors will be described.

In order to execute the parallel program, the user can provide the parallel program with the number of processors. The Parallel class can calculate the optimal two-dimensional value from a given number of processors. Equation 1 below shows an example of an algorithm for calculating an optimal value.

[Formula 1]

In the algorithm according to [Equation 1], the number of processors given is n , the two-dimensional optimal values are p and q , the size of the region is M * N, and the size of the subregion is M / p * N / q . . All. At this time, p * q = n is satisfied. The data size for nearest neighbor communication in each processor is approximately 2 * ( M / p * N / q ) (excluding edge area processors), and the size of this data is M / p and N / It is the smallest when q has the same value. Therefore, an optimal value can be obtained when the subregions have a square shape where possible (ie, M / p ≒ N / q ). Below, Comm Describes interprocessor communication by class.

Comm The class defines an object that contains a communication template and an interprocessor communication function. This template determines the direction of data communication, after which the communication pattern of the variable is added to this object. The initialization of the communication template will be described below.

Comm The class defines an object with two parameters. First parameter is Parallel An object defined by a class whose second parameter is the size of the dimension beyond two dimensions. [Code 3] below is an example code.

[Code 3] comm _ template = hpcc _ define _ comm ( process , val )

In [Code 3] comm _ template is Comm Name of the object defined by the class. Process is an object defined by the Parallel class. val can be described as follows. If the size of the area is ( N1 * N2 .... * Nn , ( n ≧ 2)), then the size of the projected two-dimensional area is given by ( N1 * N2 ). At this time, if n = 2, then ( N1 * N2 ) = ( N1 * N2 * 1), and the size of the region exceeding two dimensions is given by 1, so val = 1. That is, in a two-dimensional region, val = 1 always. Alternatively, if n > 2, then val = ( N3 .... * Nn ). Comm using information from process and val The class can determine the size and shape of the communication template. Hereinafter, communication between nearest neighbors will be described.

HPCC is useful for parallelizing Fortran FDM model programs. In FDM, time variance values are usually calculated from adjacent values. [Code 4] is an example of an FDM code.

[Code 4] UA (i, j, k) = UA (i + 1, j, k) + UA (i, j + 1, k) + UA (i + 1, j + 1, k)

In [Code 4], UA represents a time-varying value, and indexes ( i, j, k ) represent specific points of a subregion. It is not necessary to communicate data with other subregions in order to calculate UA (i, j, k) not located at the edge of a particular subregion. However, in order to calculate UA (i, j, k) located at the edge of a specific subregion, it is necessary to perform data communication with another subregion. Therefore, before calculating UA (i, j, k) at the edge of the subregion, it is necessary to update the buffer using data transmitted from the neighbor processor.

3 shows communication between nearest neighbors for [Code 4].

According to [Code 4], in P0 and P1 of Fig. 3A, in order to calculate UA (i, j, k) in the lower edge line of each subregion, UA (i + 1, j, k) ) , You need to know the value of the (darkened area). Since this UA (i + 1, j, k) is assigned to P2 and P3, if there is no separate data communication, this UA (i + 1, j, k) ) P0 and P1 are unknown. Therefore, the updated UA (i + 1, j, k) values should be sent from P2 to P0 and from P3 to P1 respectively. In FIG. 3B, for the same reason, the updated UA (i, j + 1, k) value should be transmitted from P1 to P0, and from P3 to P2, respectively. In FIG. 3C, similarly, since the rightmost UA (i + 1, j + 1, k) value among the lower edges of P0 is assigned to P3, UA (i + 1, j + 1, k). ) Value must be transmitted from P3 as well as P1 and P2.

There are eight possible directions for communication between the nearest neighbors for calculating the FDM code: (i-1, j-1), (i-1, j), (i-1, j + 1), (i , j-1), (i, j + 1), (i + 1, j-1), (i + 1, j) and (i + 1, j + 1) . The directions may for example be defined as follows, respectively HPCC constants: HPCC IMJM _, _ HPCC IM, HPCC _ IMJP, HPCC_JM, HPCC JP _, _ HPCC IPJM, HPCC _ _ IP and HPCC IPJP. Where I and J are directions, P is plus, and M is minus. By using these constants, a user can add a communication pattern to a predefined object. Thus, in order to define the communication between the nearest neighbors before the above [Code 4], for example, a code such as [Code 5] may be inserted.

[Code 5] call hpcc _ add _ comm ( comm _ template , UA , HPCC _ IP + HPCC _ JP + HPCC _ IPJP )

Code 5 in hpcc _ add _ comm represents a function, UA is a variable that is added to the template of comm _ template, HPCC _ IP + HPCC _ JP + HPCC _ IPJP represents a communication pattern for calculating the UA.

Physical data communication between processors requires pre-negotiation and post-negotiation to transmit and receive data. In order to reduce this communication overhead, it is efficient to send and receive data as much as possible at one time. Hence, the HPCC can collapse the communication patterns into the smallest number of templates. [Code 6] to [Code 9] below are examples of adding variables a, b, c, and d having different communication patterns to a template called comm_template .

[Code 6] call hpcc _ add _ comm ( comm _ template , a, HPCC _ IP + HPCC _ IM + HPCC _ IPJM )

[Code 7] call hpcc _ add _ comm ( comm _ template , b, HPCC _ IP + HPCC _ JP + HPCC _ IPJM )

[Code 8] call hpcc _ add _ comm ( comm _ template , c, HPCC _ IP + HPCC _ IMJM )

[Code 9] call hpcc _ add _ comm ( comm _ template , d, HPCC _ IMJP )

The HPCC may use a symbol table to maintain the pattern of the template. Of Figure 4 (a) shows the symbol table for the comm _ template in the above-described code. Each template may include eight entries for eight different nearest neighbor communication directions. The names of the eight entries with matched communication directions are shown in FIG. 4 (b). Variable a in the above-described code is a three-way communication, that is, HPCC _ IP , HPCC_IM , and HPCC _ IPJM Directional communication is required. Since the matched names of these directions are S, N and SW, respectively, three nodes can be inserted into the linked-list starting from S, N and SW. In a similar way, nodes for variables b and c can be inserted into the symbol table. When the HPCC inserts each entry into the symbol table, the HPCC can sort the pattern and collapse it. For example, a is inserted into the entries S, N and SW by the call of [Code 6], and then b is inserted into the entries E, S and the SW by the call of [Code 7], and then [code 8]. C can be inserted into the entry S, NW by the call of d , and then d can be inserted into the entry SW by the call of [code 9]. Then, you can use [Code 10] to communicate all variables at once to reduce the communication overhead.

[Code 10] call hpcc _ exec _ comm ( comm _ template )

Then, to output the data, all the subregions can be merged into the original domain on P0 shown in FIG. Where P0 may be considered as a host processor. P0 can then output the results sequentially. Comm Classes can contain functions for these functions, and they can be implemented with code like the following:

[Code 11] call hpcc _ compose ( process , var , ksize )

HPCC can support other MPI APIs such as MPI_ALLREDUCE and MPI_BCAST. HPCC functions are easy to implement because they directly call related MPI functions. An example HPCC function call is shown below.

[Code 12] call hpcc _ broascast ( process , var )

[Code 13] call hpcc _ allreduce ( process , var , HPCC _ SUM )

Hereinafter, index conversion will be described.

Since each processor in a parallel computer only computes the allocated subregions, the original loop indexes must be converted. For example, in FIG. 1, since the size of the entire region is 16 * 16, a do-loop for calculating this region may be given as shown in [Code 14].

[Code 14]

DO  I = 1, 16

DO  J = 1, 16

...

ENDDO

ENDDO

However, in parallel processing, the subregion in P1 is 8 * 8. Therefore, the index for the do-loop in P1 may be converted as shown in [Code 15].

[Code 15]

DO  I = 9, 16

DO  J = 1, 8

HPCC can convert the index using the following macro:

[Code 16]

# define  $ parallel _ do ( process , i, global _ begin , global _ end ) \

do  i = process % local _ begin % i, process % local _ end % i; \

if  ((( global _ begin ) <= i). and . (i <= ( global _ end ))) then

# define  $ parallel _ enddo endif ; enddo

In Code 16, the first parameter of the macro is Parallel An object predefined by the class. This object, and has a local scope, local _ begin% i, local _ end% i for the calculation, the index are converted within this range. The other two parameters provide a mask range only if the original domain is not fully computed. The HPCC macro can change this code as shown in [Code 17].

[Code 17]

DO  I = 1, IM  → $ parallel _ do ( process , i, 1, im )

DO  J = 1, JM  → $ parallel _ do ( process , j, 1, jm )

...

ENDDO  $ parallel _ enddo

ENDDO  $ parallel _ enddo

In order to easily maintain the source code, HPCC keeps the sequential program and the parallel program in the same source code. The compiler can distinguish by parameter flags whether it is a sequential program or a parallel program. If the compiler compiles a sequential program, the original index is used without conversion. Thus, when the user modifies the source code, the sequential program and the parallel program can be changed at the same time. On the other hand, because other parallel libraries store local indexes as variables (see [6] and [7] above), loop variables must be changed when the code is parallelized.

<Experimental Example>

HPCC not only shortens the parallelism period of the program, but also provides better performance compared to using MPI functions directly. The performance differences between the HPCC and MPI functions are compared below. Next, we show the speedup of three legacy codes parallelized using HPCC to show general performance. The parallel program was run on a PC cluster consisting of an Intel Xeon E5405 2.0 GHz PC and a Gigabit Ethernet switch.

For comparison, a test parallel program using HPCC function and a test parallel program using MPI function were designed. The program using the HPCC includes data communication of two variables u and v each having eight different communication directions. Specific codes are as shown in [Code 18], [Code 19], and [Code 20] below.

[Code 18] call hpcc _ add _ comm ( comm , u, HPCC _ IP + HPCC _ IM + HPCC _ JP + HPCC_JM + HPCC _ IPJP + HPCC _ IMJP + HPCC _ IPJM + HPCC _ IMJM )

[Code 19] call hpcc _ add _ comm ( comm , v, HPCC _ IP + HPCC _ IM + HPCC _ JP + HPCC_JM + HPCC _ IPJP + HPCC _ IMJP + HPCC _ IPJM + HPCC _ IMJM )

[Code 20] call hpcc _ exec _ comm ( comm )

The size of each variable is (54 * 54 * 21), so the communication data size of HPCC _ IP and HPCC _ IM is (54 * 1 * 21 * 2), and the communication data size of HPCC _ JP and HPCC _ JM (1 * 54 * 21 * 2), HPCC _ IPJP , HPCC _ IMJP , HPCC _ IPJM And the communication data size of HPCC _ IMJM is (1 * 1 * 21 * 2). Another program produces the same result, except that MPI_SEND and MPI_RECV functions are used directly. 6 shows a comparison result. MPI programs include multiple send and receive functions with their communication buffers, whereas HPCC programs combine all communication data into one buffer and contain only one send and receive functions internally. Is fast.

Three different FDM-based models were parallelized by HPCC. These models are based on two-dimensional, three-dimensional and four-dimensional regions, respectively, and the three-dimensional and four-dimensional regions each have one dimension and two dimensions that are higher order than the fixed two-dimensional region.

<Experimental Example 1>

The TIDE model is a weather model that simulates a crest on the beach. The model is based on a two-dimensional domain, and Code 21 defines the domain process . At this time, the size of the region is IM * JM (= 421 * 385).

[Code 21] process = hpcc _ define _ parallel ( IM , JM )

Code 22 defines a communication template. Since the area is two-dimensional, the size of the higher dimension is one.

[Code 22] comm _ main = hpcc _ define _ comm ( process , 1)

This parallel program has nine communication points. 7 shows the speed of a parallel program in each case using different numbers of processors in a PC cluster. The difference between the ideal speed and the actual speed increases as the number of processors increases. This is an overhead of parallel programs that can be easily understood from the fact that one of the nearest neighbor communication takes place inside the three-level loop, and that the more communication is used, the greater the communication overhead.

<Experimental Example 2>

The Qualitative Prediction Model (QPM) is a three-dimensional model for simulating the change of precipitation over time (see [12] below). Area process and the three-dimensional template communication comm _ main2 may be defined as the Code 33] and [34 code. The size of the region nx * ny * nz is (54 * 54 * 21).

[Code 33] process = hpcc _ define _ parallel ( nx , ny )

[Code 34] comm _ main2 = hpcc _ define _ comm ( process , nz )

8 shows the speed of a parallel QPM program obtained using different numbers of processors in a PC cluster. The same tendency as in FIG. 7 appears.

<Experimental Example 3>

ACDM (Air Chemistry diffusion model) is a model that simulates chemical diffusion behavior in the atmosphere (see [13] below). The region process can be defined by [Code 35].

[Code 35] process = hpcc _ define _ parallel ( imax1 , jmax1 )

The model is basically based on three-dimensional regions, but uses four-dimensional regions for air and chemical diffusion. The size of the three-dimensional region and the size of the four-dimensional region are imax1 * jmax1 * kmax1 (45 * 45 * 21) and imax1 * jmax1 * 22 * 70, respectively. Communicate with one another template for a different area and comm comm main1 _ _ main2 may be defined as the Code 36] and [37 code.

[Code 36] comm _ main1 = hpcc _ define _ comm ( process , kmax1 )

[Code 37] comm _ main2 = hpcc _ define _ comm ( process , 22 * 70)

9 shows the speed of the parallel ACM (Air Chemistry Model) obtained in the PC cluster.

The HPCC described above can parallelize Fortran legacy code, for example based on the FDM model for distributed-memory computers. The main purpose of HPCC is to implement efficient parallel programs in a short period of time. In general, parallelizing massive amounts of legacy code is difficult because the parallelization process is not simple and the MPI functions are complex to use. Because HPCC is designed as an object-oriented program with a user-friendly concept, users can parallelize Fortran programs without having to know the details of complex MPI functions. HPCC can provide macros to simplify parallel programming as well as an interface between Fortran source code and MPI functions. In order to demonstrate the usefulness and efficiency of the HPCC, parallelization of the model was completed in two to three weeks in order to implement the three experimental examples described above. This is a significant improvement over the prior months of parallelization. As described above, the program parallelized by the HPCC runs efficiently on a cluster of PCs.

&Lt; Example 1 >

Hereinafter, a method of communicating data between processors according to an embodiment of the present invention.

10A is a flowchart schematically illustrating a method for communicating data between processors according to an embodiment of the present invention.

This method is a method of performing data communication between each processor of a processor array having a two-dimensional topology by using a program having an object-oriented class. Where the object-oriented class is Parallel Class and / or Comm It may be a class. In addition, having a two-dimensional topology in the present specification and claims means that each processor of the above-described processor array can be conceptually regarded as a two-dimensional array arrangement, and does not mean that the two-dimensional topology is actually physically arranged in two dimensions. Do not. In addition, a processor array having a two-dimensional topology may mean a collection of processors distributed in separate computing devices, or may mean a collection of processors distributed in one computing device.

The method divides a two-dimensional data area of a two-dimensional or more data area into a plurality of sub-data areas and allocates the data area of the two-dimensional or larger dimension to the processor array in parallel. Generating a processing object (S110). The parallel processing object may be generated by , for example, the hpcc_define_parallel (,) function of the above-mentioned [Code 2].

2, for example, 'a two-dimensional or more data area' is an area defined by indexes i, j, and k, and a 'two-dimensional data area' is an area defined by indexes i, j, and a '2' The data area of the dimension beyond the dimension 'is the area defined by the index k.

On the contrary, in the above-described <Experimental Example 3>, the above 'two-dimensional data area' is an area defined by ( imax1 * jmax1 * 22 * 70 ), and the 'two-dimensional data area' is ( imax1 * jmax1 ), and a data area of a dimension exceeding two dimensions is an area defined by ( 22 * 70 ).

The method may also include generating a communication object (S120) that defines a data communication method between the processors using the parallel processing object. Here, the communication object may be defined by the hpcc _ define _ comm (,) function of the above [Code 3]. In this case, as a factor of hpcc _ define _ comm (,) , the size of the parallel processing object and the data area having a dimension exceeding two dimensions may be used.

The method then determines, according to the data communication scheme defined by the communication object, a value of the boundary area of the second sub-data area allocated to the first processor of the processor array to the second processor of the processor array. It may include the step of transmitting (S130). Here, the 'data communication method' may be defined by the call hpcc_add_comm (,,) function of the above-mentioned [Code 5]. In addition, the above-described second sub-data area may be, for example, the P2 area shown in FIG. 3A. In addition, the above-described 'border area' may represent a dark portion of the above P2 area, and the 'border area value' may correspond to UA , a, b, c, and d as mentioned in [Code 4] to [Code 9]. It can be the same variable.

In addition, the method may include calculating (S140) a value of the boundary area of the first sub-data area allocated to the first processor using the transmitted value. Here, the 'first sub-data area' is, for example, a P0 area shown in FIG. 3A, and the 'border area of the first sub-data area' is a dark part of the P0 area shown in FIG. 3A. Can be.

Figure 10b shows in more detail the step (S110) for generating the above-described parallel processing object. In operation S110, obtaining a number n of processors included in the processor array and a size M * N of the two-dimensional data region in operation S111, a natural number p that satisfies p * q = n. And calculating p and q at which the difference between M / p and N / q is the minimum among natural numbers q (S112), and dividing the two-dimensional data region into p row regions and q column regions. The method may include dividing into n sub-data areas (S113). Steps S111 to S113 may be implemented by, for example, a code such as [Equation 1].

10c illustrates the above-described transmitting step (S130) in more detail. The above-described transmitting step (S130), the first processor, the step of transmitting a communication direction of the data required to calculate the value of the boundary area of the first sub-data area to the second processor (S131), And transmitting, by the second processor, a value corresponding to the communication direction among the values of the boundary area of the second sub-data area to the first processor (S132). For example, when the value of the boundary area of the first sub-data area is the variable a of [Code 6] described above, the communication direction of the above-mentioned data is determined by the factor HPCC _ IP + HPCC _ IM + of [Code 6]. HPCC _ can be defined by the IPJM. The above step (S131) is, for example, the call of the above-mentioned [Code 10] and it executed by a hpcc _ _ comm exec () function.

In addition, the method further includes that when the calculation of the sub-data area assigned to each of the above processors is finished, one of the processor arrays determines the value of the sub-data area assigned to the other processors. After receiving from the mobile station, the one processor may include outputting a value of the two-dimensional or higher data area (S150).

Generating the above-described communication object (S120) includes adding information on the communication direction of the data necessary to calculate the value of the boundary area of each sub-data area to the above data communication method (S121). can do. Step (S121) is, for example, may be implemented by hpcc _ _ add comm (,,) functions in the above-described [5 code.

In addition, in the above-described transmitting step (S130), the first processor transmits the above data communication scheme to the second processor, and the second processor according to the above data communication scheme boundary of the second sub-data area And transmitting the value of the region to the first processor. Lee, "data communication method, may be formed using the symbol table shown in Code 5] hpcc _ _ add comm (,,) of a defined by, for example, Fig. 4 (a).

<Example 2>

Hereinafter, a computer-readable medium according to another embodiment of the present invention will be described.

This medium uses a program having an object-oriented class to record a program for executing the steps (S110, S120, S130) of <Embodiment 1> described above in a computer system including a processor array having a two-dimensional topology. It is a computer-readable medium. This medium includes all media that can be read by the above computer system, such as CD-ROM, CD-RW, SDD, HDD, and the like. In addition, it may be easily understood that the above program may further include code for executing one or more other steps of the above-described <Embodiment 1>.

<Example 3>

Hereinafter, a multiprocessor computing system according to another embodiment will be described.

The computing system can include a storage device and a processor array having a two-dimensional topology. The storage device may be the computer-readable medium described above in <Example 2>. In addition, the above-described processor array may be installed in one independent device or distributed in several independent devices. If the computing system includes two or more independent devices, the communication devices connecting the devices may be further included in the computing system.

In the above-described storage device, program codes for executing the steps of the first embodiment, for example, the steps S110, S120, and S130 may be stored.

The title of the present invention is not intended to limit the scope of the present invention, but may be corrected to cover the contents of the claims of the present invention.

The storage device described in the embodiments of the present invention does not select any kind of HDD, SDD, CD-ROM, CD-RW, Blue-Ray disc, or the like.

The detailed description of the invention is intended to describe embodiments of the invention and is not intended to represent the only embodiments that can be implemented in accordance with the invention. The detailed description of the invention may be described using specific terms for easy understanding of the invention. It is not intended, however, to be limited by this specific terminology of the invention. Accordingly, the above detailed description of the invention should not be construed as limiting in all aspects but considered as illustrative.

Each of the above-described embodiments is a combination of the components and features of the present invention in a predetermined form. Each component or feature may be implemented in a form that is not combined with other components or features. It is also possible to construct embodiments of the present invention by combining some of the elements and / or features. Some constructions or features of one embodiment may be included in another embodiment if not contrary to the spirit of the present invention, or may be replaced with corresponding constructions or features of another embodiment. It is clear that the claims that are not expressly cited in the claims may be combined to form an embodiment or be included in a new claim by an amendment after the application.

The scope of the present invention should be determined in consideration of the reasonable interpretation of the claims, and all modifications within the equivalent scope of the present invention are included in the scope of the present invention. Those skilled in the art will be able to easily understand the spirit of the present invention from the embodiments of the present invention and the claims.

[10] GC Fox, MA Johnson, GA Lyzenga, SW Otto, JK Salmon, and DW Walker, Solving Problems On Concurrent Processors Volume I: General Techniques and Regular Problem. Englewood Cliffs: Prentice-Hall, pp. 120-123, 1998.

[11] H. Leem, O. Seo and H. Kang, "A Sensitivity Test on the Minimum Depth of the Tide Model in the Northeast Asian Marginal Seas," J. of Korean Society of Coastal and Ocean Engineers , vol. 19, no. 5, 2007.

[12] R. Misumi, RJ Moore, "River flow forecasting using a rainfall disaggregation model incorporating small-scale topographic effects," J. Meteorol. Appl ., Vol. 8, pp. 297-305, 2001.

[13] "Core Environmental Technology Development Project for Nest Generation," 13-1-1, Korea Institute of Environmental Science and Technology, 2004.

Claims (13)

In a computer system including a processor array having a two-dimensional topology by using a program having an object-oriented class, a method of performing data communication between each processor belonging to the processor array,
Generating a parallel processing object in the computer system, dividing a two-dimensional data region into a plurality of sub-data regions and allocating the processors to the respective processors;
Generating a communication object in the computer system using the parallel processing object, the communication object including information on a communication direction of data necessary for calculating a value of a boundary area of each sub-data area; And
Based on the information about the communication direction of the data, data necessary for calculating a value of a boundary area of a first sub-data area allocated to a first processor of the processor array is generated by the second processor of the processor array. Transmitting to the first processor;
Including;
Data necessary for calculating a value of the boundary area of the first sub-data area is present in the boundary area of the second sub-data area allocated to the second processor;
How to communicate data between processors. 2. The method of claim 1, further comprising the step of the first processor using the transmitted data to calculate a value of a boundary region of the first sub-data region. The method of claim 1,
Creating the parallel processing object,
Obtaining a number n of processors included in the processor array and a size M * N of the two-dimensional data region;
calculating p and q of a natural number p and a natural number q satisfying p * q = n, wherein the difference between M / p and N / q becomes the minimum; And
Dividing the two-dimensional data region into p row regions and q column regions to divide into n sub-data regions
/ RTI &gt;
How to communicate data between processors. delete The method of claim 1,
When the calculation of the sub-data area allocated to each processor is completed, receiving, by one of the processor arrays, a value of the sub-data area allocated to other processors from the other processors; And
The one processor outputting a value of the data area of at least two dimensions
Comprising a data communication method between the processors. The method of claim 1,
The two-dimensional data area is included in a two-dimensional or more data area,
In the step of creating the communication object, the communication object is defined according to the size of the parallel processing object and the data area of the dimension exceeding two dimensions, inter-processor data communication method. delete delete In a computer system comprising a processor array having a two-dimensional topology,
Parallel processing of dividing a two-dimensional data area into a plurality of sub-data areas among two or more data areas and allocating them to each processor of the processor array, and allocating a data area of more than two dimensions to the processor array. Creating an object;
Generating a communication object defining a data communication method between the processors using the parallel processing object; And
Transmitting a value of a boundary region of a second sub-data region allocated to a second processor of the processor array to a first processor of the processor array according to a data communication scheme defined by the communication object;
A program with an object-oriented class for executing
Computer-readable media. 10. The computer program product of claim 9, wherein the program further comprises code for causing the computer system to execute the step of calculating a value of a boundary area of a first sub-data area allocated to the first processor using the transmitted value. Computer-readable media, further included. Storage device; And
Processor Array with Two-Dimensional Topology
Including;
The storage device,
Parallel processing of dividing a two-dimensional data area into a plurality of sub-data areas among two or more data areas and allocating them to each processor of the processor array, and allocating a data area of more than two dimensions to the processor array. First program code for executing a step of creating an object,
Second program code for executing a step of generating a communication object defining a data communication method between the processors using the parallel processing object;
In accordance with a data communication scheme defined by the communication object, transmitting a value of a boundary area of a second sub-data area allocated to a second processor of the processor array to a first processor of the processor array. 3rd program code for
Is recorded,
Multiprocessor Computing System. The method of claim 11,
The transmitting step,
The first processor transmitting the data communication scheme to the second processor, and
Transmitting, by the second processor, a value of a boundary area of the second sub-data area to the first processor according to the data communication scheme;
/ RTI &gt;
Multiprocessor Computing System. In a computer system including a processor array having a two-dimensional topology, a method of performing data communication between each processor belonging to the processor array,
In the computer system, dividing a two-dimensional data region into a plurality of sub-data regions and allocating the two-dimensional data regions to the respective processors;
Generating, at the computer system, information regarding a communication direction of data necessary for calculating a value of a boundary area of each sub-data area; And
Based on the information about the communication direction of the data, data necessary for calculating a value of a boundary area of a first sub-data area allocated to a first processor of the processor array is generated by the second processor of the processor array. Transmitting to the first processor;
Including;
Data necessary for calculating a value of the boundary area of the first sub-data area is present in the boundary area of the second sub-data area allocated to the second processor;
How to communicate data between processors.

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