KR101273524B1 - Semiconductor chip package, and Tape carrier package for transferring the same - Google Patents
Semiconductor chip package, and Tape carrier package for transferring the same Download PDFInfo
- Publication number
- KR101273524B1 KR101273524B1 KR1020110103904A KR20110103904A KR101273524B1 KR 101273524 B1 KR101273524 B1 KR 101273524B1 KR 1020110103904 A KR1020110103904 A KR 1020110103904A KR 20110103904 A KR20110103904 A KR 20110103904A KR 101273524 B1 KR101273524 B1 KR 101273524B1
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- South Korea
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- tape carrier
- chip
- region
- package
- chips
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
The tape carrier package is a tape carrier fabricated in a strip shape that can be wound on a reel, and is continuously arranged on the tape carrier, and the arrangement position in the width direction of the tape carrier is alternately adjacent to both sides of the tape carrier so that the tape A plurality of chips are arranged in a zigzag form along the longitudinal direction of the carrier. The solder resist region connecting the chip to the input lead and the output lead comprises a first area extending in the width direction of the tape carrier, including the occupied area of the chip on the tape carrier, and a first region adjacent to each chip. And a second region extending in the longitudinal direction of the tape carrier from the region. At this time, the second regions of the adjacent pair of chips are configured to extend in opposite directions. By increasing the density of the chip package provided in the tape carrier package, it is possible to reduce the consumption of the tape carrier used in the semiconductor packaging process and to reduce the time required for the packaging process.
Description
The present invention relates to a semiconductor chip package and a tape carrier package for transporting the same, and more particularly, to a chip package and a tape having a structure capable of increasing the density of the semiconductor chip conveyed by the tape carrier in a packaging process of the semiconductor chip. Relates to a carrier package.
Semiconductor chips are fabricated as wafers and then packaged into individual chips to form chip packages. Before the individual chips, which are diced from the wafer, are finally formed into mountable forms on the substrate, the individual chips are mounted on a tape carrier and subjected to various processes for packaging. 1 and 2 show a semiconductor chip mounted on a tape carrier as described above.
The
If the number of
However, in the structure of the conventional tape carrier package as shown in FIG. 2, in order to increase the density of the
An object of the present invention is to increase the density of the chip package provided in the tape carrier package, to provide a method to reduce the consumption of the tape carrier used in the semiconductor packaging process and to reduce the time required for the packaging process.
In order to achieve the above object, the present invention is a tape carrier fabricated in a band shape that can be wound on a reel; The tape carrier is continuously disposed at predetermined intervals along the longitudinal direction of the tape carrier, and the arrangement position in the width direction of the tape carrier is alternately adjacent to both sides of the tape carrier so that A plurality of chips arranged in a zigzag form along the length direction; An input lead and an output lead connected to each said chip; And a solder resist region for connecting the chip to the input lead and the output lead.
The solder resist region includes an occupied region of the chip on the tape carrier and extends in the width direction of the tape carrier, and the tape carrier from the first region at a portion adjacent to each chip. It comprises a second region extending in the longitudinal direction of the. In this case, the second regions of the adjacent pair of chips extend in opposite directions to each other. One of the input lead and the output lead is formed at the end of the first region and the other is formed at the end of the second region.
On the other hand, according to the present invention, a chip; An input lead and an output lead connected to the chip; And a solder resist region connecting the chip to the input lead and the output lead, wherein the solder resist region comprises a region including the chip and extends to one side of the chip; And a second region extending from the first region at a portion adjacent to the chip, wherein one of the input lead and the output lead is formed at an end of the first region and the other is an end of the second region. Provided is a chip package, characterized in that formed in.
According to the present invention, the chip package included in the tape carrier package may be increased, thereby reducing the consumption of the tape carrier used in the semiconductor packaging process and reducing the time required for the packaging process.
1 is a view showing a general state of a tape carrier package wound on a reel.
FIG. 2 is an enlarged view of the tape carrier package of FIG. 1.
3 shows a part of a tape carrier package according to the invention.
Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. Figure 3 is a view showing a tape carrier package according to the present invention, an enlarged view of a portion of the entire tape carrier package. (In the description of the present invention, the term "tape carrier package" is used to refer to the entirety of the
The tape carrier package consists of a
The
The
The
The
In this case, the
The
According to this configuration, the
Therefore, the density of
In addition, since the spacing between the
Meanwhile, the
110: tape carrier 121: chip
123, 124:
Claims (5)
The tape carrier is continuously disposed at predetermined intervals along the longitudinal direction of the tape carrier, and the arrangement position in the width direction of the tape carrier is alternately adjacent to both sides of the tape carrier so that A plurality of chips arranged in a zigzag form along the length direction;
An input lead and an output lead connected to each said chip; And
And a solder resist region connecting the chip to the input lead and the output lead,
The solder resist region is,
A first area extending in the width direction of the tape carrier, the area occupied by the chip on the tape carrier, and
And a second region extending in the longitudinal direction of the tape carrier from the first region at a portion adjacent to each of the chips.
And the second regions of the adjacent pair of chips extend in opposite directions to each other.
And one of the input lead and the output lead is formed at the end of the first region and the other is formed at the end of the second region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110103904A KR101273524B1 (en) | 2011-10-12 | 2011-10-12 | Semiconductor chip package, and Tape carrier package for transferring the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110103904A KR101273524B1 (en) | 2011-10-12 | 2011-10-12 | Semiconductor chip package, and Tape carrier package for transferring the same |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20130039391A KR20130039391A (en) | 2013-04-22 |
KR101273524B1 true KR101273524B1 (en) | 2013-06-17 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020110103904A KR101273524B1 (en) | 2011-10-12 | 2011-10-12 | Semiconductor chip package, and Tape carrier package for transferring the same |
Country Status (1)
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KR (1) | KR101273524B1 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000323533A (en) * | 1999-05-14 | 2000-11-24 | Sharp Corp | Tape carrier and manufacturing tape carrier type semiconductor device |
JP2003095321A (en) | 2001-09-26 | 2003-04-03 | Rohm Co Ltd | Carrier tape for electronic component, and taping electronic component |
JP2003282649A (en) | 2002-03-27 | 2003-10-03 | Shindo Denshi Kogyo Kk | Tape carrier and method of manufacturing the same, method of mounting electronic component to tape carrier, and method of manufacturing tape carrier |
JP2011155201A (en) * | 2010-01-28 | 2011-08-11 | Sharp Corp | Tape carrier, tape carrier-type semiconductor device, and method of manufacturing tape carrier-type semiconductor device |
-
2011
- 2011-10-12 KR KR1020110103904A patent/KR101273524B1/en active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000323533A (en) * | 1999-05-14 | 2000-11-24 | Sharp Corp | Tape carrier and manufacturing tape carrier type semiconductor device |
JP2003095321A (en) | 2001-09-26 | 2003-04-03 | Rohm Co Ltd | Carrier tape for electronic component, and taping electronic component |
JP2003282649A (en) | 2002-03-27 | 2003-10-03 | Shindo Denshi Kogyo Kk | Tape carrier and method of manufacturing the same, method of mounting electronic component to tape carrier, and method of manufacturing tape carrier |
JP2011155201A (en) * | 2010-01-28 | 2011-08-11 | Sharp Corp | Tape carrier, tape carrier-type semiconductor device, and method of manufacturing tape carrier-type semiconductor device |
Also Published As
Publication number | Publication date |
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KR20130039391A (en) | 2013-04-22 |
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