KR101216171B1 - Display Device And Method For Fabricating Thereof - Google Patents

Display Device And Method For Fabricating Thereof Download PDF

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Publication number
KR101216171B1
KR101216171B1 KR1020050084678A KR20050084678A KR101216171B1 KR 101216171 B1 KR101216171 B1 KR 101216171B1 KR 1020050084678 A KR1020050084678 A KR 1020050084678A KR 20050084678 A KR20050084678 A KR 20050084678A KR 101216171 B1 KR101216171 B1 KR 101216171B1
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South Korea
Prior art keywords
metal layer
contact hole
formed
electrode
conductive pattern
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KR1020050084678A
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Korean (ko)
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KR20070029981A (en
Inventor
김유진
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엘지디스플레이 주식회사
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Priority to KR1020050084678A priority Critical patent/KR101216171B1/en
Publication of KR20070029981A publication Critical patent/KR20070029981A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13458Terminal pads
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136277Active matrix addressed cells formed on a semiconductor substrate, e.g. silicon
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F2001/13625Patterning using a multi-mask exposure
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F2001/136295Materials; Compositions; Methods of manufacturing
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/42Arrangements for providing conduction through an insulating substrate

Abstract

The present invention relates to a display device capable of improving the reliability of contact between thin film patterns and a method of manufacturing the same, and includes upper and lower conductive patterns contacting each other through a contact hole penetrating through an insulating layer. The upper conductive pattern may include at least one first metal layer formed on a bottom surface and a side surface of the contact hole; And a second metal layer covering the first metal layer in the contact hole and in direct contact with a surface of the insulating layer.

Description

Display device and method for fabricating thereof

1 is a cross-sectional view showing a pad region of a conventional display element.

2A to 2C are diagrams illustrating a method of manufacturing the pad region illustrated in FIG. 1 in stages.

3 is a diagram illustrating disconnection of a third conductive pattern due to a step of the second conductive pattern;

4 is a cross-sectional view illustrating a pad area of a display device according to an exemplary embodiment of the present invention.

FIG. 5 illustrates that a third conductive pattern is formed on the second conductive pattern.

6A through 6F are diagrams illustrating a method of manufacturing the pad region illustrated in FIG. 5 in stages.

Fig. 7 is a diagram showing a poly type thin film transistor and a pixel electrode connected thereto.

      <Explanation of symbols for the main parts of the drawings>

2,102: substrate 4,104: first conductive pattern

6,106 insulating film 8,108 second conductive pattern

15,115: third conductive pattern 108a: first metal layer

108b: second metal layer 10,110: contact hole

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device and a method of manufacturing the same that can improve the reliability of contact between thin film patterns.

2. Description of the Related Art Recently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of cathode ray tubes (CRTs), have been developed. Flat display devices include Liquid Crystal Display (LCD), Field Emission Display (FED), Plasma Display Panel (PDP) and Electro-luminescence (EL). Display elements; PDP is most advantageous for large screens because of its relatively simple structure and manufacturing process, but it has the disadvantages of low luminous efficiency, low luminance and high power consumption. The EL display device is roughly classified into an inorganic EL and an organic EL, and has a high response speed, light emission efficiency, brightness, and viewing angle, but is difficult to achieve large screens.

LCDs are widely used in offices and home PCs because they are advantageous for larger screens than EL display elements and consume less power than PDPs.

The flat panel display device includes a plurality of thin film patterns, and conductive thin films having different properties are positioned to contact each other through contact holes penetrating the insulating film in a specific region.

In order to receive an external driving signal, the conductive thin films are in contact with each other through a contact hole in a pad disposed outside the display element, or in contact with the thin film transistor and the electrodes.

1 is a diagram illustrating a pad part of a conventional display device.

The pad part illustrated in FIG. 1 has an insulating film 6 and a contact hole 10 having a first conductive pattern 4 formed on the substrate 2 and a contact hole 10 partially exposing the first conductive pattern 4. And a second conductive pattern 8 in contact with the first conductive pattern 4. Here, the second conductive pattern 8 is formed in two or more layers to reduce the contact resistance or to improve the contact characteristics between the conductive patterns or as necessary. In FIG. 1, a double layered structure includes a first metal layer 8a and a second metal layer 8b.

Referring to FIGS. 2A to 2C, a method of manufacturing the pad unit illustrated in FIG. 1 is as follows.

After the first conductive material is formed on the substrate 2, the first conductive material is patterned by a photolithography process and an etching process to form the first conductive pattern 4 as illustrated in FIG. 2A.

After the insulating material is deposited on the substrate 2 on which the first conductive pattern 4 is formed, the insulating material is patterned by a photolithography process and an etching process to form the first conductive pattern 4 as illustrated in FIG. 2B. An insulating film 6 having a contact hole 10 partially exposed is formed.

After the at least two metal layers, that is, the first metal layer 8a and the second metal layer 8b are sequentially formed on the substrate 2 on which the insulating film 6 is formed, the first conductive material is formed by a photolithography process and an etching process. By patterning, as shown in FIG. 2C, the second conductive pattern 8 including the first metal layer 8a and the second metal layer 8b is formed.

Here, when the second conductive pattern 8 is formed in two or more layers, there is a problem that the etching at the end of the second conductive pattern is not easily performed.

In detail, since the first metal layer 8a and the second metal layer 8b are different materials, their etching rates and etching characteristics are different even if they are patterned by the same etching process. Even when the first metal layer 8a and the second metal layer 8b are simultaneously etched under the same conditions, desired taper shapes are not formed at both ends A of the second conductive pattern 8 due to the difference in the characteristics thereof. Will not. As a result, the step between the insulating film 6 and the second conductive pattern 8 is large. Subsequently, when the third conductive pattern 15 is formed on the second conductive pattern 8 as shown in FIG. 3, the second conductive pattern 8 and the third conductive pattern 15 are still large. As the terminal is held, the third conductive pattern 15 may be disconnected in the stepped area A. In order to prevent such a problem, the end of the second conductive pattern 8 should be formed to have a predetermined gentle slope. However, since the first metal layer 8a and the second metal layer 8b have different etching characteristics, a problem arises in that the taper shape at the end A of the second conductive pattern 8 is not normally formed.

An object of the present invention is to provide a display device and a method of manufacturing the same, which can improve the reliability of contact between thin film patterns in a contact hole.

The display device of the present invention includes upper and lower conductive patterns contacting each other through contact holes penetrating the insulating film. The upper conductive pattern may include at least one first metal layer formed on a bottom surface and a side surface of the contact hole; And a second metal layer covering the first metal layer in the contact hole and in direct contact with a surface of the insulating layer.
A display device of the present invention includes a buffer film formed on a substrate; An active layer formed on the buffer layer and including a source region and a drain region; A gate insulating film formed on the buffer film to cover the active layer; A gate electrode of the thin film transistor formed on the gate insulating film; An interlayer insulating film formed on the gate insulating film to cover the gate electrode and including a source contact hole exposing a source region of the active layer and a drain contact hole exposing a drain region of the active layer; A source electrode of the thin film transistor contacting the source region of the active layer through the source contact hole; A drain electrode of the thin film transistor contacting the drain region of the active layer through the drain contact hole; A passivation layer formed on the interlayer insulating layer to cover the source electrode and the drain electrode of the thin film transistor and including a pixel contact hole exposing a portion of the drain electrode of the thin film transistor; And a pixel electrode contacting the drain electrode of the thin film transistor through the pixel contact hole, wherein each of the source electrode, the drain electrode, and the pixel electrode includes a first metal layer and a second metal layer formed on the first metal layer. Include. The first metal layer of the source electrode is formed on the bottom and side surfaces in the source contact hole, the second metal layer of the source electrode covers the first metal layer of the source electrode in the source contact hole and directly with the surface of the interlayer insulating film. Contact. The first metal layer of the drain electrode is formed on the bottom and side surfaces in the drain contact hole, and the second metal layer of the drain electrode covers the first metal layer of the drain electrode in the drain contact hole and directly with the surface of the interlayer insulating film. Contact. The first metal layer of the pixel electrode is formed on the bottom and side surfaces of the pixel contact hole, and the second metal layer of the pixel electrode covers the first metal layer of the pixel electrode and directly contacts the surface of the passivation layer in the pixel contact hole. do.
Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

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Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 7.

4 is a diagram illustrating an area of a display device according to an exemplary embodiment of the present invention.

One region of the display device illustrated in FIG. 4 may be a pad part positioned outside the display device to receive an external driving signal, or may be a contact area of a thin film transistor and a pixel electrode. Furthermore, the contact hole may be a contact area between the conductive thin film patterns through the contact hole.

Hereinafter, FIG. 4 will be described on the assumption that the pad region of the display device.

The pad part illustrated in FIG. 4 has an insulating film 106 and a contact hole 110 having a first conductive pattern 104 formed on the substrate 102, a contact hole 110 partially exposing the first conductive pattern 104. And a second conductive pattern 108 which is in contact with the first conductive pattern 104 and is formed of at least first and second metal layers 108a and 108b.
In the second conductive pattern 108, the first metal layer 108a is formed on the bottom and side surfaces of the contact hole 110. The second conductive pattern 108 is formed in a wider pattern than the pattern of the first metal layer 108a to cover the first metal layer 108a and directly contact the surface of the insulating film 106. Therefore, since the end of the pattern of the first metal layer 108a is located outside the end of the pattern of the second metal layer 108b, the end of the first metal layer 108a and the end of the second metal layer 108b do not overlap each other. As a result, since the tapered region of the end B of the second conductive pattern 108 becomes the same as the end B of the second metal layer 108b, the end B of the second conductive pattern 108 is compared with the prior art. The taper formation at is easy and its thickness is lowered.

Since only the second metal layer 108b, which is a single metal layer of the second conductive pattern 108, is positioned on the insulating layer 106, even if the third conductive pattern 115 is formed as shown in FIG. 5, the third conductive pattern 115 is formed. Step B in Fig. 2) appears small. As a result, the disconnection problem in the step B area in the third conductive pattern 115 does not occur.

In the second conductive pattern 108, since the first metal layer 108a is positioned in the contact hole 110, only the second metal layer 108b has a taper substantially in the patterning process. Accordingly, compared to the case of etching two metal layers having different characteristics, it is possible to form a taper at the end B of the second conductive pattern 108 much more easily. As a result, another third conductive pattern 115 to be formed later is not disconnected by the stepped region B in the second conductive pattern 108.

Hereinafter, the method of forming the pad region of FIG. 4 will be described with reference to FIGS. 6A to 6F.

After the first conductive material is formed on the substrate 102, the first conductive material is patterned by a photolithography process and an etching process to form the first conductive pattern 104 as illustrated in FIG. 6A.

After the insulating material is deposited on the substrate 102 on which the first conductive pattern 104 is formed, the insulating material is patterned by a photolithography process and an etching process to form the first conductive pattern 104 as shown in FIG. 6B. An insulating film 106 having a contact hole 110 partially exposed is formed.

After the photoresist is applied onto the substrate 102 on which the insulating film 106 is formed, a photolithography process including an exposure and development process is performed to expose the contact hole 110 as shown in FIG. 6C. Pattern 112 is formed. Subsequently, the first metal material 108c is entirely deposited as shown in FIG. 6D.

Subsequently, the photoresist pattern 112 is removed by performing a lift off process, and at the same time, only the first metal material 108c formed to overlap the photoresist pattern 112 is removed and the photoresist pattern 112 is removed. The non-overlapping first metal material 108c remains. Accordingly, as shown in FIG. 6E, the pattern of the first metal layer 108a remains only on the bottom and side surfaces of the contact hole 110 in the contact hole 110.

After the first metal layer 108a is inserted into the contact hole 110 and the second metal material is deposited, a photolithography process and an etching process are performed to form the second metal layer 108b as illustrated in FIG. 6F. do. As a result, a second conductive pattern 108 including a double layer of the first metal layer 108a and the second metal layer 108b is formed. Here, in the second conductive pattern 108, the second conductive pattern 115 is located outside the contact hole 110 and on the insulating layer 106 so that only the second metal layer 108b is located. Even if the second conductive pattern 108 is formed on the second conductive pattern 108, the disconnection problem of the third conductive pattern 115 due to the step is not generated.

In addition, in the process of patterning the second metal layer 108b, only a single second metal layer 108b is patterned by an etching process, so that a taper at the end of the second metal layer 108b may be smoothly formed. Accordingly, the disconnection problem may be further prevented when the third conductive pattern 115 is formed.

FIG. 7 is a diagram illustrating a thin film transistor of a polycrystalline liquid crystal display device formed using the method described with reference to FIGS. 4 to 6F.

The thin film transistor may include an active layer 214 formed on the buffer layer 202, a gate electrode 206 formed on the gate insulating layer 212, and a source formed on both sides of the gate electrode 206. Drain electrodes 208 and 210 are provided.

The active layer 214 is formed of polysilicon on the lower substrate 201 with the buffer layer 202 interposed therebetween. The gate electrode 206 is formed to overlap the active layer 214 with the gate insulating film 212 interposed therebetween. The source electrode 208 and the drain electrode 210 are formed to be insulated from the gate electrode 206 with the interlayer insulating film 216 therebetween, and a source contact hole formed through the interlayer insulating film 216 and the gate insulating film 212. The source region 214S and the drain region 214D of the active layer 214 are respectively contacted through the 204S and the drain contact hole 204D.

The pixel electrode 222 is formed of a transparent conductive material on the passivation layer 220 formed to cover the source and drain electrodes 208 and 210 and the drain electrode 210 through the pixel contact hole 224 penetrating the passivation layer 220. ) Is connected.

Here, the source and drain electrodes 208 and 210 have a double structure. The source and drain electrodes 208 and 210 are used to prevent diffusion with the active layer, and are formed of molybdenum or the like, and are located in the source contact hole 204S and the drain contact hole 204D. And a second metal layer formed of aluminum or the like to cover the first metal layer 208a.

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The pixel electrode 222 covers the first metal layer 222a and the first metal layer 222a which are formed on the bottom and side surfaces of the pixel contact hole 224 in molybdenum or aluminum for good contact with the drain electrode 210. The second metal layer 222b is formed of a transparent conductive material (eg, ITO).

Meanwhile, as another embodiment, the source and drain electrodes 208 and 210 may be formed in a triple structure. For example, the source and drain electrodes 208 and 210 are used to prevent diffusion with the active layer and are made of molybdenum or the like and are located in the source contact hole 204S and the drain contact hole 204D. 208a, a second metal layer 208a formed to cover the first metal layer 208a, and made of aluminum or the like, and formed of molybdenum or the like on the second metal layer 208a to make contact with the pixel electrode 222. It can have a triple structure which consists of a 3rd metal layer to improve.

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The manufacturing method of the display device according to the present invention is not only a liquid crystal display (LCD) but also an electrode layer, an organic layer, It can be applied to any process for patterning the inorganic layer or the like.

As described above, the display device and the method of manufacturing the same according to the present invention, when the upper conductive pattern consisting of at least a double layer is in contact with the lower conductive pattern located below through the contact hole penetrating the insulating film, the upper conductive pattern The lower metal layer constituting the above is positioned in the contact hole. Accordingly, the step difference between the upper conductive pattern and the insulating layer can be reduced, so that even if another third conductive pattern is formed on the upper conductive pattern, the third conductive pattern is disconnected due to the step of the upper conductive pattern. Will not be.

In addition, since the metal layer located outside the contact hole among the upper conductive patterns may be formed as a single layer, a gentle taper may be easily formed at the end of the upper conductive pattern. Accordingly, even if the third conductive pattern is formed on the upper conductive pattern, the disconnection problem due to the step can be further prevented.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (14)

  1. A display device comprising upper and lower conductive patterns contacting each other through a contact hole penetrating an insulating film.
    The upper conductive pattern is
    At least one first metal layer formed only on a bottom surface and a side surface of the contact hole; And
    A second metal layer covering the first metal layer in the contact hole and in direct contact with a surface of the insulating layer;
    The first metal layer comprises molybdenum,
    And the second metal layer comprises aluminum.
  2. The method of claim 1,
    And upper and lower conductive patterns contacting through the contact hole constitute a part of a pad part of the display device.
  3. The method of claim 1,
    The display device is a liquid crystal display panel,
    And the lower conductive pattern is a drain electrode of a thin film transistor, and the upper conductive pattern is a pixel electrode.
  4. The method of claim 3, wherein
    The thin film transistor
    And a polysilicon semiconductor pattern disposed under the drain electrode.
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  6. Forming a lower conductive pattern;
    Forming an insulating film having a contact hole exposing the lower conductive pattern; And
    Forming an upper conductive pattern in contact with the lower conductive pattern through the contact hole;
    Forming the upper conductive pattern,
    Forming at least one first metal layer formed only on a bottom surface and a side surface of the contact hole; And
    Forming a second metal layer covering the first metal layer in the contact hole and in direct contact with a surface of the insulating layer;
    The first metal layer comprises molybdenum,
    And the second metal layer comprises aluminum.
  7. The method of claim 6,
    Forming a first metal layer in the contact hole
    Forming a photoresist pattern on the insulating layer and exposing the contact hole;
    Forming a first metal material in the photoresist pattern and the contact hole;
    And removing the photoresist pattern and removing a first metal material overlapping the photoresist pattern, and leaving the first metal material in the contact hole.
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  11. A buffer film formed on the substrate;
    An active layer formed on the buffer layer and including a source region and a drain region;
    A gate insulating film formed on the buffer film to cover the active layer;
    A gate electrode of the thin film transistor formed on the gate insulating film;
    An interlayer insulating film formed on the gate insulating film to cover the gate electrode and including a source contact hole exposing a source region of the active layer and a drain contact hole exposing a drain region of the active layer;
    A source electrode of the thin film transistor contacting the source region of the active layer through the source contact hole;
    A drain electrode of the thin film transistor contacting the drain region of the active layer through the drain contact hole;
    A passivation layer formed on the interlayer insulating layer to cover the source electrode and the drain electrode of the thin film transistor and including a pixel contact hole exposing a portion of the drain electrode of the thin film transistor; And
    A pixel electrode contacting the drain electrode of the thin film transistor through the pixel contact hole;
    Each of the source electrode, the drain electrode, and the pixel electrode includes a first metal layer and a second metal layer formed on the first metal layer;
    The first metal layer of the source electrode is formed only on the bottom and side surfaces of the source contact hole, and the second metal layer of the source electrode covers the first metal layer of the source electrode in the source contact hole and directly contacts the surface of the interlayer insulating layer. Contact,
    The first metal layer of the drain electrode is formed only on the bottom and side surfaces in the drain contact hole, and the second metal layer of the drain electrode covers the first metal layer of the drain electrode in the drain contact hole and directly contacts the surface of the interlayer insulating layer. Contact,
    A first metal layer of each of the source electrode and the drain electrode includes molybdenum, a second metal layer of each of the source electrode and the drain electrode includes aluminum,
    The first metal layer of the pixel electrode is formed only on the bottom and side surfaces of the pixel contact hole, and the second metal layer of the pixel electrode covers the first metal layer of the pixel electrode and directly contacts the surface of the passivation layer in the pixel contact hole. Display device characterized in that.
  12. delete
  13. The method of claim 11,
    The first metal layer of the pixel electrode includes molybdenum or aluminum,
    And the second metal layer of the pixel electrode comprises a transparent conductive material.
  14. The method of claim 11,
    Each of the source electrode and the drain electrode,
    And a third metal layer formed of molybdenum on the second metal layer to improve contact with the pixel electrode.
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US9640557B2 (en) 2013-04-03 2017-05-02 Mitsubishi Electric Corporation TFT array substrate and method for producing the same

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JP2005122182A (en) 2003-10-14 2005-05-12 Lg Phillips Lcd Co Ltd Thin-film transistor substrate for display device and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
JP2005122182A (en) 2003-10-14 2005-05-12 Lg Phillips Lcd Co Ltd Thin-film transistor substrate for display device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9640557B2 (en) 2013-04-03 2017-05-02 Mitsubishi Electric Corporation TFT array substrate and method for producing the same

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