KR101210125B1 - Insulating layer polishing slurry composition and method for fabricating semiconductor device using the same - Google Patents

Insulating layer polishing slurry composition and method for fabricating semiconductor device using the same Download PDF

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KR101210125B1
KR101210125B1 KR1020100127889A KR20100127889A KR101210125B1 KR 101210125 B1 KR101210125 B1 KR 101210125B1 KR 1020100127889 A KR1020100127889 A KR 1020100127889A KR 20100127889 A KR20100127889 A KR 20100127889A KR 101210125 B1 KR101210125 B1 KR 101210125B1
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South Korea
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polishing slurry
slurry composition
metal
insulating film
film
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KR1020100127889A
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Korean (ko)
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KR20120066515A (en
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박재근
박진형
임재형
조종영
최호
황희섭
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한양대학교 산학협력단
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell

Abstract

An insulating film polishing slurry composition and a method of manufacturing a semiconductor device using the same are provided. The semiconductor manufacturing method first forms a magnetic ram unit having a lower electrode, a magnetic tunnel junction and an upper electrode sequentially stacked on a substrate. An oxide film covering the magnetic ram unit is formed. The oxide film is chemically mechanically polished until the upper electrode is exposed using an oxide film polishing slurry composition containing an abrasive, a dispersant, a metal passivation agent having an amine group, and a balance diluent.

Description

Insulating layer polishing slurry composition and method for fabricating semiconductor device using the same

The present invention relates to a polishing slurry composition, and more particularly to a slurry composition for insulating film polishing and a semiconductor device manufacturing method using the same.

Semiconductor devices are reaching ULSI through high performance and high integration. In such ULSI, not only the minimum line width has a submicron size, but there is a need for interconnecting multilayer wiring. In the case where the wiring having a very small line width is formed in multiple layers, it may be difficult to secure a lithography margin toward the upper layer. Therefore, it is essential to planarize each layer entirely in order to secure lithography margins. To this end, chemical mechanical polishing (CMP) has been developed.

On the other hand, recently developed nonvolatile memory devices often use a metal having a higher hardness as an electrode than aluminum or copper. However, the development of a CMP slurry capable of exhibiting an appropriate selectivity in the planarization process after forming the high hardness metal electrode is insignificant.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide an insulating film polishing slurry composition having a high selection ratio of an insulating film to a hard metal, and to provide a method of manufacturing a semiconductor device using the same.

In order to achieve the above technical problem, an aspect of the present invention provides a semiconductor manufacturing method. First, a magnetic RAM unit having a lower electrode, a magnetic tunnel junction, and an upper electrode sequentially stacked on a substrate is formed. An oxide film covering the magnetic ram unit is formed. The oxide film is chemically mechanically polished until the upper electrode is exposed using an oxide film polishing slurry composition containing an abrasive, a dispersant, a metal passivation agent having an amine group, and a balance diluent.

In order to achieve the above technical problem, an aspect of the present invention provides another semiconductor manufacturing method. First, a metal pattern is formed on a substrate. An insulating layer covering the metal pattern is formed on the metal pattern. The insulating film is chemically mechanically polished until the metal pattern is exposed using an insulating film polishing slurry composition containing an abrasive, a dispersant, a metal passivation agent having an amine group, and a residual diluent.

Another aspect of the present invention to achieve the above technical problem provides an insulating film polishing slurry composition. The insulating film polishing slurry composition contains 0.1 to 10 wt% abrasive, 0.0001 to 10 wt% dispersant based on the weight of the abrasive, a metal passivation agent having 0.05 to 3 wt% amine groups, and the balance diluent. The abrasive may be ceria. The metal passivation agent may be polyacrylamide, polymethacrylamide, polyalkyleneimine, aminoalcohol, or alkylamine. PH of the insulating film polishing slurry composition may be 8 to 11. The insulating film polishing slurry composition may consist essentially of an abrasive, a dispersant, a metal passivation agent having an amine group, a pH adjuster, and a balance diluent.

As described above, according to the present invention, the insulating film polishing slurry composition contains a metal passivation agent having an amine group, so that the insulating film can be polished without damaging the metal pattern. As a result, an insulating film is laminated on a high-hardness metal pattern that is difficult to apply the damascene process, and a flattened insulating film is disposed around the metal pattern without damaging the metal pattern, thereby obtaining the same result as the result of applying the damascene process. have.

1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.
2A and 2B are graphs showing the polishing rates for the Ta film and the silicon oxide film of the polishing slurry compositions of Comparative Examples and Preparation Examples 1 to 4, respectively, and FIG. 2C is the polishing slurry of Comparative Examples and Preparation Examples 1 to 4, respectively. It is a graph showing the polishing selectivity of the silicon oxide film to the Ta film of the composition.
3A and 3B are graphs showing the polishing rates for the Ta film and the silicon oxide film of the polishing slurry compositions of Comparative Examples and Preparation Examples 5 to 9, respectively, and FIG. 3C is the polishing slurry of Comparative Examples and Preparation Examples 5 to 9, respectively. It is a graph showing the polishing selectivity of the silicon oxide film to the Ta film of the composition.
4A and 4B are graphs showing polishing rates of Ta and silicon oxide films of the polishing slurry compositions of Comparative Examples and Preparation Examples 2, 3, 5, 6, 10 to 13, respectively, and FIG. It is a graph which shows the polishing selectivity of the silicon oxide film with respect to the Ta film of the polishing slurry compositions of Examples 2, 3, 5, 6, 10-13.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments disclosed herein are provided so that the disclosure can be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like reference numerals designate like elements throughout the specification.

<Insulation film polishing Slurry  Composition>

The insulating film polishing slurry composition according to one embodiment of the present invention may contain an abrasive, a dispersant, a metal passivation agent, and a balance diluent.

The abrasive may be silica (eg colloidal silica or fumed silica), ceria, alumina, titania, zirconia and germania (eg, colloidal silica or fumed silica). It may be a metal oxide selected from the group consisting of germania). Preferably, the abrasive may be ceria having a high polishing selectivity of the silicon oxide film with respect to the metal film. The abrasive may be contained in the polishing slurry composition 0.1 to 10wt%, specifically 0.2 to 3wt%, more specifically 0.5 to 2wt% based on the solid content.

The dispersant may be an anionic polymer dispersant as a material capable of suppressing aggregation of the abrasive. As an example, it may be polymethacrylic acid, polyacrylic acid, ammonium polymethacrylate, ammonium polycarboxylate, or carboxyl-acrylic polymer. The dispersant may be contained in 0.0001 to 10.0 wt% based on the weight of the abrasive.

The metal film passivation agent is a material having an excellent bonding force with respect to the metal film compared to an insulating film, for example, a silicon oxide film, and is a material capable of relatively reducing the polishing rate of the metal film by selectively forming a passivation film on the metal film. . The metal film may be, for example, tantalum (Ta), ruthenium (Ru), titanium (Ti), or tungsten (W). Nitrogen may be doped in the metal film. Since such a hard metal film can be considerably difficult to polish, it is difficult to apply the so-called damascene process of forming a groove in the insulating film and then forming a metal film in the groove and on the insulating film, and then polishing the metal film until the insulating film is exposed. Can be. Therefore, when the metal pattern is formed using the high hardness metal film, after forming the metal pattern by patterning the high hardness metal film, an insulating film covering the metal pattern is formed and the insulating film is formed until the metal pattern is exposed. The process of grinding | polishing is preferable.

The metal film passivation agent is a material capable of coordinating to the metal, and may be a single molecule or a polymer organic material containing an amine group. As an example, the metal film passivation agent may be polyacrylamide, polymethacrylamide, polyalkyleneimine, aminoalcohol, or alkylamine. The weight average molecular weight of the polyacrylamide or the polymethacrylamide may be 1,000 to 500,000, preferably 2,000 to 100,000, and more preferably 3,000 to 10,000. The aminoalcohol may be aminomethylpropanol (AMP). The alkylamine may be ethylenediamine (EDA) or diethylenetriamine (DETA). The polyalkyleneimine may be polyethyleneimine.

The metal film passivation agent may be contained in the polishing slurry composition at 0.05 to 3 wt%. As an example, when the metal film passivation agent is aminomethylpropanol (AMP), the aminomethylpropanol may be contained in the polishing slurry composition at 0.5 to 3 wt%, specifically 1 to 2 wt% . When the metal film passivation agent is polyacrylamide, the polyacrylamide may be contained in the polishing slurry composition at 0.05 to 0.3 wt%, specifically 0.1 to 0.3 wt%. In addition, when the metal film passivation agent is ethylenediamine, the ethylenediamine may be contained in 0.1 to 1.5 wt%, specifically 0.5 to 1.0 wt% in the polishing slurry composition. When the metal film passivation agent is diethylene triamine, the diethylene triamine may be contained in the polishing slurry composition at 0.1 to 1 wt%, specifically 0.25 to 0.75 wt%.

The diluent may be water, preferably deionized water.

The pH of the polishing slurry composition may be 3 to 11. As an example, the pH of the polishing slurry composition may exhibit a basicity of greater than 7 so that the metal film may not be oxidized and the metal passivation agent may facilitate coordination on the metal film. To this end, the polishing slurry composition may further contain a pH adjuster. The pH adjusting agent may be TMAH (TetraMethylAmmonium Hydroxide), KOH, NaOH, NH 4 OH, HCl, HNO 3 , H 2 SO 4 , or H 3 PO 4 . The pH of the polishing slurry composition may be 8 to 11, specifically 9 to 10.

The polishing slurry composition may be prepared by mixing ceria suspension containing a part of the abrasive, the dispersant, and the pH adjusting agent with a metal passivating agent and a diluent, and further adjusting the pH of the resultant with a pH adjusting agent.

This polishing slurry composition may consist essentially of the abrasive, the dispersant, the metal passivation agent with the amine group, the pH adjuster and the remainder diluent. In other words, the polishing slurry composition may not have a component such as a metal oxidant, so that polishing of the metal may also be suppressed.

<Insulation film polishing Slurry  Manufacturing Method of Semiconductor Device Using Composition>

1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 1A, a lower insulating film 20 is formed on a substrate 10. Before forming the lower insulating film 20, a transistor (not shown) may be formed on the substrate 10. A contact plug 25 may be formed in the lower insulating film 20 to electrically connect the transistor. The contact plug 25 may form a contact hole in the lower insulating film 20, and then, a contact plug conductive film may be coated on the inside of the contact hole and the lower insulating film 20, and the contact plug conductive film may be formed on the lower insulating film. It can be formed by chemical mechanical polishing (CMP) until (20) is exposed.

A lower electrode 31 is formed on the contact plug 25 and the lower insulating layer 20 around the contact plug 25. The lower electrode 31 may be formed of TiN.

A magnetic tunnel junction (MTJ) structure is formed on the lower electrode 31. The MTJ structure may include a pinning layer (not shown), a ferromagnetic pinned layer 33, a tunnel barrier layer 35, and a ferromagnetic free layer 37 that are sequentially stacked. have. Each layer of the MTJ structure may be formed using a suitable method such as sputtering.

The pinning layer may be an anti-ferromagnetic layer magnetically aligned in the y-axis direction. For example, MnPt, IrMn, NiMn, OsMn, RuMn, RhMn, PdMn, RuRhMn, or MnPtPd It can be formed as. The pinned layer 33 may be a single layer of CoFeB. The tunnel barrier layer 35 may be an MgO layer, an AlOx layer, or an AlTiOx layer. The free layer 37 may be formed of CoFeB, CoFe, NiFe, or a combination thereof.

An upper electrode 39 is formed on the MTJ structure. The upper electrode 39 is an example of a metal film having a Mohs hardness of 6 or more, and may be tantalum (Ta), ruthenium (Ru), titanium (Ti), or tungsten (W). The upper electrode 39 may be a metal film doped with nitrogen. The upper electrode 39 is PVD (Physical Vapor Deposition) method, for example, DC magnetic sputtering method, CVD (Chemical Vapor Deposition) method, MOCVD (Metal Organic CVD) method, ALD (Atomic Layer Deposition) method, Or it can form using the AL-CVD method which mixed CVD method and ALD method.

Referring to FIG. 1B, a mask pattern (not shown) is formed on the upper electrode 39, and the upper electrode 39, the MTJ structure, and the lower electrode 31 are formed using the mask pattern as an etch mask. May be etched to form the magnetic ram unit 30. Such patterning may be performed using a reactive ion etching method (ICP-RIE) using an inductive coupled plasma. In addition, the mask pattern may include a hard mask pattern and / or a photoresist pattern.

An upper insulating layer 40 is formed on the magnetic ram unit 30. The upper insulating film 40 is formed to a thickness sufficient to cover the magnetic ram unit 30. The upper insulating film 40 may be a silicon oxide film, for example, a BoronPhosphoSilicate Glass (BPSG) film, a PhosphoSilicate Glass (PSG) film, a High Density Plasma (HDP) film, a Tetra Ethyl Ortho Silicate (TEOS) film, or an Undoped Silica Glass (USG) film. Film, PETEOS film or HARP (High Aspect Ratio Process) film.

Referring to FIG. 1C, the substrate on which the upper insulating film 40 is formed is loaded into a chemical mechanical polisher, and the polishing slurry composition (not shown) and the polishing pad (not shown) are described on the upper insulating film 40. ) And polish the upper insulating film 40 until the upper electrode 39 is exposed. In addition, the polishing may be performed for a predetermined time even after the upper electrode 39 is exposed for sufficient polishing.

When the upper electrode 39 is exposed, a metal film passivation agent in the polishing slurry composition may selectively form a passivation film on the upper electrode 39. As a result, the polishing rate of the upper insulating film 40 is higher than the polishing rate of the upper electrode 39, so that the upper insulating film 40 may be polished without damaging the upper electrode 39.

Hereinafter, preferred examples are provided to aid the understanding of the present invention. However, the following experimental examples are only for helping understanding of the present invention, and the present invention is not limited to the following experimental examples.

<Polishing slurry composition preparation examples>

Deionized water was added to the ceria suspension containing ceria particles to dilute it, and a metal film passivation agent was added thereto, followed by addition of HNO 3 to bring the pH to 9.2. This resultant was sufficiently stirred to prepare a polishing slurry composition.

Table 1 below shows the composition of the prepared polishing slurry composition.

Ceria
[wt%]
Metal film passivation agent
[wt%]
pH
Production Example 1 0.75 Polyacrylamide
(PAM)
0.025 9.2
Production Example 2 0.05 Production Example 3 0.1 Production Example 4 0.3 Production Example 5 2-amino-2-methyl-1-propanol
(AMP)
0.5
Production Example 6 One Production Example 7 2 Production Example 8 3 Production Example 9 4 Production Example 10 Ethylenediamine
(EDA)
0.5
Production Example 11 1.0 Production Example 12 Diethylene
Triamine
(DETA)
0.5
Production Example 13 1.0 Comparative example -

The above production was carried out under the conditions of using POLI-300 as the polishing equipment, IC 1000 / Suba IV CMP pad (Rohm & Hass) as the polishing pad, and the down pressure of 6 psi and the speed of the table and the spindle to 70 rpm. The polishing slurry composition prepared through the examples was supplied at 100 mL / min to polish the Ta film and the PETEOS silicon oxide film for 30 seconds each.

2A and 2B are graphs showing the polishing rates for the Ta film and the silicon oxide film of the polishing slurry compositions of Comparative Examples and Preparation Examples 1 to 4, respectively, and FIG. 2C is the polishing slurry of Comparative Examples and Preparation Examples 1 to 4, respectively. It is a graph showing the polishing selectivity of the silicon oxide film to the Ta film of the composition.

2A to 2C, in the case of using the polishing slurry composition containing PAM as the metal film passivation agent, Ta polishing rate is continuously decreased until the PAM content is 0.05 wt% (see FIG. 2A). The polishing rate of the oxide film is increased (see FIG. 2B), and the polishing selectivity of the silicon oxide film with respect to the Ta film tends to be increased (see FIG. 2C), but when the PAM content is 0.05 wt% or more, all tend to saturate. .

Referring to this, it can be seen that the content of PAM in the polishing slurry composition is preferably 0.05 wt% or more, and more preferably 0.1 wt% or more.

3A and 3B are graphs showing the polishing rates for the Ta film and the silicon oxide film of the polishing slurry compositions of Comparative Examples and Preparation Examples 5 to 9, respectively, and FIG. 3C is the polishing slurry of Comparative Examples and Preparation Examples 5 to 9, respectively. It is a graph showing the polishing selectivity of the silicon oxide film to the Ta film of the composition.

3A to 3C, in the case of using the polishing slurry composition containing AMP as the metal film passivation agent, the Ta polishing rate decreases until the content of AMP reaches 1wt% (see FIG. 3A) and the polishing of the silicon oxide film is performed. The rate is increased (see FIG. 3B), and the polishing selectivity of the silicon oxide film to the Ta film tends to increase (see FIG. 3), but the opposite tendency is observed when the content of AMP is 1 wt% or more.

Referring to this, the content of AMP in the polishing slurry composition is preferably 0.05 to 3 wt%, more preferably 1 to 2 wt%.

4A and 4B are graphs showing polishing rates of Ta and silicon oxide films of the polishing slurry compositions of Comparative Examples and Preparation Examples 2, 3, 5, 6, 10 to 13, respectively, and FIG. It is a graph which shows the polishing selectivity of the silicon oxide film with respect to the Ta film of the polishing slurry compositions of Examples 2, 3, 5, 6, 10-13. However, the concentration of PAM is shown in the graph on the basis of the multiplied by 10 to the actual concentration used.

4A to 4C, it can be seen that as the molecular weight of the metal film passivation agent containing the amine group increases, the polishing selectivity of the silicon oxide film to the Ta film increases.

In addition, when the slurry composition was left for 1 day, slurry aggregation occurred when the content of EDA and AMP exceeded 1 wt%, and DETA aggregated even at 1 wt%. From these results, it can be seen that the most preferred material for the metal film passivation agent is PAM.

In the above, the present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications and changes by those skilled in the art within the spirit and scope of the present invention. You can change it.

Claims (14)

Forming a magnetic ram unit having a lower electrode, a magnetic tunnel junction, and an upper electrode sequentially stacked on the substrate;
Forming an oxide film on the magnetic ram unit to cover the oxide film; And
Chemical mechanical polishing of the oxide film until the upper electrode is exposed, using an oxide polishing slurry composition containing an abrasive, a dispersant, a metal passivation agent and a balance diluent, wherein the metal passivation agent is polyacrylamide or polymethacrylamide. A semiconductor device manufacturing method comprising the step of.
The method of claim 1,
The upper electrode is tantalum (Ta), ruthenium (Ru), titanium (Ti), or tungsten (W).
The method of claim 1,
The pH of the oxide film polishing slurry composition is a method of manufacturing a semiconductor device.
The method of claim 3,
The oxide film polishing slurry composition is essentially a semiconductor device manufacturing method comprising a metal passivation agent, a pH adjusting agent, and a diluent of a balance, a dispersant, a polyacrylamide or a polymethacrylamide.
Forming a metal pattern on the substrate;
Forming an insulating film covering the metal pattern on the metal pattern; And
Chemically polishing the insulating film until the metal pattern is exposed, using an insulating film polishing slurry composition containing an abrasive, a dispersant, a metal passivation agent and a balance diluent, wherein the metal passivation agent is polyacrylamide or polymethacrylamide. A semiconductor device manufacturing method comprising the step of.
The method of claim 5,
The metal pattern has a Mohs hardness of 6 or more.
The method according to claim 6,
The metal pattern is tantalum (Ta), ruthenium (Ru), titanium (Ti), or tungsten (W).
The method of claim 5,
PH of the insulating film polishing slurry composition is 8 to 11 method of manufacturing a semiconductor device.
9. The method of claim 8,
The insulating film polishing slurry composition is essentially composed of a metal passivation agent, a pH adjusting agent, and a diluent of a remainder, which is an abrasive, a dispersant, a polyacrylamide or a polymethacrylamide.
0.1 to 10 wt% abrasive;
0.0001 to 10 wt% of a dispersant based on the weight of the abrasive;
0.05-3 wt% of a metal passivating agent which is polyacrylamide or polymethacrylamide; And
An insulating film polishing slurry composition containing the balance diluent.
The method of claim 10,
And the abrasive is ceria.
delete The method of claim 10,
PH of the insulating film polishing slurry composition is 8 to 11 insulating film polishing slurry composition.
The method of claim 13,
And the insulating film polishing slurry composition consists essentially of an abrasive, a dispersant, a metal passivation agent that is a polyacrylamide or a polymethacrylamide, a pH adjuster, and a diluent of the balance.
KR1020100127889A 2010-12-14 2010-12-14 Insulating layer polishing slurry composition and method for fabricating semiconductor device using the same KR101210125B1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10116490A (en) 1996-08-23 1998-05-06 Motorola Inc Magnetic random access memory having laminated memory cells and its manufacture
KR100640600B1 (en) 2003-12-12 2006-11-01 삼성전자주식회사 Slurry compositions, and fabrication method of semiconductor device including CMPchemical mechanical polishing process using the same
KR100734305B1 (en) 2006-01-17 2007-07-02 삼성전자주식회사 Fabrication method of semiconductor device having dishing-free planarized layer and semiconductor device fabricated using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10116490A (en) 1996-08-23 1998-05-06 Motorola Inc Magnetic random access memory having laminated memory cells and its manufacture
KR100640600B1 (en) 2003-12-12 2006-11-01 삼성전자주식회사 Slurry compositions, and fabrication method of semiconductor device including CMPchemical mechanical polishing process using the same
KR100734305B1 (en) 2006-01-17 2007-07-02 삼성전자주식회사 Fabrication method of semiconductor device having dishing-free planarized layer and semiconductor device fabricated using the same

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