KR101207970B9 - 플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법 - Google Patents

플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법

Info

Publication number
KR101207970B9
KR101207970B9 KR1020100077436A KR20100077436A KR101207970B9 KR 101207970 B9 KR101207970 B9 KR 101207970B9 KR 1020100077436 A KR1020100077436 A KR 1020100077436A KR 20100077436 A KR20100077436 A KR 20100077436A KR 101207970 B9 KR101207970 B9 KR 101207970B9
Authority
KR
South Korea
Prior art keywords
flash
converter
power consumption
circuit design
low power
Prior art date
Application number
KR1020100077436A
Other languages
English (en)
Other versions
KR101207970B1 (ko
KR20120015155A (ko
Inventor
원종한
정우경
Original Assignee
정태경
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정태경 filed Critical 정태경
Priority to KR1020100077436A priority Critical patent/KR101207970B1/ko
Publication of KR20120015155A publication Critical patent/KR20120015155A/ko
Application granted granted Critical
Publication of KR101207970B1 publication Critical patent/KR101207970B1/ko
Publication of KR101207970B9 publication Critical patent/KR101207970B9/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
KR1020100077436A 2010-08-11 2010-08-11 플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법 KR101207970B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020100077436A KR101207970B1 (ko) 2010-08-11 2010-08-11 플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020100077436A KR101207970B1 (ko) 2010-08-11 2010-08-11 플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법

Publications (3)

Publication Number Publication Date
KR20120015155A KR20120015155A (ko) 2012-02-21
KR101207970B1 KR101207970B1 (ko) 2012-12-04
KR101207970B9 true KR101207970B9 (ko) 2021-11-19

Family

ID=45838000

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100077436A KR101207970B1 (ko) 2010-08-11 2010-08-11 플래시형 ａｄ 변환기의 저전력화 및 최소 면적의 구현에 관한 회로설계의 구조와 그 방법

Country Status (1)

Country Link
KR (1) KR101207970B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110535470B (zh) * 2019-08-26 2022-06-14 中国电子科技集团公司第二十四研究所 一种比较器时钟产生电路及高速逐次逼近型模数转换器

Also Published As

Publication number Publication date
KR101207970B1 (ko) 2012-12-04
KR20120015155A (ko) 2012-02-21

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