KR101197267B1 - Cmos mixer for use in a direct conversion receiver - Google Patents

Abstract

A mixer for use in a direct diffusion receiver is disclosed. The mixer according to this embodiment of the present invention is a field effect transistors (FET: Field Effect Transistors) M1 ~ M6, the current source IBias, two load resistors (RLoad), another FET M21, two inductors L1, L2. The FET M21 constitutes a current bleeding circuitry according to an embodiment of the present invention, and other components except two inductors constitute a so-called Gilbert Cell Mixer.

Mixers, direct diffusion receivers, current bleeding circuits, inductors

Description

Mixer for use in direct diffusion receivers {CMOS MIXER FOR USE IN A DIRECT CONVERSION RECEIVER}

1 is a view showing the configuration of a direct conversion receiver to which the present invention is applied.

2 shows a circuit configuration of a mixer according to a first embodiment of the present invention.

FIG. 3 shows an equivalent circuit of the mixer shown in FIG. 2. FIG.

4 shows a circuit configuration of a mixer according to a second embodiment of the present invention.

FIG. 5 shows an equivalent circuit of the mixer shown in FIG. 4. FIG.

6 is a graph showing the conversion gain of the mixer according to the second embodiment of the present invention.

7A is a graph showing the flicker corner frequencies of the mixer according to the first embodiment of the present invention.

7b is a graph showing the flicker corner frequency of the mixer according to the second embodiment of the present invention.

The present invention relates to a mixer in a communication system, and more particularly to a mixer for use in a direct conversion receiver.

In general, a mixer or mixer circuit (hereinafter, referred to as a "mixer") refers to a circuit that converts an input signal into a signal of a desired frequency band. Such mixers are not only used in transmitters and receivers in communication systems, but also widely applied in other areas.

An example of typical use is a mixer for use in a direct conversion receiver of a mobile communication system. The mixer inputs a radio frequency (hereinafter referred to as "RF") signal and mixes the input RF signal with a signal from a local oscillator (hereinafter referred to as "LO") to which the applied RF signal is applied. Frequency (hereinafter referred to as "IF") signal is output. Such a mixer is generally implemented as a complementary metal oxide semiconductor (hereinafter referred to as "CMOS").

1 is a diagram schematically illustrating a configuration of a direct spread receiver of a mobile communication system to which the present invention is applied.

Referring to FIG. 1, an antenna 10 receives a signal on a radio. A band pass filter (BPF) 20 performs band pass filtering on the signal received by the antenna 10. The low noise amplifier (LNA) 30 inputs the RF signal filtered through the band pass filter by the band pass filter 20 to low noise amplify the signal. The mixer 40 inputs the RF signal low noise amplified by the low noise amplifier 30, mixes the input RF signal with a local oscillation signal applied from a local oscillator (not shown), and outputs a frequency converted IF signal.

Mixer 40 shown in FIG. 1 may be implemented as a CMOS mixer as described above. A major concern in designing such CMOS mixers is to improve conversion gain and linearity, and to reduce flicker noise. Here, flicker noise is noise that is inversely proportional to frequency and is prominent in a low frequency CMOS below several MHz, and is also called "1 / f noise". In order to reduce flicker noise, conventional CMOS mixers have been proposed as follows.

<Prior Art 1>;

Zhang, Z .; Chen, Z .; Lau, J., "A 900 MHz CMOS balanced harmonic mixer for direct conversion receivers," IEEE Radio and Wireless Conference, 2000. pp. 219-222, Sept. 2000

Prior art 1 proposes a mixer with a static current bleeding circuitry. However, this prior art 1 has the following disadvantages.

First, additional flicker noise occurs from current bleeding circuitry.

Second, the impedance (rds) seen by the LO switch side is large due to the very small local oscillator (LO) switch current. Thus, some RF currents will flow into the PMOS bleeding circuit rather than LO switching devices, and the resulting gain reduces the conversion gain.

Third, some RF currents will be shunted out to tail capacitance.

Fourth, if the size of the LO switch is increased to reduce the inherent flicker noise, the tail capacitance will also increase and more RF current will flow in divided by the tail capacitance.

<Prior Art 2>;

Hooman Darabi, Janice Chiu, "A Noise cancellation technique in active-RF CMOS mixers," ISSCC, session 29, pp. 544-545, 2005

Prior art 2 proposes a mixer with a dynamic current bleeding circuitry. However, this prior art 2 has the following disadvantages.

First, the tail node voltage must be high enough to turn the PMOS circuit on and off for the dynamic current injection PMOS circuit.

Second, very high LO power is required to generate a high voltage at the tail node.

Third, the conversion gain is so low that it is close to 0dB that it is no different from an active mixer.

Fourth, the noise voltages at the LO + switches or LO- switches are different. In fact, it is impossible to inject the same amount of current dynamically at the same time into LO + switches or LO- switches. In particular, for I / Q mixer implementations, it is very difficult to synchronize.

<Prior Art 3>;

H. Sjoland, Ali Karimi-Sanjaani, and A.A. Abidi, "A merged CMOS LNA and Mixer for a WCDMA receiver," IEEE J. Solid State Circuits, vol. 38, NO. 6, pp. 1045-1050, June, 2003

Prior art 3 proposed a mixer with one paralleled connected inductor. However, this prior art 2 has the following disadvantages.

First, because high LO currents are used, the available headroom should be narrower than other approaches.

Second, the size of the inductor should be as large as 10 nanohenry (nH), and the Q of the inductor should be lower than that of the small size of the inductor.

Third, it is effective to resonate the tail capacitance to reduce flicker noise by only an indirect mechanism, not a direct mechanism.

<Prior Art 4>;

G. Montagna, R. Castello et al., "A 72mW CMOS 802.11a Direct Conversion Receiver with 3.5dB NF and 200kHz 1 / f Noise Corner," Symposium on VLSI Circuits Dig. Oct., 2004

Sining Zhou and Mau-Chung Frank Chang, "A CMOS Passive Mixer with Low Flicker Noise for Low-Power Direct-Conversion Receiver," IEEE J. Solid State Circuits, vol. 40, NO.5, pp. 1084-1093, May, 2005

Prior art 4 proposed a Mixer with Passive implementation. However, this prior art 4 has the following disadvantages.

First, the conversion gain is not good.

Second, the LNA gain required to minimize the contribution to baseband noise is very high.

Third, very high gain LNAs can oscillate very easily.

Fourth, because LNA has a very high gain, a high linearity mixer is required.

Fifth, it is not suitable for a wide range of applications because of poor gain flatness in bandwidth compared to other schemes.

Therefore, the present invention proposes a mixer for solving the problems of the mixers according to the prior art as described above.

According to the first aspect of the present invention, the mixer includes a first input terminal and a second input terminal for inputting a first signal, a third input terminal and a fourth input terminal for inputting a second signal, and outputting a third signal. And a first load resistor connected between the power supply voltage terminal and the first output terminal, and a second load resistor connected between the power supply voltage terminal and the second output terminal.

The mixer may include a source terminal connected to the first output terminal, a gate terminal connected to the third input terminal, a first transistor including a drain terminal, a source terminal connected to the second output terminal, and the first output terminal. A second transistor having a gate terminal connected to the fourth input terminal, a drain terminal, a source terminal connected to the drain terminals of the first and second transistors, a gate terminal connected to the first input terminal, and a current source. A third transistor having a drain terminal connected thereto, a source terminal connected to the first output terminal, a gate terminal connected to the fourth input terminal, a fourth transistor having a drain terminal, and a second output terminal connected to the second output terminal A fifth transistor including a source terminal, a gate terminal connected to the third input terminal, a drain terminal, and the fourth and fifth transistors A sixth transistor including a source terminal connected to the drain terminals, a gate terminal connected to the second input terminal, a drain terminal connected to the current source, a drain terminal connected to the power supply voltage terminal, and a voltage source A seventh transistor including a gate terminal, a source terminal connected to source terminals of the third and sixth transistors, a source terminal of the seventh transistor, a source of the third transistor, and a sixth transistor; Two inductors each connected between the terminals. Preferably, the inductors each have a value of 3.3 nanohenry (nH).

According to a second aspect of the present invention, a mixer includes a first input terminal RF + and a second input terminal RF- for inputting a high frequency RF signal, and a third input terminal for inputting a local oscillation LO signal. LO + and the fourth input terminal LO-, the first output terminal IF + and the second output terminal IF- for outputting the intermediate frequency IF signal, the power supply voltage terminal VDD and the first output terminal A first load resistor connected between IF +) and a second load resistor connected between the power supply voltage terminal VDD and the second output terminal IF−.

The mixer includes a first transistor M1 having a source terminal connected to the first output terminal IF +, a gate terminal connected to the third input terminal LO +, a drain terminal, and the second output terminal. A second transistor M2 having a source terminal connected to (IF-), a gate terminal connected to the fourth input terminal LO-, a drain terminal, the first and second transistors M1, A third transistor M3 including a source terminal connected to the drain terminals of M2, a gate terminal connected to the first input terminal RF +, a drain terminal connected to a current source IBias, and the first A fourth transistor M4 having a source terminal connected to an output terminal IF +, a gate terminal connected to the fourth input terminal LO-, a drain terminal, and a second output terminal IF-. A source terminal, a gate terminal connected to the third input terminal LO +, and a drain terminal A fifth transistor M5, a source terminal connected to the drain terminals of the fourth and fifth transistors M4 and M5, a gate terminal connected to the second input terminal RF-, and the current source. A sixth transistor M6 having a drain terminal connected to IBias, a drain terminal connected to the power supply voltage terminal VDD, a gate terminal connected to a voltage source VBias, and the third transistor M3. ) And a seventh transistor M21 including a source terminal connected to the source terminals of the sixth transistor M6, a source terminal of the seventh transistor M21, the third transistor M3, and the third transistor. Two inductors L1 and L2 are respectively connected between the source terminals of the six transistors M6. Preferably, the inductors each have a value of 3.3 nanohenry (nH).

The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that those skilled in the art may better understand the detailed description of the invention that follows.

Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. Those skilled in the art should recognize that the disclosed concepts and specific embodiments of the invention may be readily used as a basis for modifying or designing other structures for achieving the same purposes of the present invention. Those skilled in the art should also recognize that structures equivalent to the invention do not depart from the spirit and scope of the broadest form of the invention.

DETAILED DESCRIPTION Hereinafter, a detailed description of a preferred embodiment of the present invention will be described with reference to the accompanying drawings. It should be noted that reference numerals and like elements among the drawings are denoted by the same reference numerals and symbols as much as possible even though they are shown in different drawings. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

A. Principles of the Invention

The inventors of the present application have focused on the following facts to solve the problems of the mixers according to the prior art as described above.

(Fact 1) The current at the RF input must be large for good conversion gain.

(Fact 2) The current at the LO switching stage must be small to reduce the height of the flicker noise pulses.

The size of the (Fact 3) LO switch should be large enough to reduce the inherent flicker noise of the MOS.

(Fact 4) If the size of the LO switch increases, the tail capacitance (Cp) increases.

(Fact 5) If tail capacitance is increased, flicker noise is increased by indirect mechanism.

(Fact 6) Small inductor size, high Q value of inductor and high SRF value of inductor are required.

In view of (Fact 1) and (Fact 2) among the foregoing facts, the inventors of the present application decide to use a static current bleeding circuitary to reduce the LO switching current.

In addition, among the foregoing facts, considering (Fact 3), (Fact 4) and (Fact 5), the inventors of the present application decide to use two inductors to resonate the tail capacitance Cp. These two inductors can increase the conversion gain because they can block the RF current flow to the PMOS, the current bleeding circuit.

Also, considering (Fact 6) among the foregoing facts, the inventors of the present application use two small size inductors. For example, an inductor of 3.3 nanohenry (nH) may be used as the inductor.

B. First Embodiment

2 is a diagram showing the circuit configuration of the mixer according to the first embodiment of the present invention.

Referring to FIG. 2, the mixer according to the embodiment of the present invention is a field effect transistors (FETs) M1 to M6, a current source IBias, two load resistors (RLoads), and another FETs. M11, M12. The FETs M11 and M12 constitute a current bleeding circuitry according to an embodiment of the present invention, and other components constitute a so-called Gilbert Cell Mixer.

Such a mixer may be, for example, mixer 40 of a direct diffusion receiver as shown in FIG. 1. In this case, the mixer is connected to the output terminals RF + and RF- of the RF units BPF 20 and LNA 30, and then to the input terminals IF + and IF- of the IF unit (not shown), and also to the local oscillator LO. (Not shown) is connected to the oscillation signal output terminals LO + and LO-. Accordingly, the mixer inputs an RF signal, mixes the input RF signal with a signal oscillated by a local oscillator, and outputs an IF signal that is a mixing result.

The FETs M1-M6 can be implemented with a P-type MOS FET. The gate terminal of M1 is connected to the first output terminal LO + of the local oscillator LO, the source terminal is connected to one side of the first load resistor RLoad and the first input terminal IF + of the IF processing unit, and the drain terminal is It is connected to the drain terminal of M2 and the source terminal of M3. The gate terminal of M2 is connected to the second output terminal LO- of the local oscillator LO and the gate terminal of M4, and the source terminal is connected to one side of the second load resistor RLoad and the second input terminal IF- of the IF unit. The drain terminal is connected to the drain terminal of M1 and the source terminal of M3. The gate terminal of M3 is connected to the first output terminal RF + of the RF section, the source terminal is connected to the drain terminal of M1 and the drain terminal of M2, and the drain terminal is connected to one side of the current source IBias. The other side of the current source IBias is connected to the ground terminal.

The gate terminal of M4 is connected to the second output terminal LO- of the local oscillator LO and the gate terminal of M2, and the source terminal is connected to one side of the first load resistor RLoad and the first input terminal IF + of the IF unit. The drain terminal is connected to the drain terminal of M5 and the source terminal of M6. The gate terminal of M5 is connected to the first output terminal LO + of the local oscillator LO, the source terminal is connected to one side of the second load resistor RLoad and the second input terminal IF- of the IF section, and the drain terminal is It is connected to the drain terminal of M4 and the source terminal of M6. The gate terminal of M6 is connected to the second output terminal RF- of the RF unit, the source terminal is connected to the drain terminal of M4 and the drain terminal of M5, and the drain terminal is connected to one side of the current source IBias. The other side of the current source IBIAS is connected to the ground terminal.

One side of the first load resistor is simultaneously connected to the first input terminal IF + of the IF unit and the source terminal of M1, and the other side is connected to the power supply voltage terminal VDD. One side of the second load resistor is simultaneously connected to the second input terminal IF- of the IF unit and the source terminal of M5, and the other side is connected to the power supply voltage terminal VDD.

The gate terminal of the FET M11 is connected to a voltage source VBias (not shown), the source terminal is connected to the power supply voltage terminal VDD, and the drain terminal is commonly connected to the drain terminals of M1 and M2 and the source terminal of M3. The gate terminal of the FET M12 is connected to a voltage source VBias (not shown), the source terminal is connected to the power supply voltage terminal VDD, and the drain terminal is commonly connected to the drain terminals of M4 and M5 and the source terminal of M6.

FIG. 3 is an equivalent analysis circuit diagram when the mixer shown in FIG. 2 is viewed from the RF section of FIG. 1.

Referring to FIG. 3, at node N11, one side of RBias, which is the resistance component of M11, one side of 1 / gm, which is the resistance component of M1, which is switched in response to the oscillation signal from LO, and 1/1, which is the resistance component of M2, is applied to node N11. One side of gm and one side of IRF +, which is a current source generated as M3 is switched in response to the application of an RF signal from the RF unit, are connected. The other side of the current source IRF + and the other side of RBias, which is a resistance component of M11, are connected to the ground terminal. At node N12, one side of RBias, which is the resistance component of M12, one side of 1 / gm, which is the resistance component of M5 switched in response to the oscillation signal from LO, one side of 1 / gm, which is the resistance component of M4, and RF One side of IRF-, which is a current source generated as M6 is switched in response to the application of the RF signal from the negative terminal, is connected. The other side of the current source IRF- and the other side of RBias, the resistance component of M12, is connected to the ground terminal.

In the mixer according to the embodiment of the present invention constructed as shown in Figs. 2 and 3 described above, the so-called 1 / f noise flicker noise is generated by the current bleeding circuit constituted by M11 and M12 as described below. Will be effectively removed.

Sources of flicker noise generated in the mixer are M1 and M5. That is, when a large amount of current flows through the source terminals of M1 and M5, much flicker noise is generated, so it is necessary to flow a small current through the source terminals of M1 and M5.

On the other hand, in order for the conversion performance in the mixer to be good, the amount of current flowing through M3 and M6, that is, the current flowing through M3 and M6 from the source terminals of M1 and M5, respectively, needs to be large.

The necessity of the former and the latter is in fact incompatible with each other. However, the embodiment of the present invention satisfies both of these needs by using the current bleeding circuit. That is, by satisfying the first need by reducing the current flowing through the source terminals of M1 and M5, the current flowing through the current bleeding circuits M11 and M12 increases, resulting in a large current flowing through M3 and M6. Satisfy the need.

C. Second Embodiment

4 is a diagram showing the circuit configuration of the mixer according to the second embodiment of the present invention.

Referring to FIG. 4, the mixer according to the embodiment of the present invention has a field effect transistors (FETs) M1 to M6, a current source IBias, two load resistors (RLoads), and another FET M21. , Two inductors L1, L2. Although two capacitors Cp are shown in the figure, it should be noted that these capacitors are actually parasitic tail capacitance Cp rather than capacitors implemented on the circuit. The FET M21 constitutes a current bleeding circuitry according to an embodiment of the present invention, and other components except two inductors constitute a so-called Gilbert Cell Mixer.

Such a mixer may be, for example, mixer 40 of a direct diffusion receiver as shown in FIG. 1. In this case, the mixer is connected to the output terminals RF + and RF- of the RF units BPF 20 and LNA 30, and then to the input terminals IF + and IF- of the IF unit (not shown), and also to the local oscillator LO. (Not shown) is connected to the oscillation signal output terminals LO + and LO-. Accordingly, the mixer inputs an RF signal, mixes the input RF signal with a signal oscillated by a local oscillator, and outputs an IF signal that is a mixing result.

The FETs M1-M6 can be implemented with a P-type MOS FET. The gate terminal of M1 is connected to the first output terminal LO + of the local oscillator LO, the source terminal is connected to one side of the first load resistor RLoad and the first input terminal IF + of the IF processing unit, and the drain terminal is It is connected to the drain terminal of M2 and the source terminal of M3. The source terminal of M4 is connected to the source terminal of M1, and one side of the first inductor L1 is connected to the drain terminal of M1. The gate terminal of M2 is connected to the second output terminal LO- of the local oscillator LO and the gate terminal of M4, and the source terminal is connected to one side of the second load resistor RLoad and the second input terminal IF- of the IF unit. The drain terminal is connected to the drain terminal of M1 and the source terminal of M3. One side of the first inductor L1 is connected to the drain terminal of M2. The gate terminal of M3 is connected to the first output terminal RF + of the RF section, the source terminal is connected to the drain terminal of M1, the drain terminal of M2 and one side of the first inductor L1, and the drain terminal is connected to one side of the current source IBias. . The other side of the current source IBias is connected to the ground terminal.

The gate terminal of M4 is connected to the second output terminal LO- of the local oscillator LO and the gate terminal of M2, and the source terminal is connected to one side of the first load resistor RLoad and the first input terminal IF + of the IF unit. The drain terminal is connected to the drain terminal of M5, the source terminal of M6, and one side of the second inductor L2. The gate terminal of M5 is connected to the first output terminal LO + of the local oscillator LO, the source terminal is connected to one side of the second load resistor RLoad and the second input terminal IF- of the IF section, and the drain terminal is It is connected to the drain terminal of M4, the source terminal of M6, and one side of the second inductor L2. The gate terminal of M6 is connected to the second output terminal RF- of the RF unit, the source terminal is connected to the drain terminal of M4, the drain terminal of M5 and one side of the second inductor L2, and the drain terminal is connected to one side of the current source IBias. do. The other side of the current source IBIAS is connected to the ground terminal.

One side of the first load resistor is simultaneously connected to the first input terminal IF + of the IF unit and the source terminal of M1, and the other side is connected to the power supply voltage terminal VDD. One side of the second load resistor is simultaneously connected to the second input terminal IF- of the IF unit and the source terminal of M5, and the other side is connected to the power supply voltage terminal VDD.

The gate terminal of the FET M21 is connected to the voltage source VBias (not shown), the drain terminal is connected to the power supply voltage terminal VDD, and the source terminal is connected to the other side of the first inductor L1 and the other side of the second inductor L2. As the first inductor L1 and the second inductor L2, for example, 3.3 nanohenry (nH) is used for a small inductor, a high Q value, and a high SRF value.

FIG. 5 is an equivalent analysis circuit diagram when the mixer shown in FIG. 4 is viewed from the RF section of FIG. 1.

Referring to FIG. 5, at node N21, one side of RBias, which is the resistance component of M21, one side of 1 / gm, which is the resistance component of M1, which is switched in response to the oscillation signal from LO, and the resistance component of M2, 1 One side of / gm and one side of IRF +, which is a current source generated as M3 is switched in response to the application of an RF signal from the RF unit, are connected. The other side of the current source IRF + and the other side of RBias, which is a resistance component of M11, are connected to the ground terminal. At node N22, one side of RBias, which is the resistance component of M21, one side of 1 / gm, which is the resistance component of M5 switched in response to the oscillation signal from LO, one side of 1 / gm, which is the resistance component of M4, and RF One side of IRF-, which is a current source generated as M6 is switched in response to the application of the RF signal from the negative terminal, is connected. The other side of the current source IRF- and the other side of RBias, the resistance component of M12, is connected to the ground terminal.

In the mixer according to the embodiment of the present invention configured as shown in Figs. 4 and 5 described above, the so-called 1 / f noise flicker noise is effectively removed by the current bleeding circuit constituted by M21 as described below. Will be.

Sources of flicker noise generated in the mixer are M1 and M5. That is, when a large amount of current flows through the source terminals of M1 and M5, much flicker noise is generated, so it is necessary to flow a small current through the source terminals of M1 and M5.

On the other hand, in order to improve the conversion performance in the mixer, it is necessary to increase the amount of current flowing through M3 and M6, that is, the current flowing through M3 and M6 from the drain terminals of M1 and M5, respectively.

The necessity of the former and the latter is in fact incompatible with each other. However, the embodiment of the present invention satisfies both of these needs by using the current bleeding circuit. That is, by satisfying the first need by reducing the current flowing through the source terminals of M1 and M5, the current flowing through the current bleeding circuits M11 and M12 increases, resulting in a large current flowing through M3 and M6. Satisfy the need.

In addition, the mixer according to the embodiment of the present invention configured as shown in FIG. 4 and FIG. 5 can effectively remove the flicker noise by the current bleeding circuit and can further improve the signal conversion performance. This signal conversion performance is improved by the use of two inductors L1, L2.

Improving signal conversion performance in the mixer means that the incoming RF signal must be provided to the LO side, i.e., M1 and M5 side. However, RF signals input through M3 and M6 are provided not only to the M1 and M5 sides but also to the current bleeding circuit M21 side. As such, when the RF signals are provided to the current bleeding circuit M21, the signal conversion performance is degraded by that amount. This role is prevented by the use of two inductors L1, L2. The inductors L1 and L2 form an LC parallel circuit with a tail capacitor Cp, which is a parasitic capacitor on the circuit. Therefore, the LC parallel circuit is prevented from providing the RF signal input through M3 and M6 to the current bleeding circuit M21 side, and the input RF signal is provided only to the M1 and M5 side, respectively.

D. Example Performance Comparison

6 is a graph showing the conversion gain of the mixer according to the second embodiment of the present invention.

Referring to FIG. 6, the mixer according to the second embodiment having two inductors has a signal conversion gain of 17 dB.

7A is a graph showing the flicker corner frequency of the mixer according to the first embodiment of the present invention, and FIG. 7B is a graph showing the flicker corner frequency of the mixer according to the second embodiment of the present invention.

7A and 7B, the flicker corner frequency of the mixer according to the first embodiment is 826 kHz, whereas the flicker corner frequency of the mixer according to the second embodiment is reduced to 107 kHz to 107 kHz.

Tables 1a and 1b below show simulation results for mixers according to embodiments of the present invention. As can be seen from Tables 1a and 1b, it can be seen that in the mixers according to the embodiment of the present invention, the current flowing in the current bleeding circuit may increase, but the flicker noise, ie, the flicker corner frequency, becomes smaller. For example, in Table 1a, the flicker noise is 167 kHz when the current flowing through the current bleeding circuit is 3.52 (mA), and the flicker noise is 107 kHz when the current flowing through the current bleeding circuit is 3.76 (mA). . As another example, in Table 1b, the flicker noise is 1.34 MHz when the current flowing through the current bleeding circuit is 3.52 (mA), and the flicker noise is 826 kHz when the current flowing through the current bleeding circuit is 3.76 (mA). .

Example 2; Static Current Bleeding with two Inductors Bleeding Current (mA) LO SW
Current (mA) NF (dB) Corner
Frequency (Hz) Gain (dB) IIP3 (dBm) 3.76 60 10.1 107k 17 -8.2 3.64 90 10.0 134k 17.8 -7.1 3.52 120 10.2 167k 18.5 -6.2

Example 1; Static Current Bleeding without Inductors Bleeding
Current (mA) LO SW
Current (mA) NF (dB) Corner
Frequency (Hz) Gain (dB) IIP3 (dBm) 3.76 60 12.1 826 k 13 -7.4 3.64 90 12.2 1.20k 13.2 -5.6 3.52 120 12.1 1.34k 14.7 -4.3

Table 2 below shows the simulation results used in the mixer according to the second embodiment of the present invention.

RF Frequency 5.2 GHz LO Frequency 5.2 GHz Conversion gain 17 dB Noise figure 10 dB IIP3 -7.89 dBm P1dB -17.82 dBm Flicker corner frequency 107 kHz Total Power Consumption 7.2 mW (4mA, 1.8V)

Referring to Table 2, the RF frequency and the LO frequency are 5.2 GHz, the conversion gain is 17 dB, the noise figure is 10 dB, the input intercept point 3 (IIP3) is -7.89 dBm, and the P1 dB is -17.82dBm, Flicker Corner Frequency is 107kHz, Total Power Consumption is 7.2mW.

Table 3 below shows the result of comparing the performance of the mixer according to the prior arts and the mixer according to the second embodiment of the present invention.

Topology Prior art 1 Prior art 2 Prior Art 3 Prior art 4 invent Gain / Loss moderate
conversion
gain poor
conversion
gain moderate
conversion
gain conversion
loss good
conversion gain LO power moderate very high high moderate low Linearity
(IIP3) moderate good moderate moderate moderate Noise fiqure moderate moderate moderate good moderate Flicker corner
Frequency moderate good moderate very
good very
good Power
Consumption moderate very good moderate good good RF Frequency 900 MHz 2 GHz 2.1 GHz 5 GHz 5.2 GHz

Referring to Table 3, the mixer according to the embodiment of the present invention can be seen that the performance is improved in the signal conversion gain compared to the prior art, and also it can be seen that the LO power is lowered, and the flicker noise is good. It can also be seen.

As described above, it can be seen that the mixer according to the embodiment of the present invention has better performance in terms of flicker noise improvement, signal conversion, and power consumption than the mixers according to the prior art. The performance of the mixer according to the second embodiment of the present invention can be summarized as follows.

First, the current of the LO switch can be reduced by using a static current bleeding technique.

Second, the size of the LO switch can be increased by using two inductors for resonance with the tail capacitor.

Third, there was a 4dB increase in the signal conversion gain of the mixer.

Fourth, there was a decrease of 719 kHz in the flicker corner frequency.

Fifth, IIP3 is improved to -7.89dBm and power consumption is improved to 4mA current flow of 7.2mW when 1.8V is supplied.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but is capable of various modifications within the scope of the invention. For example, a mixer according to an embodiment of the present invention has been described as a case where it is applied to a direct conversion receiver of a mobile communication system. However, the present invention may be used in all applications in which a mixer for various signal conversion operations is used as well as a direct conversion receiver of a mobile communication system. Therefore, the scope of the present invention should not be limited by the illustrated embodiments, but should be determined by the scope of the appended claims and equivalents thereof.

As described above, the mixer according to the embodiment of the present invention has an advantage of improving performance in terms of flicker noise improvement, signal conversion, and power consumption compared to the mixers according to the prior art by using a current bleed circuit and two inductors. .

Claims (4)

In the mixer, A first input terminal and a second input terminal for inputting a first signal, A third input terminal and a fourth input terminal for inputting a second signal, A first output terminal and a second output terminal for outputting a third signal; A first load resistor connected between a power supply voltage terminal and said first output terminal, A second load resistor connected between the power supply voltage terminal and the second output terminal, A first transistor having a source terminal connected to the first output terminal, a gate terminal connected to the third input terminal, and a drain terminal; A second transistor having a source terminal connected to the second output terminal, a gate terminal connected to the fourth input terminal, and a drain terminal; A third transistor including a source terminal connected to the drain terminals of the first and second transistors, a gate terminal connected to the first input terminal, and a drain terminal connected to a current source; A fourth transistor including a source terminal connected to the first output terminal, a gate terminal connected to the fourth input terminal, and a drain terminal; A fifth transistor including a source terminal connected to the second output terminal, a gate terminal connected to the third input terminal, and a drain terminal; A sixth transistor including a source terminal connected to the drain terminals of the fourth and fifth transistors, a gate terminal connected to the second input terminal, and a drain terminal connected to the current source; A seventh transistor including a drain terminal connected to the power supply voltage terminal, a gate terminal connected to a voltage source, and a source terminal connected to source terminals of the third and sixth transistors; And two inductors respectively connected between a source terminal of the seventh transistor and a source terminal of the third transistor and the sixth transistor. The mixer of claim 1, wherein each of the inductors is 3.3 nanohenry. In mixers for use in direct conversion receivers, A first input terminal RF + and a second input terminal RF- for inputting a high frequency RF signal, A third input terminal LO + and a fourth input terminal LO- for inputting a local oscillation (LO) signal, A first output terminal IF + and a second output terminal IF- for outputting an intermediate frequency IF signal, A first load resistor connected between a power supply voltage terminal VDD and the first output terminal IF +; A second load resistor connected between the power supply voltage terminal VDD and the second output terminal IF-, A first transistor M1 including a source terminal connected to the first output terminal IF +, a gate terminal connected to the third input terminal LO +, and a drain terminal; A second transistor M2 including a source terminal connected to the second output terminal IF-, a gate terminal connected to the fourth input terminal LO-, and a drain terminal; A source terminal connected to the drain terminals of the first and second transistors M1 and M2, a gate terminal connected to the first input terminal RF +, and a drain terminal connected to a current source IBias. The third transistor M3, A fourth transistor M4 including a source terminal connected to the first output terminal IF +, a gate terminal connected to the fourth input terminal LO-, and a drain terminal; A fifth transistor M5 including a source terminal connected to the second output terminal IF-, a gate terminal connected to the third input terminal LO +, and a drain terminal; A source terminal connected to the drain terminals of the fourth and fifth transistors M4 and M5, a gate terminal connected to the second input terminal RF-, and a drain terminal connected to the current source IBias. A sixth transistor M6 provided; A drain terminal connected to the power supply voltage terminal VDD, a gate terminal connected to the voltage source VBias, and a source terminal connected to the source terminals of the third transistor M3 and the sixth transistor M6 are connected. A seventh transistor M21 provided; A mixer comprising two inductors (L1, L2) respectively connected between a source terminal of the seventh transistor (M21) and a source terminal of the third transistor (M3) and the sixth transistor (M6). 4. The mixer of claim 3 wherein the inductors are each 3.3 nanohenry.

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