KR101183397B1 - Liquid Crystal Display Device Controlable View-angle and Driving Method thereof - Google Patents

Abstract

The present invention relates to a viewing angle controllable liquid crystal display device capable of displaying an image such that the image is secured for each area according to the property of information.

A liquid crystal display device capable of controlling a viewing angle includes: a liquid crystal panel including a plurality of color pixels each having red, green, blue, and sub-pixels for interference; A data driver for supplying a pixel driving signal input by the subpixels on the liquid crystal panel by one line; An interference data generator for generating interference and offset data to be supplied to the interference sub pixels; A data combination unit for adding the interference and offset data to video data to be supplied toward the data driver; An image region detector configured to detect a region where image information is located in video data supplied to the data combiner; And an interference region controller for controlling the interference data in response to the region data from the image region detector to selectively output the interference data and the offset data according to the region.

Interference, viewing angle, image, text, property, area

Description

Liquid crystal display device capable of viewing angle control and driving method thereof {Liquid Crystal Display Device Controlable View-angle and Driving Method}

In order to better understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

In order to better understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1 is a cross-sectional view schematically showing a conventional liquid crystal panel capable of controlling a viewing angle.

2 is a block diagram illustrating a liquid crystal display capable of controlling a viewing angle according to an exemplary embodiment of the present invention.

FIG. 3 is a diagram for describing coordinate values included in image area data IAD.

4A to 4C are views showing the state of an image on the liquid crystal panel seen from the side in the narrow viewing angle mode, the wide viewing angle mode, and the partial narrow viewing angle mode by the liquid crystal display of FIG. 2.

FIG. 5 is a detailed block diagram illustrating an exemplary embodiment of the interference data generator of FIG. 2.

6A to 6C are diagrams for explaining an example of the interfering sub-pixel data calculated by the calculating unit of FIG. 5.

FIG. 7 is a flowchart illustrating an operation procedure of an interference data generating unit having the configuration shown in FIG. 5.

FIG. 8 is a detailed block diagram illustrating another exemplary embodiment of the interference data generator of FIG. 2.

FIG. 9 is a flowchart for explaining an example of an operation procedure performed by the image area detector of FIG. 2.

FIG. 10 is a flowchart for explaining another embodiment of an operation procedure performed by the image area detection unit in FIG. 2.

11 is a block diagram illustrating a liquid crystal display capable of controlling a viewing angle according to another exemplary embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS to the main parts of the drawings "

10: normal panel 12: interference panel

30,30A: liquid crystal panel 32,32A: gate driver

34,34A: Data Driver 36,36A: Timing Control Unit

38: image area detection unit 40: interference data generation unit

42, 42A: Video data combination unit 44: Interference region control unit

50: register 52: data collection unit

54: calculator 56: selector

58,72: memory control unit 60,70: memory

PXC: Color Pixel RSP: Red Sub Pixel

GSP: Green Sub Pixel BSP: Blue Sub Pixel

ESP: interference sub-pixel CLC: liquid crystal cell

MN: Thin Film Transistor

The present invention relates to a liquid crystal panel capable of controlling the viewing angle of an image and a liquid crystal display including the same.

The liquid crystal display device displays an image by controlling an intensity of an electric field applied to the liquid crystal to adjust an amount of light passing through the liquid crystal. Since a liquid crystal panel, which is a main component of such a liquid crystal display, displays an image by using light from the outside, it is inevitably limited in the angle (that is, the viewing angle) at which the user can view the image. In order to enlarge the limited viewing angle of the liquid crystal panel, a liquid crystal panel has been introduced with a method of applying an electric field in a horizontal direction, a method using a compensation film, and a multi-division mode method using an opening pattern or protrusion on a transparent electrode. By such a lateral electric field driving method, a compensation film method and a multi-division mode method, the liquid crystal panel can secure a viewing angle of sufficient size.

In recent years, users of information terminals such as mobile phones, personal digital assistants (hereinafter referred to as "PDAs"), computers, and the like require users to prevent others from reading information. In response to requests for confidentiality and security of such information terminals, liquid crystal displays used as display devices of information terminals are also required to accommodate not only a large viewing angle mode but also a small viewing angle mode.

In order to satisfy the demands of the multiple viewing angle mode, a dual structure liquid crystal panel has been proposed. The liquid crystal panel of the dual structure is composed of a top panel 10 for displaying an image as shown in FIG. 1 and an interference panel 12 positioned on the top panel 10. The top panel 10 is used to display an image while the interfering panel 12 causes the light traveling toward the side of the panel to interfere. The liquid crystal panel of the dual structure enables switching of the viewing angle mode for the image by the optical interference by the interference panel 12.

The viewing angle controllable liquid crystal display device including the dual structure liquid crystal panel selectively drives the interference panel 12 to implement a wide viewing angle mode and a narrow viewing angle mode. In other words, the liquid crystal display causes the interference panel 12 to be turned on or turned off depending on the viewing angle mode. In such a dual structure liquid crystal panel, since the external light must pass through the double liquid crystal layer, the brightness of the image is significantly lowered. In addition, the liquid crystal panel of the dual structure causes thickness and weight to increase.

In order to improve the dual viewable controllable liquid crystal panel, a single layer viewable controllable liquid crystal panel in which interference cells are provided to form one surface (or the same layer) with color pixels has been proposed. The liquid crystal panel capable of controlling the viewing angle of a single layer structure has an advantage of being able to display an image without deterioration of brightness and also to make it slim.

Recent image information is a trend that is created in the form of both image and text. In particular, most Web documents are written in a form that includes images and text. The images and texts included in the image information may be objects to be secured by the user. Accordingly, the image information needs to be displayed securely for each area according to the attribute of the information.

Accordingly, an object of the present invention is to provide a viewing angle controllable liquid crystal display device and a driving method thereof in which an image can be displayed securely for each area according to an attribute of information.

According to an aspect of the present invention, there is provided a liquid crystal display device capable of controlling a viewing angle, the liquid crystal panel including a plurality of color pixels each having red, green, blue, and sub-pixels for interference; A data driver for supplying a pixel driving signal input by the subpixels on the liquid crystal panel by one line; An interference data generator for generating interference and offset data to be supplied to the interference sub pixels; A data combination unit for adding the interference and offset data to video data to be supplied toward the data driver; An image region detector configured to detect a region where image information is located in video data supplied to the data combiner; And an interference region controller for controlling the interference data in response to the region data from the image region detector to selectively output the interference data and the offset data according to the region.

According to another aspect of the present invention, there is provided a driving method of a liquid crystal display capable of controlling a viewing angle, the method including: detecting an area of image information in video data for red, green, and blue subpixels on a liquid crystal panel; Selectively generating interference data and offset data to be supplied to the interfering sub-pixels on the liquid crystal panel according to the detected region information; Combining the selectively generated interference and offset data with the video data; And driving sub-pixels on the liquid crystal panel in response to the combined video data.

In addition to the objects of the present invention as described above, other objects, other advantages and other features of the present invention will become apparent from the detailed description of the preferred embodiment with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram illustrating a liquid crystal display capable of controlling a viewing angle according to an exemplary embodiment of the present invention.

The liquid crystal display of FIG. 2 includes an interference data generator 40 for generating interference data to be supplied to the interfering sub-pixels ESP11 to ESPmn on the liquid crystal panel 30, and the interference from the interference data generator 40. And a video data combination unit 42 for adding the data IDF to the video data VD from the outside.

In the liquid crystal panel 30, the subpixels RSP11 ˜ in each of the regions divided by the plurality of data lines DL1 through DL2m arranged in the horizontal direction and the plurality of gate lines GL1 through GL2n arranged in the vertical direction. RSPmn, GSP11 ~ GSPmn, BSP11 ~ BSPmn, ESP11 ~ ESPmn) are prepared. Each of these sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, BSP11 to BSPmn, and ESP11 to ESPmn each includes a data line in response to a scan signal on the liquid crystal cell CLC and the gate line GL connected to the common electrode Vcom. The thin film transistor MN for switching the sub pixel driving signal to be transmitted from the DL to the liquid crystal cell CLC is provided. Among the sub pixels, the red sub pixels RSP11 to RSPmn are connected to the odd gate lines GL1 to GL2n-1 and the odd data lines DL1 to DL2m-1, respectively, and the green sub pixels GSP11 to GSPmn are connected to each other. ) Are connected to the odd-numbered gate lines GL1 to GL2n-1 and even-numbered data lines DL2 to DL2m, respectively, and the blue sub-pixels BSP11 to BSPmn are respectively the even-numbered gate lines GL2 to GL2n and even. The interfering sub-pixels ESP11 to ESPmn are connected to the even-numbered gate lines GL2 to GL2n and the odd-numbered data lines DL1 to DL2m-1, respectively. In addition, the interference sub-pixels ESP11 to ESPmn each have a pair of adjacent red, green, and blue sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, and BSP11 to BSPmn to control the viewing angle. The pixels PXC11 to PXCmn are constituted. Accordingly, the first and second color pixels PXC11 of the first line are commonly connected to the first gate line GL1 and red and green subpixels connected to the first and second data lines DL1 and DL2, respectively. It includes common and connected to the RSP11 and GSP11 and the second gate line GL2, and the interference and blue subpixels ESP11 and BSP11 connected to the first and second data lines DL1 and DL2, respectively. In this manner, the last color pixel PXCmn of the last line is also commonly connected to the 2n-1th gate line GL2n-1 and connected to the 2m-1 and 2mth data lines DL2m-1 and DL2m, respectively. Interference and blue subpixels commonly connected to the red and green subpixels RSPmn and GSPmn and to the 2nth gate line GL2n and connected to the 2m-1 and 2mth data lines DL2m-1 and DL2m, respectively. (ESPmn, BSPmn). Each of the red, green, and blue sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, and BSP11 to BSPmn is driven in a horizontal electric field to display an image so that it can be viewed from a wide angle. On the other hand, each of the interfering sub-pixels ESP11 to ESPmn is driven in a vertical electric field manner, so that the image to be viewed from the side except the front side is selectively interfered with the interfering sub-pixel signal. When the image to be seen from the side is interfered by these interfering sub-pixels ESP11 to ESPmn, the image displayed on the liquid crystal panel 30 may be viewed only in a narrow angle range based on the definition of the liquid crystal panel 30. do. In other words, when there is interference by the interfering sub-pixels ESP11 to ESPmn, the liquid crystal panel 30 causes the image of the narrow viewing angle mode to be displayed. In contrast, when there is no interference due to the interfering sub-pixels ESP11 to ESPmn, the image of the wide viewing angle mode is displayed on the liquid crystal panel 30.

The interference data generation unit 40 is configured to respond to the optical / narrow mode control signal W / N from an external video source (for example, a demodulator of a computer graphics card or a television receiving module). The interference data IDF is supplied to the video data combiner 42 so that the viewing angle of? Is widened or narrowed. This interference data IFD refers to the front side of the liquid crystal panel 30 when the light / narrow mode control signal W / N has a specific logic (e.g., high logic or low logic) that specifies the narrow viewing angle mode. This includes interfering sub-pixel data Ed forming an image of a fixed interference pattern that allows interfering light to be added to both sides. Alternatively, the interference data IDF may include interfering sub pixel data Ed, which constitutes an interference pattern that varies from image to image. In order to generate the interference data IDF of the interference pattern that varies from image to image, the interference data generator 40 may input video data VD from an external video source (for example, a graphic card of a computer). have. On the other hand, when the light / narrow mode control signal W / N has initialization logic (for example, low logic or high logic) for designating the wide viewing angle mode, the interference data IDF is generated from the liquid crystal panel 30. Off-set sub-pixel data Eoff having an offset value that prevents the interfering light from traveling toward both sides with respect to the front side.

The video data combination unit 42 inputs video data VD including color sub pixel data for red, green, and blue sub pixels RSP, GSP, and BSP from an external video source (not shown). . The video data combiner 42 adds the interference data IDF from the interference data generator 40 to the video data VD. In addition, the video data combiner 42 rearranges the color sub-pixel data and the interference (or offset) sub-pixel data Ed (or Eoff) to match the arrangement state of the sub-pixels on the liquid crystal panel 30. Let the combined video data (CVD) be generated. The combined video data CVD provided by the video data combination unit 42 includes red and green sub-pixels RSP and GSP connected to the odd-numbered gate lines GL1 to GL2n-1 of the liquid crystal panel 30. ) Includes a sub-pixel data stream in which the red and green sub-pixel data Rd and Gd are alternated, while the interference and the blue sub-connected to the even-numbered gate lines GL2 to GL2n of the liquid crystal panel 30 are scanned. When the pixels ESP and BSP are scanned, an interference (or offset) and a blue sub data Ed (or Eoff, Bd) include a sub pixel data stream alternately.

The liquid crystal display of FIG. 2 includes an image region detector 38 and an interference region controller 44 connected in series with the input line of video data VD. The image area detection unit 38 inputs the video data (VD) stream from an external video source (e.g., a demodulation unit of a graphic card or a television receiving module of a computer system). The image area detector 38 checks whether image information is included in the video data (VD) stream. If the image information is included in the video data (VD) stream, the image area detection unit 38 detects a position of the area of the image information in the image and interpolates the detected image area data IAD to the interference area control unit 44. To feed. The image area data IAD includes coordinate values of two points that can distinguish an area of image information. For example, let the image region be located in the center of the image, surrounded by text information, as in FIG. In this case, the coordinate value for the vertical start line of the image area (conventionally referred to as "vertical start coordinate value (Ys)") and the coordinate value for the vertical end line of the image area (hereinafter, "vertical end coordinate value"). (Ye) ", the coordinate values for the horizontal start line of the image area (hereinafter referred to as" horizontal starting coordinate value (Xs) ") and the coordinate values for the horizontal end line of the image area (hereinafter referred to as" Ye ""). , &Quot; horizontal end coordinate value Xe " should be included in the image area data IAD. To this end, the area data IAD includes two coordinate values (XsYs and XeYe or XeYs and XsYe) for two diagonal lines among the four vertices of the image area. For convenience, the image area data IAD in the embodiment of the present invention may have a vertical start-horizontal start coordinate value (ie, XsYs) with respect to the horizontal start point in the vertical start line of the image area and the vertical direction of the image area. It is assumed that it has a vertical end-horizontal end coordinate value XeYe with respect to the end point of the horizontal direction in the end line of. Alternatively, it will be appreciated by those skilled in the art that the image area data IAD may have a vertical start-horizontal end coordinate value XeYs and a vertical end-horizontal start coordinate value XsYe. The image area data IAD may be transmitted through an transmission line of the video data VD from an external video source when the image is included in the video data VD. In this case, the image area data IAD is supplied to the image area detection unit 38 from an external video source in a period in which the video data VD is not transmitted (for example, a vertical blanking period or a vertical blanking period). In order to detect such image region data IAD, the image region detector 38 uses signals from the transmission line for the video data VD using at least one of the vertical and horizontal synchronization signals Vsync and Hsync. Can be monitored.

 In response to the image area data IAD including the vertical start-horizontal end coordinate value XsYs and the vertical end-horizontally end coordinate value XeYe in this way, the interference area controller 44 causes the interference from an external video source. The optical / narrow mode control signal W / N to be supplied toward the data generator 40 is modulated. The optical / narrow mode control signal MW / N modulated by the interference area control unit 44 alternates between a specific logic and a ground logic in some sections every frame (that is, every period of the vertical synchronization signal Vsync). It has a waveform of shape. In other words, the modulated light / narrow mode control signal M-W / N periodically shows pulses of a specific logic or pulses of the underlying logic in some intervals. The length of the interval in which the pulse of a particular logic (or basis logic) appears (i.e. the vertical direction of the image) corresponds to the difference between the vertical end coordinate value and the vertical start coordinate value, and the width of the pulse of the specific logic or the pulse of the underlying logic. (Horizontal direction section of the image) corresponds to the difference between the horizontal end coordinate value and the horizontal start coordinate value.

In order to modulate the optical / narrow mode control signal (W / N) in this way, the interference domain controller 44 includes a processor, such as a microcomputer or a central processing unit, or at least two or more counters, comparators, registers and logic gates. It may include a logic operation circuit consisting of. The processor or logic arithmetic circuit that implements the interference region controller 44 uses the data clock Dclk, the horizontal synchronization signal Hsync, and the vertical synchronization signal Vsync to designate the image vertical section designated by the image region data IAD. And distinguish the horizontal selection section and cause the light / narrow mode control signal W / N to be inverted for each distinct horizontal selection section within the distinct vertical selection section. Alternatively, the interference area controller 44 may use the data output enable signal DE included in the synchronization signals SYNC instead of the horizontal synchronization signal Hsync.

In addition, the interference area controller 44 may input a local interference mode signal PEM generated by a user's designation from an external video source. The local interference mode signal PEM has specific logic (eg, high logic or low logic) when the user requires security of an image (or text) contained in the picture. When this local interference mode signal PEM maintains a certain logic (i.e., when the user requires partial security of the image), the interference area control section 44 controls the optical / narrow mode control signal W / N. Modulation is performed so that a part of the image displayed on the liquid crystal panel 30 is not seen from the side. In addition, when the local interference mode signal PEM maintains a certain logic (i.e., when partial security of the image is required), the optical / narrow mode control signal W / N is inverted by the user's designation. Instead of the image (or text) on the side, the text (or image) may be switched so that it is not shown. In contrast, when the local interference mode signal PEM has a basis logic (i.e. when partial security of the picture is not required), the interference area controller 44 controls the light / narrow mode from an external video source. The signal W / N is supplied to the interference data generating unit 40 in its original state without being modulated. In this case, the image displayed on the liquid crystal panel 30 is not entirely seen from the side, or the whole is seen from the side. In other words, based on the logical combination of the local interference mode (PEM) and the light / narrow mode control signal (W / N), the interference area control section 44 displays the wide viewing angle display or the narrow viewing angle display and the image for the whole image. Alternatively, a modulated light / narrow mode control signal MW / N may be generated that allows the narrow viewing angle representation for text to be selectively performed.

The interference data generator 40 responsive to the modulated optical / narrow mode control signal MW / N from the interference area controller 44 performs the interference sub-pixel data Ed every frame (that is, every period of the vertical synchronization signal). ) Is supplied to the video data combiner 42 with the interference data IDF mixed with the offset sub-pixel data Eoff. The interference data IDF generated by the interference data generator 40 draws the interference sub-pixel data Ed in a period of a pulse of a specific logic of the modulated optical / narrow mode control signal MW / N and the modulated data. In the period of the pulse of the basis logic of the optical / narrow mode control signal MW / N, the offset sub-pixel data Eoff is included. Accordingly, the sub pixel data stream CVD output from the video data combination unit 42 includes only the offset sub pixel data Eoff in addition to the color sub pixel data Rd, Gd, and Bd, or the interfering sub pixel data ( A frame period (that is, a vertical scan period) and a horizontal scan period in which only Ed is included or in which both the offset sub pixel data Eoff and the interfering sub pixel data Ed are included may appear.

In addition, the liquid crystal display according to the exemplary embodiment of the present invention may include a gate driver 32 for sequentially driving the gate lines GL1 to GL2n on the liquid crystal panel 30, and data lines on the liquid crystal panel 30. A data driver 34 for driving the DL1 to DL2m, and a timing control unit 36 for controlling the operation timing of these data and gate drivers 32,34. The gate driver 32 generates 2n scan signals that sequentially enable the gate lines GL1 to GL2n in response to the gate timing signal GTS from the timing control unit 36.

The data driver 34 responds to the data timing signal DTS from the timing control unit 36 so that each time one of the gate lines GL1 to GL2n is enabled, the 2m data lines DL1 to The sub pixel driving signals are supplied on the DL2m. For this purpose, the data driver 34 inputs the combined video data CVD transmitted in the serial form from the video data combining unit 42. When a column of the red and green subpixels RSP and GSP connected to any of the odd-numbered gate lines GL1 to GL2n-1 is scanned, the data driver 34 stores the red and green subpixel data Rd and Gd. ) Is supplied with alternating sub data streams to supply a red sub pixel driving signal to each of the odd-numbered data lines DL1 to DL2m-1 and a green sub pixel driving signal to each of the even-numbered data lines DL2 to DL2m. To be. On the other hand, when the interference connected to any one of the even-numbered gate lines GL2 to GL2n and the column of the blue sub-pixels ESP and BSP are scanned, the data driver 34 may cause interference (and / or offset) and Input the sub data stream in which the blue sub pixel data Ed (and / or Eoff) and Bd are alternately input, and each of the odd-numbered data lines DL1 to DL2m-1 has an interference sub-pixel driving signal and even-numbered data lines. The blue sub pixel driving signal is supplied to each of the DL2 to DL2m.

When all of the interfering sub-pixel driving signals are generated only by the interfering sub-pixel data Ed, the interfering sub-pixel ESP allows the interfering light to be transmitted to both sides with respect to the front side of the liquid crystal panel 30. The amount of light transmitted to both sides by the interfering sub-pixel ESP is adjusted according to the voltage level of the interfering sub-pixel driving signal. The amount of light transmitted to both sides by the interfering sub-pixels ESP is added to the amount of light transmitted to both sides by the red, green, and blue sub-pixels RSP, GSP, and BSP so that the luminance component from the side interferes. To be. As a result, as shown in FIG. 3A, an image that cannot be seen from the side is displayed on the front surface of the liquid crystal panel 30. In addition, the interfering sub-pixel driving signals have different voltage levels at positions of the interfering sub-pixels ESP11 to ESPmn corresponding to the interference pattern, thereby causing a difference in luminance interference for each color pixel PXC. Accordingly, the image displayed on the liquid crystal panel 30 cannot be identified at all on both sides. As a result, secrecy and security in the narrow viewing angle mode are further enhanced.

In the case where all of the interfering sub-pixel driving signals are generated only by the offset sub-pixel data Eoff, the interfering sub-pixel ESP prevents the interfering light from being transmitted to both sides thereof, including the front of the liquid crystal panel 30. There is no light passing through the interfering sub-pixel ESP by the offset-sub-pixel driving signal, and only the front and the front of the liquid crystal panel 30 by the red, green, and blue sub-pixels RSP, GSP, and BSP. There is only light that is transmitted to both sides. Accordingly, the image displayed on the liquid crystal panel 30 is clearly seen from the front as well as from the side as in FIG. 3B.

Further, when some of the interfering sub-pixel driving signals are generated by the interfering sub-pixel data Ed, and the remaining interfering sub-pixel driving signals are generated by the offset sub-pixel data Eoff, the interfering sub-pixel driving signals ( Some of the ESPs allow interference light to be transmitted to both sides with respect to the front side of the liquid crystal panel 30, and the remaining interference sub-pixels ESP are also interfered with both sides thereof including the front side of the liquid crystal panel 30. Do not allow penetration. The amount of light transmitted to both sides by some of the interference sub-pixels ESP is added to the amount of light transmitted to both sides by the red, green, and blue sub-pixels RSP, GSP, and BSP, so that the luminance component from the side is reduced. Cause interference. Accordingly, the text information (which may optionally be image information) displayed in the region where some of the interfering sub-pixels ESP in response to the interfering sub-pixel driving signal is located is lateral, as shown at the edge of FIG. 3C. You won't see it at. On the other hand, the remaining interference sub-pixel ESP in response to the offset sub-pixel driving signal is no transmitted light, only the red, green and blue sub-pixels (RSP, GSP, BSP) by the liquid crystal panel 30 There is only light transmitted in front of and to both sides thereof. Accordingly, the image information (which may be text information) displayed in the region where the remaining interfering sub-pixels ESP are located is viewed from the front side as well as the side of the liquid crystal panel 30 as in the center portion of FIG. 3C. You lose.

Finally, the timing control unit 36 inputs synchronization signals (ie horizontal and vertical synchronization signals and a data clock) from an external video source. The timing control unit 36 generates the gate timing signal GTS to be supplied to the gate driver 32 and the data timing signal DTS to be supplied to the data driver 34 using the synchronization signals. In addition, the timing control unit 36 supplies the interference control signal ECS required for the data generation operation of the interference data generation unit 40 and the combination control signal CCS required for the data combination operation of the video data combination unit 42. Occurs. On the other hand, the interference area controller 44 controls the data clock Dclk, the horizontal sync signal Hsync, and the vertical sync signal Vsync required for the modulation of the optical / narrow mode control signal W / N to the external video source and timing. Input from either of the control unit 36 is carried out.

FIG. 5 is a detailed block diagram illustrating an exemplary embodiment of the interference data generator 40 in FIG. 2.

Referring to FIG. 5, the interference data generating unit 40 includes a data collecting unit constituting a serial circuit with respect to the video data VD from the register 50 and an external video source (ie, a computer graphics card). 52, a calculation unit 54, and a selection unit 56 are provided. The register 50 stores the op-cept sub-pixel data Eoff corresponding to the offset value. This register 50 may be replaced with a plurality of switches that may generate offset sub-pixel data Eoff.

The data collecting unit 52 sequentially inputs red, green, and blue sub pixel data Rd, Gd, and Bd that are input in a serial form, and thus, the red, green, and blue sub pixel data Rd, Gd, Bd) is simultaneously transmitted to the calculation unit 54. For this purpose, the data collecting unit 52 responds to the first interference control signal ECS1 from the timing control unit 36 in FIG. As the first interference control signal ECS1, a data clock having the same period as that of the sub pixel data is preferably used. The data collecting unit 52 sequentially red, green, and blue sub-pixel data Rd, Gd, and Bd from an external video source in response to the first interference control signal ECS1 such as a data clock. A shift register may be used to shift to.

The calculation unit 54 generates the interfering sub pixel data Ed by using the red, green, and blue sub pixel data Rd, Gd, and Bd collected by the data collecting unit 52. In order to input the collected red, green and blue sub-pixel data Rd, Gd, and Bd, the calculation unit 54 responds to the second interference control signal ECS2 from the timing control unit 36 in FIG. . The second interference control signal ECS2 has a frequency (that is, three times the period) of 1/3 of the first interference control signal ECS1. As the second interference control signal ECS2, a three-divided data clock is preferable. In order to calculate the interfering sub-pixel data Ed, the calculator 54 subtracts the red, green, and blue sub-pixel data Rd, Gd, and Bd collected from the reference luminance data Yd as in Equation 1. The reference luminance data Yd is any one gradation level lower than the maximum gradation level HGL each of the red, green, blue, and interfering sub-pixel data Rd, Gd, Bd, and Ed may have as shown in FIG. 6A. The reference gradation level REL is set and determined by the sum of the red, green, blue, and interfering sub-pixel data Rref, Gref, Bref, and Eref of the reference gradation level REL. The reference gray level REL is preferably an intermediate gray level that each sub-pixel data can have.

(Equation 1)

Ed = Yd-(Rd + Gd + Bd)

   = (Rref + Gref + Bref + Eref)-(Rd + Gd + Bd)

According to Equation 1, when the gradation level of each of the collected red, green, and blue sub-pixel data Rd, Gd, and Bd is lower than the reference gradation level REL (ie, approaching the basis gradation level, In addition (see Fig. 6B), the interfering sub-pixel data Ed has a gradation level close to the maximum gradation level HGL, whereas the collected red, green and blue sub-pixel data Rd, Gd, and Bd 6) As each gradation level is higher than the reference gradation level REL (i.e., closer to the maximum gradation level HGL) as shown in FIG. 6C, the interfering sub-pixel data Ed is lower to the base gradation level. It has a gradation level.

Thus, the gray level is opposite to the gray level of the red, green, and blue sub pixel data in which the interfering sub pixel data Ed is collected, so that the luminance at the side of the color pixel PXC is distributed near the reference value. . By keeping the luminance at the side of the color pixel PXC constant at the reference value (for example, the intermediate luminance value), the image displayed on the liquid crystal panel 30 in the narrow viewing angle mode is completely absent from the side as in FIG. 4A. It will not be identified. As a result, the liquid crystal display device of the present invention further enhances confidentiality and security in the narrow viewing angle mode. A processor having an arithmetic function may be used as the arithmetic unit 54 that calculates such interference sub-pixel data Ed. Alternatively, the calculation unit 54 uses the collected red, green, and blue subpixel data Rd, Gd, and Bd as one address signal, and the interference stored at the address corresponding to the logical value of the subpixel data. It may be replaced by a look-up table that allows sub-pixel data Ed to be read. In this case, the look-up table is once each time three sub-pixel data (ie, red, green, and blue sub-pixel data Rd, Gd, and Bd) are input in response to the second interference control signal ECS2. The read operation is performed.

The selector 56 selects the offset sub-pixel data Eoff from the register 50 in accordance with the logic value of the modulated optical / narrow mode control signal MW / N from the interference region controller 44 in FIG. Or the interfering sub-pixel data Ed from the calculating section 54 as the interfering data IDF to the video data combining section 42 of FIG. If the modulated light / narrow mode control signal MW / N has a specific logic (i.e., high logic or low logic) to specify the narrow viewing angle mode, then the selector 56 may interfere with the sub-pixel data from the calculator 54. (Ed) is supplied as the interference data IDF to the video data combination section 42 of FIG. Conversely, if the modulated wide / narrow mode control signal MW / N has initialization logic (i.e., low logic or high logic) that specifies the wide viewing angle, the selector 56 may offset the register from the register 50. The sub pixel data EFF is supplied to the video data combiner 42 of FIG. 2 as the interference data IDF.

FIG. 7 is a flowchart for explaining an operation procedure of the interference data generating unit 40 configured as shown in FIG.

Referring to FIG. 7, the interference data generator 40 checks whether the modulated optical / narrow mode control signal MW / N is a specific logic (i.e., high logic or low logic) designating a narrow viewing angle mode ( Step S10). If the modulated light / narrow mode control signal MW / N has a specific logic for specifying the narrow viewing angle mode, the interference data generator 40 may generate red, green, and blue sub-pixel data Rdi from an external video source. , Gdi, Bdi are input sequentially (step S12), and the input red, green, and blue sub-pixel data Rdi, Gdi, Bdi are collected (step S14). Subsequently, the interference data generation unit 40 calculates the interference sub-pixel data Edi by Equation 2 using the collected red, green, and blue sub-pixel data Rdi, Gdi, and Bdi (step S16). The calculated interfering sub-pixel data Edi is supplied to the video data combining unit 42 as the interfering data IDF (step S18).

On the contrary, if the optical / narrow mode control signal MW / N modulated in step S10 has initialization logic (that is, low logic or high logic) that specifies the wide viewing angle mode, the interference data generator 40 may turn off. -The set sub pixel data Eoff is supplied to the video data combining unit 42 as the interference data IDF (step S30). After performing step S18 or step S30, the interference data generating unit 40 returns to step S10.

FIG. 8 is a detailed block diagram illustrating another embodiment of the interference data generator 40 shown in FIG. 2 in detail. The interference data generator 40 of FIG. 8 includes a memory 58 and a memory controller 60 instead of the data collector 52 and the calculator 54 included in the interference data generator 40 of FIG. 5. Except that, it has the same configuration as the interference data generator 40 of FIG. Accordingly, components having the same name, function, and role as those of FIG. 5 among the components included in the interference data generator 40 of FIG. 8 will be referred to by the same reference numerals as in FIG. 5.

In FIG. 8, the memory 58 stores the interfering subpixel data Ed of the number of the interfering subpixels ESP11 to ESPmn on the liquid crystal panel 30 forming a specific interference pattern. The memory 58 is capable of updating the read-only memory or the interfering sub-pixel data Ed, in which the interfering sub-pixel data Ed is not erased even when the power is not supplied. A nonvolatile memory such as an EEPROM in which the interfering sub-pixel data Ed is not erased may be used. In order to store the interfering sub-pixel data Ed forming a specific interference pattern, the memory 58 includes the same number of storage regions as the included interfering sub-pixels ESP11 to ESPmn of the liquid crystal panel 30. Some of the storage areas may store interfering sub-pixel data having a specific gray level and remaining sub-interference data having a lower or higher gray level than a specific gray level.

As such, the interfering sub-pixel data Ed forming an image of a specific interference pattern stored in the memory 58 uses red, green, and blue sub-pixel data Rd, Gd, and Bd included in the video data VD. In this case, the processing path of video data is simplified. As a result, the response speed of the video data combination unit 42 is improved.

The memory control unit 60 controls the memory 58 by using the interference control signal ECS from the timing control unit 36 in FIG. 2, so that the interference sub pixel data for one image stored in the memory 58 is stored. Causes Ed to be read sequentially. The interference control signal ECS supplied to the memory control unit 60 is a read mode control signal that periodically specifies a read operation period and a read that can cause the interfering sub-pixel data Ed to be read once during the read operation period. A clock can be included. Also, the memory controller 60 may respond to the modulated light / narrow mode control signal M-W / N from the interference region controller 44 of FIG. 2. In this case, the memory controller 60 performs a read operation only when the modulated optical / narrow mode control signal M-W / N has a specific logic for specifying the narrow viewing angle mode, thereby preventing unnecessary power consumption.

The selector 56 selects the offset sub-pixel data Eoff from the register 50 in accordance with the logic value of the modulated optical / narrow mode control signal MW / N from the interference area controller 44 of FIG. 2. Alternatively, the interfering sub-pixel data Ed from the memory 58 is transmitted to the video data combining unit 42 of FIG. 2 as the interfering data IDF. Specifically, if the modulated light / narrow mode control signal MW / N has a specific logic (i.e., high logic or low logic) to specify the narrow viewing angle mode, then the selector 56 may select the memory 58. The interfering sub-pixel data Ed from is supplied to the video data combining section 42 of FIG. 2 as the interfering data IDF. Conversely, if the modulated wide / narrow mode control signal MW / N has initialization logic (i.e., low logic or high logic) that specifies the wide viewing angle, the selector 56 may offset the register from the register 50. The sub pixel data EFF is supplied to the video data combiner 42 of FIG. 2 as the interference data IDF.

FIG. 9 is a flowchart illustrating an example of an image region detection operation performed by the image region detector 38 illustrated in FIG. 2. In FIG. 9, the image area detection unit 38 inputs the video data VD from an external video source (step S20) and checks whether image information is included in the input video data VD (step S22). step). In this case, the presence or absence of the image information depends on whether an identification code or attribute information for the image information included in the video data VD is included. When the identification code or attribute information for the video data VD is included (that is, when the image information is included in the video data VD), the image area detection unit 38 stores the image information occupied by the image information in the image. Image area data IAD including at least two coordinate values (eg, vertical start-horizontal start coordinates (XsYs) and vertical end-horizontal end coordinates (XeYe) that can indicate an area and including them. (Step S24). The detected image region data IAD is supplied to the interference region controller 44 shown in FIG. 2 by the image region data IAD generated by the image region detector 38 (step S26). If the image information is not included in the video data VD after the step S26 or the step S22, the image area detector 38 returns to the step S20.

FIG. 10 is a flowchart for explaining another embodiment of an image region detection operation performed by the image region detection unit 38 shown in FIG. 2. Referring to FIG. 10, the image area detection unit 38 checks the logic state of the vertical or horizontal synchronization signal Vsync or Hsync to confirm whether the blanking period has started (step S30). If the vertical blanking period or the horizontal blanking period is entered, the image area detector 38 checks whether the image area data IAD is input from an external video source via a transmission line for the video data VD (S32). step). If the image area data IAD is input from an external video source, the image area detection unit 38 transmits the input image area data IAD to the interference area control unit 44 shown in FIG. 2 and then proceeds to step S30. Return (step S34).

11 is a block diagram illustrating a liquid crystal display capable of controlling a viewing angle according to another exemplary embodiment of the present invention. Referring to FIG. 16, the liquid crystal display includes an interference data generator 40 for generating interference data to be supplied to the interference subpixels ESP11 to ESPmn on the liquid crystal panel 30A, and the interference data generator 40. And a video data combination unit 42A for adding the interference data IFD from the video data to the video data VD from the outside.

In the liquid crystal panel 30A, the sub-pixels RSP11 through to the regions divided by the plurality of data lines DL1 through DL4m arranged in the horizontal direction and the plurality of gate lines GL1 through GLn arranged in the vertical direction. RSPmn, GSP11 ~ GSPmn, BSP11 ~ BSPmn, ESP11 ~ ESPmn) are prepared. Each of these sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, BSP11 to BSPmn, and ESP11 to ESPmn each includes a data line in response to a scan signal on a liquid crystal cell CLC and a gate line GL connected to a common electrode Vcom. The thin film transistor MN for switching the sub pixel driving signal to be transmitted from the DL to the liquid crystal cell CLC is provided. Among these sub-pixels, the red sub-pixels RSP11 to RSPmn are connected to the 4k-3rd data lines DL1 to DL4m-3, respectively, and the green sub-pixels GSP11 to GSPmn are respectively connected to the 4k-2nd data line. Blue subpixels BSP11 to BSPmn are connected to the 4k-1 th data lines DL3 to DL4m-1, and interference subpixels ESP11 to ESPmn are each 4k. It is connected to the first data line DL4 to DL4m. In addition, each of the interfering sub-pixels ESP11 to ESPmn can be controlled in a pair with the red, green, and blue sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, and BSP11 to BSPmn disposed adjacent to each other in the left direction. Color pixels PXC11 to PXCmn are constituted. Accordingly, the first color pixel PXC11 of the first line is commonly connected to the first gate line GL1 and red, green, blue, and interference connected to the first to fourth data lines DL1 to DL4, respectively. The sub pixels RSP11, GSP11, BSP11, and ESP11 are included. In this form, the last color pixel PXCmn of the last line is also connected to the nth gate line GLn and the red and green subs connected to the 4m-3 to 4mth data lines DL4m-3 and DL4m, respectively. Pixels RSPmn, GSPmn, BSPmn, and ESPmn are included. Each of the red, green, and blue sub-pixels RSP11 to RSPmn, GSP11 to GSPmn, and BSP11 to BSPmn is driven in a horizontal electric field to display an image so that it can be viewed from a wide angle. On the other hand, each of the interfering sub-pixels ESP11 to ESPmn is driven in a vertical electric field manner, so that the image to be viewed from the side except the front side is selectively interfered with the interfering sub-pixel signal. When the image to be seen laterally is interfered by these interfering sub-pixels ESP11 to ESPmn, the image displayed on the liquid crystal panel 30A can be viewed only in a narrow angle range with respect to the front side of the liquid crystal panel 30A. do. In other words, when there is interference by the interfering sub-pixels ESP11 to ESPmn, the liquid crystal panel 30A causes the image of the narrow viewing angle mode to be displayed. On the contrary, in the case where there is no interference by the interfering sub-pixels ESP11 to ESPmn, the image of the wide viewing angle mode is displayed on the liquid crystal panel 30A.

  The interference data generator 40 adjusts the viewing angle of the liquid crystal panel 30A in response to the optical / narrow mode control signal (W / N) from the outside (for example, the computer graphics card or the demodulation unit of the television receiving module). The interference data IDF, which is switched widely or narrowly, is supplied to the video data combination section 42A. This interference data IFD faces the front of the liquid crystal panel 30A when the optical / narrow mode control signal W / N has a specific logic (e.g., high logic or low logic) that specifies the narrow viewing angle mode. It includes interfering sub-pixel data constituting a fixed interference pattern that allows interference light to be added to both sides as a reference. Alternatively, the interference data IDF may include interfering sub pixel data Ed, which constitutes an interference pattern that varies from image to image. In order to generate the interference data IDF of the interference pattern that varies from image to image, the interference data generator 40 may input video data from an external video source (for example, a graphic card of a computer). On the other hand, when the wide / narrow mode control signal W / N has initialization logic (for example, low logic or high logic) for specifying the wide viewing angle mode, the interference data IDF is generated by the liquid crystal panel 30A. Interfering sub-pixel data Eoff having an offset value that prevents the interfering light from traveling toward both sides with respect to the front side.

The video data combiner 42A inputs video data VD including color sub pixel data for red, green and blue sub pixels from an external video source (not shown). The video data combination unit 42A adds the interference data IDF from the interference data generation unit 40 to the video data VD so as to match the arrangement state of the subpixels on the liquid crystal panel 30A. The combination video data CVD, in which blue and interfering (or offset) sub-pixel data Rd, Gd, Bd, IFD (ie, Ed or Eoff) are sequentially and repeatedly arranged, is generated.

The liquid crystal display of FIG. 11 includes an image region detector 38 and an interference region controller 44 connected in series to the input line of video data VD. The image area detection unit 38 inputs the video data (VD) stream from an external video source (for example, a demodulation unit of a graphic card or a television receiving module of a computer system). The image area detector 38 checks whether image information is included in the video data (VD) stream. If the image information is included in the video data (VD) stream, the image area detection unit 38 detects a position of the area of the image information in the image and interpolates the detected image area data IAD to the interference area control unit 44. To feed. The image area data IAD includes coordinate values of two points that can distinguish an area of image information. For example, let the image area be located in the center of the image, surrounded by text information, as in FIG. In this case, the coordinate value for the vertical start line of the image area (conventionally referred to as "vertical start coordinate value (Ys)") and the coordinate value for the vertical end line of the image area (hereinafter, "vertical end coordinate value"). (Ye) ", the coordinate values for the horizontal start line of the image area (hereinafter referred to as" horizontal starting coordinate value (Xs) ") and the coordinate values for the horizontal end line of the image area (hereinafter referred to as" Ye ""). , &Quot; horizontal end coordinate value Xe " should be included in the image area data IAD. To this end, the area data IAD includes two coordinate values (XsYs and XeYe or XeYs and XsYe) for two diagonal lines among the four vertices of the image area. For convenience, the image area data IAD in the embodiment of the present invention may have a vertical start-horizontal start coordinate value (ie, XsYs) with respect to the horizontal start point in the vertical start line of the image area and the vertical direction of the image area. It is assumed that it has a vertical end-horizontal end coordinate value XeYe with respect to the end point of the horizontal direction in the end line of. Alternatively, it will be appreciated by those skilled in the art that the image region data IAD may have a vertical start-horizontal end coordinate value XeYs and a vertical end-horizontal start coordinate value XsYe. The image area data IAD may be transmitted through an transmission line of the video data VD from an external video source when the image is included in the video data VD. In this case, the image area data IAD is supplied to the image area detection unit 38 from an external video source in a period in which the video data VD is not transmitted (for example, a vertical blanking period or a vertical blanking period). In order to detect such image region data IAD, the image region detector 38 uses signals from the transmission line for the video data VD using at least one of the vertical and horizontal synchronization signals Vsync and Hsync. Can be monitored.

 In response to the image area data IAD including the vertical start-horizontal end coordinate value XsYs and the vertical end-horizontally end coordinate value XeYe in this way, the interference area controller 44 causes the interference from an external video source. The optical / narrow mode control signal W / N to be supplied toward the data generator 40 is modulated. The optical / narrow mode control signal MW / N modulated by the interference area control unit 44 alternates between a specific logic and a ground logic in some sections every frame (that is, every period of the vertical synchronization signal Vsync). It has a waveform of shape. In other words, the modulated light / narrow mode control signal M-W / N periodically shows pulses of a specific logic or pulses of the underlying logic in some intervals. The length of the interval in which the pulse of a particular logic (or basis logic) appears (i.e. the vertical direction of the image) corresponds to the difference between the vertical end coordinate value and the vertical start coordinate value, and the width of the pulse of the specific logic or the pulse of the underlying logic. (Horizontal direction section of the image) corresponds to the difference between the horizontal end coordinate value and the horizontal start coordinate value.

In order to modulate the optical / narrow mode control signal (W / N) in this way, the interference domain controller 44 includes a processor, such as a microcomputer or a central processing unit, or at least two or more counters, comparators, registers and logic gates. It may include a logic operation circuit consisting of. The processor or logic arithmetic circuit that implements the interference region controller 44 uses the data clock Dclk, the horizontal synchronization signal Hsync, and the vertical synchronization signal Vsync to designate the image vertical section designated by the image region data IAD. And distinguish the horizontal selection section and cause the light / narrow mode control signal W / N to be inverted for each distinct horizontal selection section within the distinct vertical selection section. Alternatively, the interference area controller 44 may use the data output enable signal DE included in the synchronization signals SYNC instead of the horizontal synchronization signal Hsync.

In addition, the interference area controller 44 may input a local interference mode signal PEM generated by a user's designation from an external video source. The local interference mode signal PEM has specific logic (eg, high logic or low logic) when the user requires security of an image (or text) contained in the picture. When this local interference mode signal PEM maintains a certain logic (i.e., when the user requires partial security of the image), the interference area control section 44 controls the optical / narrow mode control signal W / N. Modulation is performed so that a part of the image displayed on the liquid crystal panel 30A is not seen from the side. In addition, when the local interference mode signal PEM maintains a certain logic (i.e., when partial security of the image is required), the optical / narrow mode control signal W / N is inverted by the user's designation. Instead of the image (or text) on the side, the text (or image) may be switched so that it is not shown. In contrast, when the local interference mode signal PEM has a basis logic (i.e. when partial security of the picture is not required), the interference area controller 44 controls the light / narrow mode from an external video source. The signal W / N is supplied to the interference data generating unit 40 in its original state without being modulated. In this case, the image displayed on the liquid crystal panel 30A is not entirely seen from the side, or the whole is seen from the side. In other words, based on the logical combination of the local interference mode (PEM) and the light / narrow mode control signal (W / N), the interference area control section 44 displays the wide viewing angle display or the narrow viewing angle display and the image or the whole image. A modulated wide / narrow mode control signal (MW / N) may be generated that allows narrow-view angle representation for text to be selectively performed.

The interference data generator 40 responsive to the modulated optical / narrow mode control signal MW / N from the interference area controller 44 performs the interference sub-pixel data Ed every frame (that is, every period of the vertical synchronization signal). ) Is supplied to the video data combiner 42 with the interference data IDF mixed with the offset sub-pixel data Eoff. The interference data IDF generated by the interference data generator 40 draws the interference sub-pixel data Ed in a period of a pulse of a specific logic of the modulated optical / narrow mode control signal MW / N and the modulated data. In the period of the pulse of the basis logic of the optical / narrow mode control signal MW / N, the offset sub-pixel data Eoff is included. Accordingly, the sub pixel data stream CVD output from the video data combination unit 42 includes only the offset sub pixel data Eoff in addition to the color sub pixel data Rd, Gd, and Bd, or the interfering sub pixel data. A frame period (ie, a vertical scan period) and a horizontal scan period may include only (Ed) or both of offset sub-pixel data Eoff and interfering sub-pixel data Ed.

In addition, the liquid crystal display according to another exemplary embodiment may include a gate driver 32A for sequentially driving the gate lines GL1 to GLn on the liquid crystal panel 30A, and data lines on the liquid crystal panel 30A. Data driver 34A for driving (DL1 to DL4m), and a timing control unit 36A for controlling the operation timing of these gates and data drivers 32A, 34A. The gate driver 32A generates n scan signals that sequentially enable the gate lines GL1 to GLn in response to the gate timing signal GTS from the timing control unit 36A.

The data driver 34A, in response to the data timing signal DTS from the timing control unit 36A, each time one of the gate lines GL1 to GL2n is enabled, the 4m data lines DL1 to. The sub pixel driving signals are supplied on the DL4m. For this purpose, the data driver 34A inputs the combined video data CVD transmitted in the serial form from the video data combination section 42A. Each time one of the gate lines GL1 to GLn is enabled, the data driver 34A performs red, green, blue and interfering (or offset) sub-pixel data Rd, Gd, Bd and IFD (Ed). Or Eoff)) to sequentially input the sub-pixel data streams, and to display the red sub-pixel signal for each of the 4k-3rd data lines DL1 to DL4m-3, and the 4k-2nd data lines DL2 to DL4m-. 2) A green sub-pixel driving signal is present in each, a blue sub-pixel driving signal is present in each of the 4k-1th data lines DL3 to DL4m-1, and an interference (or an op is applied to each of the 4kth data lines DL4 to DL4m. -Set) Sub-pixel drive signal is supplied.

When all of the interfering sub-pixel driving signals are generated only by the interfering sub-pixel data Ed, the interfering sub-pixel ESP allows the interfering light to be transmitted to both sides with respect to the front side of the liquid crystal panel 30A. The amount of light transmitted to both sides by the interfering sub-pixel ESP is adjusted according to the voltage level of the interfering sub-pixel driving signal. The amount of light transmitted to both sides by the interfering sub-pixels ESP is added to the amount of light transmitted to both sides by the red, green, and blue sub-pixels RSP, GSP, and BSP so that the luminance component from the side interferes. To be. As a result, as shown in FIG. 4A, an image that cannot be seen from the side is displayed on the front surface of the liquid crystal panel 30A. In addition, the interfering sub-pixel driving signals have different voltage levels at positions of the interfering sub-pixels ESP11 to ESPmn corresponding to the interference pattern, thereby causing a difference in luminance interference for each color pixel PXC. Accordingly, the image displayed on the liquid crystal panel 30A cannot be identified at all on both sides. As a result, secrecy and security in the narrow viewing angle mode are further enhanced.

When all of the interfering sub-pixel driving signals are generated only by the offset sub-pixel data Eoff, the interfering sub-pixel ESP does not allow the interfering light to be transmitted to both sides thereof, including the front of the liquid crystal panel 30A. There is no light passing through the interfering sub-pixel ESP by the offset-sub-pixel driving signal, and only the front and the front of the liquid crystal panel 30A by the red, green, and blue sub-pixels RSP, GSP, and BSP. There is only light that is transmitted to both sides. Accordingly, the image displayed on the liquid crystal panel 30A is clearly seen from the front as well as from the side as in FIG. 4B.

Furthermore, when some of the interfering sub-pixel driving signals are generated by the interfering sub-pixel data Ed and the remaining interfering sub-pixel driving signals are generated by the offset sub-pixel data Eoff, the interfering sub-pixels ESP Some of () causes the interference light to be transmitted to both sides with respect to the front of the liquid crystal panel 30A, and the remaining interference sub-pixels ESP transmits the interference light to both sides thereof including the front of the liquid crystal panel 30A. Don't let that happen. The amount of light transmitted to both sides by some of the interference sub-pixels ESP is added to the amount of light transmitted to both sides by the red, green, and blue sub-pixels RSP, GSP, and BSP, so that the luminance component from the side is reduced. Cause interference. Accordingly, the text information (which may optionally be image information) displayed in the region where some of the interfering sub-pixels ESP in response to the interfering sub-pixel driving signal is located is lateral, as shown at the edge of FIG. 4C. You won't see it at. On the other hand, the remaining interference sub-pixel ESP in response to the offset sub-pixel driving signal is no light transmitted, only the red, green and blue sub-pixels (RSP, GSP, BSP) by the liquid crystal panel 30A There is only light transmitted in front of and to both sides thereof. As a result, the image information (which may be text information) displayed in the region where the remaining interfering sub-pixels ESP are located may be viewed not only in front of the liquid crystal panel 30A but also laterally, as in the center of FIG. 4C. You lose.

Finally, the timing control unit 36A inputs synchronization signals (ie horizontal and vertical synchronization signals and a data clock) from an external video source. The timing control unit 36 generates the gate timing signal GTS to be supplied to the gate driver 32A and the data timing signal DTS to be supplied to the data driver 34A using the synchronization signals. In addition, the timing control unit 36A generates an interference control signal ECS necessary for the data generation operation of the interference data generating unit 40 and a combination control signal CCS necessary for the data combining operation of the video data combining unit 42A. do. On the other hand, the interference area controller 44 controls the data clock Dclk, the horizontal sync signal Hsync, and the vertical sync signal Vsync required for the modulation of the optical / narrow mode control signal W / N to the external video source and timing. Input from either of the control units 36A.

As described above, in the liquid crystal display and the driving method of the viewing angle control according to the present invention, the interference data and the offset data are selectively applied to the interfering sub-pixels according to the region where the image information is located in the video data. Thereby, it is possible to selectively make the image or a portion other than the image of one image invisible from the side. As a result, the image can be secured for each area according to the attribute of the information.

As described above, the present invention has been described with reference to the embodiments shown in the drawings, which are merely exemplary, and a person of ordinary skill in the art without departing from the spirit and scope of the present invention. It will be apparent that various modifications, changes, and equivalent other embodiments are possible. Accordingly, the scope of the present invention to be protected should be defined by the appended claims.

Claims (9)

A liquid crystal panel comprising a plurality of color pixels each having red, green, blue and sub-pixels for interference; A data driver for supplying a pixel driving signal input by the subpixels on the liquid crystal panel by one line; An interference data generator for generating interference and offset data to be supplied to the interference sub pixels; A data combination unit for adding the interference and offset data to video data to be supplied toward the data driver; An image region detector configured to detect a region where image information is located in video data supplied to the data combiner; And And an interference region controller configured to control the interference data in response to the region data from the image region detector to selectively output the interference data and the offset data according to the region. The method of claim 1, And the image area detector detects the presence or absence of image information by inspecting the property of the video data to detect the occupied area of the image. The method of claim 1, And the image region detector detects region information on image information transmitted in a section in which there is no data in the stream of video data. The method of claim 3, wherein And the area information on the image information is transmitted in any one of a vertical blanking section and a horizontal blanking section. The method of claim 1, And the interference area controller controls the interference data generator to selectively generate the interference and offset data when a narrow viewing angle mode is selected. Detecting an area of image information in video data for red, green, and blue sub-pixels on the liquid crystal panel; Selectively generating interference data and offset data to be supplied to the interfering sub-pixels on the liquid crystal panel according to the detected region information; Combining the selectively generated interference and offset data with the video data; And And driving the sub-pixels on the liquid crystal panel in response to the combined video data. The method of claim 6, And detecting the image area by detecting the property of the video data. The method of claim 6, The image area detecting step of the liquid crystal display device of claim 1, characterized in that for sampling the area information for the image information transmitted in the data-free period of the video data stream. 9. The method of claim 8, The area information on the image information is transmitted to any one of a vertical blanking period and a horizontal blanking period.

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