KR101152821B1 - Method of manufacturing capacitor of semiconductor device - Google Patents

Abstract

According to another aspect of the present invention, there is provided a method of forming a capacitor of a semiconductor device, the method including: forming a mold insulating layer having a hole on a semiconductor substrate; forming a first metal layer for a storage node on the mold insulating layer including the hole surface; Forming an insulating film to block the inlet of the hole to form a void in the lower portion of the hole, the void being blocked by the insulating film; and removing the insulating film on the upper part of the mold insulating film; Forming a storage node including a first metal film for a storage node and a second metal film for a storage node by forming a second metal film for a storage node on the insulating film blocking an opening of a hole; and removing the mold insulating film. Steps.

Description

Capacitor Formation Method of Semiconductor Device {METHOD OF MANUFACTURING CAPACITOR OF SEMICONDUCTOR DEVICE}

The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to prevent cracking of the storage node due to stress when forming a capacitor of a semiconductor device having a pillar-type storage node. A method for forming a capacitor of a semiconductor device.

As the demand for semiconductor memory devices has soared, various techniques for obtaining high capacity capacitors have been proposed. Here, the capacitor is a structure in which a dielectric film is interposed between the storage node and the plate node, the capacitance of which is proportional to the surface area of the electrode and the dielectric constant of the dielectric film, and the spacing between the electrodes, that is, It is inversely proportional to the thickness of the dielectric film.

Therefore, in order to obtain a high capacity capacitor, it is required to use a dielectric film having a large dielectric constant, to enlarge the electrode surface area, or to reduce the distance between the electrodes. However, reducing the distance between the electrodes, that is, the thickness of the dielectric film has a limitation, and researches for forming a high capacity capacitor have been conducted by using a dielectric film having a high dielectric constant or increasing the electrode surface area. .

In this case, the method for increasing the electrode surface area is typically a method of forming the shape of the storage node into a concave or cylinder-shaped three-dimensional structure, and among these, the cylindrical storage node has a concave shape. The relatively large electrode area compared to the storage node is advantageous for the application of high capacity capacitors.

In addition, in addition to the method of forming the storage node in a concave or cylindrical three-dimensional structure to increase the electrode surface area of the storage node as described above, a highly integrated semiconductor having a parallel plate structure that cannot be applied to the cylindrical storage node. In the device, the storage node is formed by applying a fin or pillar structure.

Hereinafter, a method of manufacturing a semiconductor device including a process of forming a pillar-type storage node according to the related art will be briefly described.

First, an etch stop layer and a mold insulating layer are sequentially deposited on an interlayer insulating layer including a storage node contact, and then the mold insulating layer and the etch stop layer are etched to form holes for exposing the storage node contact.

Subsequently, after depositing the metal layer for the storage node to fill the hole on the front surface of the substrate including the hole, CMP to form a separation between the storage nodes to form a pillar-type storage node embedded with the metal layer for the storage node in the hole. .

Next, a dip-out process is performed to remove the mold insulating layer serving as the storage node forming frame, and then a dielectric layer and a plate node are sequentially formed on the storage node to form a capacitor. do. Subsequently, a series of subsequent known processes are sequentially performed on the substrate product on which the capacitor is formed to complete the semiconductor device.

However, although not shown and described in detail, the pillar-type storage node can be applied to highly integrated devices that can increase the capacity of the capacitor by increasing the surface area of the storage node and can not apply a cylindrical storage node. Although there is an advantage in that the metal layer for the storage node is embedded in the hole for the storage node, or after the buried, the metal layer for the storage node due to the stress between the relatively large amount of embedded metal layer for the storage node and the mold insulating film. Cracks will occur.

Furthermore, during the CMP process for separation between storage nodes, the cracks are further enlarged, and in some cases, the cracks propagate into the mold insulating layer, thereby degrading the characteristics of the device.

The present invention provides a method of forming a capacitor of a semiconductor device capable of preventing cracks in the storage node when forming a capacitor of the semiconductor device to which the pillar-type storage node is applied.

In addition, the present invention provides a method of forming a capacitor of a semiconductor device capable of preventing the occurrence of cracks in the pillar-type storage node as described above to prevent deterioration of characteristics of the semiconductor device.

According to another aspect of the present invention, there is provided a method of forming a capacitor of a semiconductor device, the method including: forming a mold insulating layer having a hole on a semiconductor substrate; forming a first metal layer for a storage node on the mold insulating layer including the hole surface; Forming an insulating film to block the inlet of the hole to form a void in the lower portion of the hole, the void being blocked by the insulating film; and removing the insulating film on the upper part of the mold insulating film; Forming a storage node including a first metal film for a storage node and a second metal film for a storage node by forming a second metal film for a storage node on the insulating film blocking an opening of a hole; and removing the mold insulating film. Steps.

The forming of the insulating layer is performed by using a plasma-enhanced chemical vapor deposition (PE-CVD) method at a temperature of 400 to 500 ° C., a pressure of 5 to 7 Torr, and a power condition of 100 to 1000 W.

The insulating film is formed of an oxide film or a nitride film.

The first metal film for the storage node and the second metal film for the storage node include a TiN film.

The first metal film for the storage node is formed to a thickness of 100 ~ 300Å.

After removing the mold insulating film, forming a dielectric film and a plate node on the storage node;

According to the present invention, when forming a capacitor of a semiconductor device to which a pillar-type storage node is applied, a metal film for the storage node is first formed only on an inner surface of the hole for the storage node, and then coating characteristics are applied to the hole in which the first metal film for the storage node is formed. By filling the upper part of the hole with an over-hang phenomenon using this inferior method, the metal layer for a storage node is then completely embedded on the insulating film to form a pillar-type storage node. The thickness of the metal layer for the storage node can be relatively reduced, thereby preventing cracks in the metal layer for the storage node due to the stress between the metal layer for the storage node and the mold insulating layer.

In addition, since the present invention can prevent the occurrence of cracks in the metal layer for the storage node as described above, during the CMP process for separation between storage nodes, the crack is prevented from spreading to prevent the crack from propagating into the mold insulating layer. can do.

Therefore, this invention can prevent the characteristic fall of a semiconductor element.

When forming a capacitor of a semiconductor device to which a pillar-type storage node is applied, the metal layer for the storage node is first formed only on the inner surface of the hole for the storage node, and then applied to the hole in which the first metal layer for the storage node is formed. After filling only the upper part of the hole so that an over-hang phenomenon occurs using a method having poor characteristics, a pillar-type storage node is formed by completely filling a metal layer for a storage node on the insulating layer again. do.

In this way, unlike the conventional pillar-type storage node in which the inside of the hole for the storage node is completely filled with only the metal layer for the storage node, the inside of the hole for the storage node is not only the metal layer for the storage node but also the insulating layer. By forming a pillar-shaped storage node by filling the gap, the thickness of the metal layer for the storage node can be relatively reduced, so that cracks in the metal layer for the storage node due to stress between the metal layer for the storage node and the mold insulating layer. It can prevent occurrence.

In addition, since cracks may be prevented in the metal layer for the storage node as described above, the cracks may be prevented from spreading in the mold insulation layer during the CMP process for separation between the storage nodes. .

Therefore, the fall of the characteristic of a semiconductor element can be prevented.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1A to 1H are cross-sectional views illustrating processes for forming a capacitor of a semiconductor device according to an embodiment of the present invention, which will be described below.

Referring to FIG. 1A, an interlayer insulating layer 102 is formed on a semiconductor substrate 100 having a lower structure (not shown) such as an isolation layer and a gate. Then, a storage node contact 104 made of polysilicon is formed in the interlayer insulating film 102, and the etch stop layer 106 is formed on the interlayer insulating film 102 having the storage node contact 104 made of polysilicon. ) And the mold insulating film 108 are sequentially formed.

Referring to FIG. 1B, a mask pattern (not shown) is formed on the mold insulating layer 108, and the mold insulating layer 108 and the etch stop layer 106 are etched using the mask pattern as an etch mask. A hole H is formed in 108.

Referring to FIG. 1C, a Ti film is formed on a mold insulating film 108 including a surface of a hole H exposing the storage node contact 104 made of polysilicon. Then, an annealing is performed on the resultant of the substrate 100 on which the Ti film is formed, so that the ohmic contact layer 110 made of a material such as TiSix is formed on the bottom portion of the hole H, that is, the storage node contact made of polysilicon. (104) selectively formed only on the surface.

The Ti film is formed by CVD (Chemical Vapor Deposition) or PVD (Physical Vapor Deposition) method.

Subsequently, the Ti film unreacted in the annealing process is wetly removed.

Referring to FIG. 1D, the first metal layer 112 for the storage node formed of the TiN layer is formed on the mold insulating layer 108 including the surface of the hole H on which the ohmic contact layer 110 is formed.

Next, an insulating film 114 made of an oxide film or a nitride film by using a Plasma-Enhanced Chemical Vapor Deposition (PE-CVD) method having poor buried characteristics so that the opening of the hole is blocked on the first metal film 112 for the storage node. ).

Here, the PE-CVD method is preferably carried out at a temperature of 400 ~ 500 ℃, pressure of 5 ~ 7 Torr and power conditions of 100 ~ 1000W.

In this case, when the holes are filled by using a plasma process such as PE-CVD, since the mean free path of each ion is short, the holes go straight into the deep hole H, making it difficult for the ions to enter. Therefore, an over-hang phenomenon occurs naturally in the upper portion of the hole H, so that only the upper portion of the hole H is buried.

On the other hand, when the pressure is increased or the gas flow rate is increased during deposition of the insulating film 114 by using the plasma method, the over-hang phenomenon is further increased to further improve the buried characteristics of the insulating film 114. Can be artificially reduced.

Referring to FIG. 1E, the insulating layer 114 is etched back to remove the insulating layer 114 over the mold insulating layer 108 and the upper portion of the hole H. In this case, when the insulating layer 114 is removed by the etch-back, the insulating layer 114 is partially left on the upper sidewall of the hole H in the form of a spacer.

Referring to FIG. 1F, a second metal for a storage node made of a TiN film to fill an upper portion of the hole H on the first metal film 112 for a storage node including the hole H on which the insulating layer 114 is formed. A film 116 is formed.

Referring to FIG. 1G, the second metal layer 116 for the storage node and the first metal layer 112 for the storage node are removed by chemical mechanical polishing (CMP) until the mold insulating layer 108 is exposed.

Referring to FIG. 1H, the mold insulating layer 108 and the etch stop layer 106 are removed by dip-out to form a storage node 118 having a pillar structure.

Subsequently, although not shown, a dielectric film and a plate node are formed on the storage node to complete the capacitor of the semiconductor device according to the embodiment of the present invention.

As described above, when the capacitor of the semiconductor device to which the pillar-type storage node is applied is formed, the metal layer for the storage node is first formed only on the inner surface of the hole for the storage node, and then the first metal layer for the storage node is formed. After filling the hole with an over-hang phenomenon by using a method in which the coating property is not excellent for the hole, the metal layer for the storage node is completely embedded on the insulating film, and then pillar-type storage By forming the node, it is possible to relatively reduce the thickness of the metal layer for the storage node, thereby preventing cracks in the metal layer for the storage node due to the stress between the metal layer for the storage node and the mold insulating film. .

In addition, since cracks may be prevented in the metal layer for the storage node as described above, the cracks may be prevented from spreading in the mold insulation layer during the CMP process for separation between the storage nodes. .

Therefore, the fall of the characteristic of a semiconductor element can be prevented.

In the above-described embodiments of the present invention, the present invention has been described and described with reference to specific embodiments, but the present invention is not limited thereto, and the scope of the following claims is not limited to the scope of the present invention. It will be readily apparent to those skilled in the art that the present invention may be variously modified and modified.

1A to 1H are cross-sectional views illustrating processes for forming a capacitor of a semiconductor device in accordance with an embodiment of the present invention.

Claims (6)

Forming a mold insulating layer having a hole on the semiconductor substrate; Forming a first metal film for a storage node on a mold insulating film including the hole surface; Forming an insulating film so that the inlet of the hole is blocked to form a void in the lower portion of the hole, the void being isolated from the outside by the insulating film; Removing the insulating film over the mold insulating film; and Forming a storage node including a first metal film for a storage node and a second metal film for a storage node by forming a second metal film for a storage node on the insulating layer remaining at the entrance of the hole and blocking the entrance of the hole; Capacitor forming method of a semiconductor device comprising a. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, The forming of the insulating film may be performed by using a plasma-enhanced chemical vapor deposition (PE-CVD) method at a temperature of 400 to 500 ° C., a pressure of 5 to 7 Torr, and a power condition of 100 to 1000 W. Capacitor Formation Method. Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, And the insulating film is formed of an oxide film or a nitride film. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, And the first metal film for the storage node and the second metal film for the storage node include a TiN film. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 1, And the first metal film for the storage node is formed to have a thickness of about 100 to about 300 microseconds. Claim 6 was abandoned when the registration fee was paid. The method of claim 1, After forming the storage node, Removing the mold insulating film; and Forming a dielectric film and a plate node on the storage node; Capacitor forming method of a semiconductor device further comprising.

Images