KR101151347B1 - Method of manufacturing a chip-embedded printed circuit board - Google Patents

Abstract

According to the present invention, a chip is mounted using a coreless carrier coated with copper foil on a bonding sheet, and an insulating layer and a copper foil are laminated, and then separated from each other by peeling the bonding sheet from two structures formed above and below the coreless carrier. Make two pairs of structures. Thereafter, an insulating layer and a copper foil are laminated on the upper and lower layers of the separated structure to manufacture an embedded printed circuit board having a multilayer circuit. In the coreless carrier according to the present invention, a material layer that is not adhered to the copper foil is inserted between the bonding sheet and the copper foil to maintain a vacuum between the material layer and the copper foil during fabrication of the coreless carrier, and then to separate the structure after mounting the chip. In order to remove the bonding sheet in order to release the vacuum during the cutting process.

Description

Chip embedded printed circuit board manufacturing method {METHOD OF MANUFACTURING A CHIP-EMBEDDED PRINTED CIRCUIT BOARD}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip embedded printed circuit board (PCB). The present invention relates to a method for manufacturing a chip embedded printed circuit board by using coreless structures. By forming a symmetrical structure, the present invention relates to a method for manufacturing an embedded printed circuit board which solves a problem of bending a substrate due to a difference in thermal expansion coefficient.

Recently, embedded printed circuit board technology, which manufactures components such as semiconductor chips directly on a printed circuit board, is commonly used in electronic products. When the semiconductor chip is directly embedded in the substrate, the size of the electronic component is reduced, which helps to reduce the size and weight of the electronic device. As the wiring is simplified, the circuit operating frequency can be increased, and the effects of electromagnetic waves such as noise can be increased. There is an advantage that can be shielded.

In order to embed a component such as a semiconductor chip in a printed circuit board, the chip is surface-mounted on the pad of the core substrate on which the circuit is formed by soldering, then an insulating layer such as a resin is laminated to form an encapsulation and a via to form a via. The method of manufacturing an electrical connection is common.

1A to 1D are views illustrating a process of manufacturing an embedded printed circuit board according to the prior art. Referring to FIG. 1A, a core substrate having copper foils 11a and 11b coated on both surfaces of an insulating layer 10 is prepared to embed components. Of course, in Fig. 1A, the core substrate is simply shown, but the copper foil circuit may be already processed at the front end, or may be a multilayer inner core already processed.

Subsequently, a copper foil pad is formed by performing a series of photographic processes, such as exposure and etching, with respect to the copper foil 11a, 11b of a core board | substrate. Referring to FIG. 1B, the copper foil pad is finished to form a gold plating 12 to mount the component 20 to surface mount technology (SMT). The components 20 are completely embedded in the substrate by stacking the insulating layers 30, 40a, 40b, and 40c and the copper foils 50a and 50b and hot pressing lamination. Then, as shown in FIG. 1D, a four-layer printed circuit board having the parts 20 embedded therein is obtained.

However, the embedded printed circuit board manufactured according to the prior art, as shown in Figure 1d, the upper layer portion of the printed circuit board in which the chip is thick, while the lower layer portion laminated only by the resin insulating layer is made thin so that the vertical asymmetry Is achieved. As a result, there is a problem in that the substrate is bent due to mutual thermal expansion between the upper layer of the chip-embedded substrate and the lower layer formed only of an insulating material, and in particular, the thermal expansion coefficient of the bonding sheet is different from each other, resulting in a defect in which the outer part of the substrate is separated and separated. Can be. Furthermore, when another chip is surface-mounted on a printed circuit board in which the chip is embedded, heating occurs during the surface-mounting process, thereby causing a problem of bending the substrate due to a difference in thermal expansion rate.

Accordingly, a first object of the present invention is to provide a chip-embedded printed circuit board manufacturing technology in which components are embedded in a central layer of a substrate.

A second object of the present invention is to provide a chip-embedded printed circuit board manufacturing technology in addition to the first object, which solves the problem that the substrate is bent due to the difference in thermal expansion.

A third object of the present invention is to provide a chip-embedded printed circuit board manufacturing technology in addition to the first object, which solves a problem in which the outer edge of the substrate falls due to the difference in thermal expansion of the bonding sheet.

According to the present invention, a chip is mounted using a coreless carrier coated with copper foil on a bonding sheet, and an insulating layer and a copper foil are laminated, and then separated from each other by peeling the bonding sheet from two structures formed above and below the coreless carrier. Make two pairs of structures. Thereafter, an insulating layer and a copper foil are laminated on the upper and lower layers of the separated structure to manufacture an embedded printed circuit board having a multilayer circuit. In the coreless carrier according to the present invention, a material layer that is not adhered to the copper foil is inserted between the bonding sheet and the copper foil to maintain a vacuum between the material layer and the copper foil during fabrication of the coreless carrier, and then to separate the structure after mounting the chip. In order to remove the bonding sheet in order to release the vacuum during the cutting process.

The present invention enables component mounting using existing surface mounting equipment without additional processing steps. Since the core is not used in the center layer of the embedded printed circuit board of the multilayer circuit, the thickness of the board is very thin even when the chip is embedded. It can be made thin. In addition, the present invention has the effect of solving the problem of bending the substrate or falling of the substrate by inducing thermal expansion of the upper and lower layers evenly by embedding the substrate in the center layer of the substrate.

1A to 1D illustrate a process of manufacturing a chip embedded printed circuit board according to the related art.
Figure 2a to 2g is a view showing a chip embedded printed circuit board manufacturing process according to the present invention.
3A to 3E illustrate a process for manufacturing a chip embedded printed circuit board according to a preferred embodiment of the present invention.

The present invention provides a method for manufacturing an embedded printed circuit board, comprising: (a) forming a coreless carrier by sequentially stacking a first material layer and a second material layer on both sides of a bonding sheet, wherein the first material layer is Comprising a material that is not adhered to the second material layer; (b) processing the second layer of material of the coreless carrier to form a pad, and mounting the component to be embedded on the pad surface; (c) laminating and pressure-laminating the insulating layer and the copper foil on the coreless carrier on which the component is mounted; And (d) separating the second material layer on which the component is mounted from the first material layer and the bonding sheet by cutting the air so that air flows between the first material layer and the second material layer. It provides a circuit board manufacturing method.

Hereinafter, a manufacturing method of a chip embedded printed circuit board according to the present invention will be described in detail with reference to FIGS. 2 and 3.

2A to 2G are views illustrating a process of manufacturing an embedded printed circuit board according to the present invention. The present invention is characterized by using a coreless carrier (coreless carrier) instead of using a core unlike the prior art.

2A illustrates a method of fabricating a coreless carrier in accordance with a preferred embodiment of the present invention. The coreless carrier according to the present invention is formed by laminating and compressing the first material layers 110a and 110b and the second material layers 120a and 120b on both surfaces of the bonding sheet 100. Copper foil may be generally used for the second material layers 120a and 120b, and the first material layers 110a and 110b are materials that do not adhere to the upper second material layers 120a and 120b when stacked. As the metal or the film can be used. In addition, the bonding sheet 100 is selected according to the thickness of the parts to be embedded. As a preferred embodiment of the present invention, a prepreg may be used as the bonding sheet 100.

2B illustrates a coreless carrier formed by stacking first material layers 110a and 110b and second material layers 120a and 120b on both surfaces of a bonding sheet 100 according to a preferred embodiment of the present invention. The figure which shows. Here, since the first material layers 110a and 110b do not adhere to the second material layers 120a and 120b, the first material layers 110a and 110b and the second material layers 120a and 120a (when pressed) Note that a vacuum is formed between 120b).

Subsequently, referring to FIG. 2C, pads 130a and 130b are formed by finishing a portion for surface mounting the chip. In general, the solder is mounted on a copper pad using solder on a chip terminal. Since copper foil is oxidized in air, a protective film is formed through gold plating, silver plating, tin plating, or OSP treatment. In Fig. 2C, these are collectively shown as pads 130a and 130b which have been finished. Figure 2d is a view showing the mounting of parts 140a and 140b on the coreless carrier surface according to the present invention. Here, the components 140a and 140b refer to semiconductor chips or other electronic components to be embedded.

Referring to FIG. 2E, the first insulating layers 150a, 150b, 150c, 150d, and the second insulating layers 160a, 160b are copper foils on the parts 140a, 140b surface-mounted on the coreless carrier. The laminate process is carried out by laminating and pressing (170a) and 170b. Here, by manufacturing a cavity having a size of the components 140a and 140b mounted on the first insulating layer and the second insulating layer, the components 140a and 140b are aligned into the cavity during the lamination process. By laminating.

As a preferred embodiment of the present invention, a resin such as resin may be used as the first insulating layers 150a, 150b, 150c, and 150d, and the UNCLAD as the second insulating layers 160a and 160b. Cured resins such as) may be used. The second insulating layers 160a and 160b of the present invention may be obtained by curing the bonding sheet, or may be used by peeling off double-sided copper foil of a copper cladded layer (CCL). The second insulating layers 160a and 160b may be omitted according to the thickness of the chip mounted thereon, and the thickness thereof may also be adjusted. Alternatively, when the chip is thick, several second insulating layers sandwiched by the first insulating layer may be repeatedly used. The second insulating layers 160a and 160b according to the present invention serve as a kind of support. In addition, the insulating layer may be formed by repeatedly sandwiching the first insulating layers 150a, 150b, 150c and 150d and the second insulating layers 160a and 160b as necessary.

Finally, referring to FIG. 2F, when the first material layers 110a and 110b are cut by cutting the substrate having components embedded on both sides of the coreless carrier, the first material layers 110a and 110b and the first material layers 110a and 110b are cut. Since air is introduced into the vacuum layer between the two material layers 120a and 120b, they are separated from each other. As a result, the upper and lower structures manufactured with the bonding sheet 100 interposed therebetween are separated from each other. Figure 2g is a view showing a structure formed by separating the coreless carrier up and down.

Referring to FIG. 2G, the copper foil 170a corresponding to the first layer copper foil circuit and the copper foil 120a corresponding to the second layer copper foil circuit are shown below, and the component 140a is placed on the pad of the second layer copper foil circuit. It is built-in.

3A to 3E illustrate a preferred embodiment of the present invention, in which a process of manufacturing an embedded printed circuit board is performed by performing an additional process on a structure in which a chip manufactured according to the present invention is embedded. FIG. 3A is the same view as FIG. 2G, showing one substrate formed by embedding a chip in a coreless carrier and separating the carrier up and down according to the present invention. Referring to FIG. 3B, the copper foil circuits are formed by selectively etching the first and second layers of copper foil.

Referring to FIG. 3C, a laminated substrate is formed by stacking an insulating layer and copper foils 180a and 180b on a substrate on which surface copper foils 170a and 170b are selectively etched to form a circuit. Subsequently, the copper foils 180a and 180b on the surface are selectively etched to form a circuit (FIG. 3D), and a pad for chip mounting is prepared by applying solder resists 190a and 190b. Then, the finish is processed according to the conventional method to form a gold plated, silver plated, tin plated or OSP-treated pad 200a (200b) to further mount the chip on the substrate surface.

At this time, since the embedded component 140a is located at the center of the substrate as shown in FIG. 3E, even if heated to surface mount an additional chip on the substrate surface, heat transfer to the embedded chip 140a can be prevented. This will prevent the substrate from bending.

The foregoing has outlined rather broadly the features and technical advantages of the present invention to better understand the claims of the invention which will be described later. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention. In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously changed, substituted, and changed without departing from the spirit or scope of the invention described in the claims.

The present invention can be applied to a semiconductor chip package substrate, and by using a coreless carrier to produce two substrates in one process to reduce the production cost of the package substrate. In addition, even after the chip is embedded, the substrate is not bent, thereby reducing defects and increasing yield.

100: bonding sheet
110a, 110b: first material layer
120a, 120b: second material layer
130a, 130b, 200a, 200b: pad
140a, 140b: parts
150a, 150b, 150c, 150d: first insulating layer
160a, 160b: second insulating layer
170a, 170b, 180a, 180b: copper foil
190a, 190b: solder resist

Claims (4)

In the method of manufacturing a chip embedded printed circuit board,
(a) stacking and laminating film and copper foil on both sides of the bonding sheet to form a coreless carrier;
(b) processing the copper foil on both sides of the coreless carrier to form pads for chip mounting, and mounting the chips so as to be symmetrical to each other on both padless carrier surface;
(c) A multilayer insulating layer is formed of any one or a combination of a resin layer and a cured resin layer so that the total thickness thereof corresponds to the height of the chip, and the multilayer insulating layer is selectively cut to mount the chip. Forming a cavity having a space sized for seating;
(d) Aligning and stacking a multilayer insulating layer on the coreless carrier surface so that the mounting chip is inserted into the cut cavity and seated thereon, and then copper foils are sequentially laminated on the coreless carrier, followed by hot pressing lamination, thereby symmetrical with respect to both surfaces of the coreless carrier. Stacking phosphorus structures; And
(e) As a result of step (d), the structure is cut perpendicularly to both surfaces, and the cut surface is cut by setting the position to cut the film and the copper foil of the coreless carrier, whereby air between the compressed film and the copper foil is cut. Releasing the vacuum state by inflow, peeling off the film to separate the structure on the copper foil from the bonding sheet, thereby acquiring a structure in which chips are built up and down one by one.
Chip embedded printed circuit board manufacturing method comprising a. delete delete delete

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