KR101142150B1 - Surface mounting type semiconductor package, fabrication system and method thereof - Google Patents

Abstract

The surface mount semiconductor package according to the present invention includes a substrate in the form of a flat plate on which a semiconductor device is mounted and a cap in the form of a cap bonded to the substrate so as to cover the semiconductor device, thereby providing excellent productivity.

Description

Surface Mount Semiconductor Package, Surface Mount Semiconductor Package Production System and Method {SURFACE MOUNTING TYPE SEMICONDUCTOR PACKAGE, FABRICATION SYSTEM AND METHOD THEREOF}

The present invention relates to a surface mount semiconductor package, a surface mount semiconductor package production system and method, and more particularly, to a surface mount semiconductor package in which cap-shaped lids are bonded to a flat substrate, and to produce the same. The present invention relates to a surface mount semiconductor package production system and method.

In light of recent advances in electronic equipment, such as mobile phones, notebook-sized personal computers, electronic personal data books, and the like, there is a need for production of high density, small, thin semiconductor packages useful for such electronic equipment.

In such a semiconductor package, a package in which a semiconductor chip such as a surface acoustic wave (SAW) filter chip is mounted is manufactured without molding the inside of the packaging.

The surface acoustic wave device converts electrical signals and surface acoustic wave (SAW) by a comb-shaped electrode (IDT: Inter Digital Transducer) made of a thin film metal provided on a substrate (piezoelectric substrate) made of piezoelectric materials such as LiTaO3, LiNbO3, and quartz. A device for transmitting and receiving a signal. Since surface acoustic wave elements have characteristics such as small size, light weight, high reliability, and excellent out-of-band attenuation characteristics, they are widely used as frequency filters and resonators in the field of video equipment and mobile communication equipment.

In recent years, in the surface acoustic wave device using such a surface acoustic wave element, in order to further reduce the size, mounting and mounting of the surface acoustic wave element on a supporting substrate by a connection method called a face down bonding method has been carried out.

9 shows a surface acoustic wave device connected in the conventional FDB method. In this figure, the surface acoustic wave element 54 in which the comb-tooth type electrode 52 and the bonding pad 53 are formed on the piezoelectric substrate 51 is formed, for example, in the box-shaped support base 55 made of ceramic. It is mounted face down (face down). A conductive pattern 56 is formed on the connection surface (die attach surface) facing the surface acoustic wave element 54 of the support base 55. The signal terminal 56a of the conductor pattern 56 and the bonding pad 53 of the surface acoustic wave element 54 are bonded (flip chip mounted) through conductive bumps 57 such as Au and solder. . In addition, a cover 58 made of metal, ceramic, or the like is disposed on the upper end of the support base 55, and the cover 58 and the support base 55 are welded or bonded by an adhesive and sealed. Further, on the conductor pattern 56 of the die attach surface of the support base 55, a plating layer (not shown) such as Au having a thickness of 1 to 10 mu m is formed to secure the conductivity of the signal terminal 56a. In addition, an external connection terminal (not shown) is provided on the outer circumferential surface of the support base 55, and the external connection terminal and the signal terminal 56a described above provide a conductive path (not shown) such as a via hole. It is conducting through.

In addition to the surface acoustic wave device described above, a substrate having an opening and a lead in the form of a plate are used in a package in which various other surface mount semiconductor devices are mounted.

The present invention provides a surface mount semiconductor package in which cap-shaped lids are bonded to a substrate in a flat plate form, and a surface mount semiconductor package production system and method for producing the same.

In order to achieve the above object, the surface-mount semiconductor package according to the present invention includes a substrate in the form of a flat plate on which the semiconductor device is mounted and a lid in the form of a cap bonded to the substrate to cover the semiconductor device. can do.

In this case, the recess of the lead may be in close contact with the semiconductor device. Here, the lead may be a flexible material, and the recess of the lead may press the semiconductor device.

The semiconductor device may be an electric double layer capacitor (EDLC), and a first electrode, an electrolyte layer, and a second electrode of the EDLC may be sequentially stacked on the substrate, and the lead may be in close contact with the second electrode. Can be. In this case, a circuit pattern electrically connected to the second electrode may be formed on the lead, and the circuit pattern may be connected to the second electrode by the adhesion.

In addition, the semiconductor device may be one of a Temperature-Compensated Crystal Oscillator (TCXO), a Crystal, and a Surface Acoustic Wave (SAW) filter.

On the other hand, the surface mount semiconductor package production system according to the present invention is a semiconductor device mounting portion for mounting a semiconductor device on a flat plate-shaped substrate and a cap (lid) in the cap (lid) to cover the semiconductor device to the substrate It may include a junction to join.

In this case, the method may further include a substrate forming part forming the flat substrate and a lead forming part forming a cap in a cap shape covering the semiconductor device. Here, the lead forming unit may form the lead so that the recess of the lead is in close contact with the semiconductor element.

The semiconductor device may be an electric double layer capacitor (EDLC) in which a first electrode, an electrolyte layer, and a second electrode are sequentially stacked on the substrate, and the recess of the lead may be in close contact with the second electrode. Can be.

In addition, the lead may be a flexible material, and the recess of the lead may be pressed against the semiconductor element.

The substrate forming unit may form the substrate such that the semiconductor elements are mounted in a plurality of positions separated from each other, and the lead forming unit forms the leads such that a plurality of cap-shaped cap portions covering each of the semiconductor elements are formed. The cutting unit may further include a cutting unit which separates and cuts the semiconductor device after bonding the substrate and the lead at the bonding unit.

On the other hand, the method for producing a surface-mount semiconductor package according to the present invention includes the steps of mounting a semiconductor device on a substrate in the form of a flat plate and bonding a lid (lid) of the cap shape to the substrate to cover the semiconductor device; Can be.

The method may further include forming the substrate in the form of a flat plate before mounting the semiconductor device, and forming a cap in a cap shape covering the semiconductor device before the bonding step. The forming may include forming a plurality of substrates at positions where the semiconductor elements are separated, and the forming of the leads may include a plurality of caps having a cap shape covering the plurality of semiconductor elements mounted on the substrate. And forming a bonded body of the substrate and the lead after each semiconductor device unit after the bonding step.

As described above, the surface mount type semiconductor package and the surface mount type semiconductor package production system and method according to the present invention improve production efficiency by bonding a cap type lead to a flat plate type substrate.

Specifically, since the wall existing on the substrate having the concave opening disappears and the shape of the substrate is in equilibrium, it can be expected that the manufacturing cost of the jig required for loading or moving can be reduced when processing individually.

In addition, since the shape of the lead is much easier to change than the shape of the package at the time of miniaturization or thinning according to the needs of the customer, there is an advantage that the development period can be shortened.

In addition, complex process steps can be simplified, and lead times are shortened, so mass production is advantageous.

In particular, in the case of an EDLC (Electric Double Layer Capacitor), the second electrode does not need to be separately attached to the lead, and when the lead is formed of a flexible lead, Since the second electrode is naturally compressed and easily energized, there is an advantage that the process can be shortened.

1 is a schematic view showing a surface mount semiconductor package according to the present invention.
Figure 2 is a schematic diagram showing a process of producing a surface-mount semiconductor package related to the present invention.
3 is a schematic view showing a surface mount semiconductor package according to another embodiment related to the present invention.
Figure 4 is a schematic diagram showing a process of producing a surface-mount semiconductor package according to another embodiment related to the present invention.
5 is a schematic view showing a surface mount semiconductor package according to another embodiment related to the present invention.
Figure 6 is a schematic diagram showing a process of producing a surface-mount semiconductor package according to another embodiment related to the present invention.
Figure 7 is a block diagram showing a surface mount semiconductor package production system related to the present invention.
8 is a flow chart illustrating a method of producing a surface mount semiconductor package in accordance with the present invention.
9 is a schematic diagram showing a surface acoustic wave device connected in the conventional FDB method.
10 is a schematic diagram showing a process of producing a flip bonding method of a conventional surface mount semiconductor device.
11 is a schematic view showing a wire bonding method of a conventional surface mount semiconductor device.
12 is a schematic diagram showing a conventional EDLC production process.

Hereinafter, a surface mount semiconductor package, a surface mount semiconductor package production system and a method and method related to the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic view showing a surface mount semiconductor package according to the present invention.

The surface mount semiconductor package illustrated in FIG. 1 includes a substrate 110 having a flat plate form in which the semiconductor device 150 is mounted, and a lid 130 having a cap shape bonded to the substrate to cover the semiconductor device. ) Is included.

The substrate 110 may be stacked in a plurality of laminates because the substrate should also be formed with a circuit pattern to be connected to the semiconductor element in order to mount the semiconductor element. In this embodiment, the substrate is in the form of a flat plate. Various semiconductor elements 150 are mounted on such a flat board. In this case, the semiconductor device to be mounted is a TCXO (Temperature-Compensated Crystal Oscillator), a crystal (crystal), SAW (Surface Acoustic Wave) filter, EDLC (Electric Double Layer Capacitor) It may be a surface mount semiconductor device. In addition, the mounting of the semiconductor device is a concept including not only the mounting of the semiconductor device itself but also flip bonding, wire bonding, etc. for connecting to a circuit pattern formed on a substrate or a lead.

The lid 130 is an element bonded to the substrate and has a cap shape to cover the semiconductor device mounted on the substrate. As a result, the lead includes a junction 133 which is bonded to the junction surface 111 of the substrate and a recess 131 covering the semiconductor element. A process of producing a surface mount semiconductor package of this type is shown in FIG. 2.

According to FIG. 2, a substrate 110 having a flat plate shape is provided, and the semiconductor device 150 is mounted on the substrate. Thereafter, a cap-shaped lead is prepared and bonded to the substrate to cover the semiconductor device.

On the other hand, in the conventional system, as shown in Figs. 10 to 12, a planar lead is bonded to the substrate on which the concave opening is formed.

FIG. 10 illustrates a flip bonding method of a surface mounted semiconductor device such as a TCXO (temperature-compensated crystal oscillator), a crystal, a surface acoustic wave (SAW) filter, and the like. 11 shows a wire bonding method. That is, the semiconductor device mounted on the substrate may be one of a Temperature-Compensated Crystal Oscillator (TCXO), a Crystal, and a Surface Acoustic Wave (SAW) filter.

Referring to FIG. 10, a bonding material is coated on a bottom surface of the semiconductor device so that the bonding material is connected to a circuit pattern formed on a substrate when the semiconductor device is mounted. In FIG. 11, a wire is bonded to the upper portion of the semiconductor device. The wire is connected to the circuit pattern formed on the substrate. In this case, the lead may be used only for sealing in the case of EDLC (Electric Double Layer Capacitor), which will be described later.

Referring to FIGS. 10 and 11, the semiconductor devices 15 and 25 are mounted (including wire / flip bonding) on the substrates 11 and 21 and the leads 13 and 23 are covered therein. The opening to be mounted is formed. As a result, the sidewall of the substrate constituting the semiconductor package for surface mounting is thicker than the mounting surface.

Therefore, when trying to produce hundreds to thousands of sheets in one sheet, there are many difficulties in package design or manufacturing method. The reason is that the operation of dividing the substrate on which the opening is formed (Dicing, Laser Cutting, or Breaking) is not easy due to the thickness, and crack or burr phenomenon occurs. This happens because. In particular, in the case of dicing, it is difficult to process several at the same time because the overall cost increases, including the required cost of the blade.

In contrast, the surface-mount semiconductor package shown in FIG. 1 uses a planar flat substrate and instead has a structure in which cap-shaped leads are bonded, thereby reducing difficulty of forming a substrate. Of course, the cap-shaped lead is required to be formed as compared to the conventional flat lead, but an additional process is required when forming the lead, but the load on the production system is less than that of forming the substrate having the opening. 1 illustrates a state in which a semiconductor device is mounted by a flip bonding method, and a state in which the semiconductor device is mounted by a wire bonding method is illustrated in FIG. 3.

Referring to FIG. 3, similarly to FIG. 1, a substrate 210 having a flat shape in which the semiconductor device 250 is mounted and a cap 230 having a cap shape bonded to the substrate to cover the semiconductor device are provided. It is included. The lead includes a junction portion 233 where the junction surface 211 is bonded to the substrate, and a recess portion 231 covering the semiconductor element. As shown in FIG. 4, the semiconductor device 250 is mounted on the planar substrate 210, the wire 251 is bonded, and the cap 230 is bonded to each other.

As mentioned above, the lead may merely perform a sealing function of covering and protecting the semiconductor device, but may further perform functions such as heat dissipation. To this end, the lead may be made of a material capable of heat dissipation. In addition, the recesses 131 and 231 of the lead may be in close contact with the semiconductor device for effective heat dissipation. However, when the depth of the recess is formed differently from the thickness of the semiconductor device in this process, the semiconductor device may be damaged due to inadequate contact with the semiconductor device or excessive pressure on the semiconductor device. In order to solve such a problem, the lead may be made of a flexible material. The lead is made of a flexible material in order to have elasticity of a certain strength. Accordingly, the term flexible described herein is intended to mean a degree of flexibility having elasticity. As described above, when the lead is made of a flexible material, the recesses 131 and 231 of the lead can be reliably adhered by appropriately pressing the semiconductor element. Of course, the depth of the recess should be smaller than the thickness of the semiconductor device, and the extent of the recess should be determined in consideration of the position of the junction, the shape, the area of the recess, and the characteristics of the flexible material.

In this way, when the lead is made of a flexible material having elasticity, it is particularly useful in manufacturing an electric double layer capacitor (EDLC). EDLC has a form in which the first electrode, the electrolytic layer, and the second electrode are sequentially stacked. Even though the first electrode is electrically connected to the circuit pattern of the substrate, the second electrode must also be connected to a certain circuit pattern. . In general, the second electrode is mounted on the lead on which the circuit pattern is formed, and then the lead is covered on the opening of the substrate on which the first electrode and the electrolytic layer are formed so that the second electrode is stacked on the electrolytic layer.

That is, as shown in FIG. 12, the first electrode 36 is attached or bonded to the opening in the substrate 31 having the opening, thereby electrically conducting the first electrode, that is, the + terminal, and having a flat lead 33. ) By the circuit pattern formed on the lead by attaching the second electrode 38. After electrically energizing the terminal, an electrolytic layer 37 in a separating role is placed on the first electrode.

In addition, the second electrode attached to the lead is positioned above the electrolytic layer so that the bonding material applied to the lead is heated or pressurized to a high temperature above the melting point while being positioned in the order of the substrate, the first electrode, the electrolytic layer and the second electrode. To be bonded to the substrate. At this time, the side wall of the substrate constituting the surface-mount semiconductor package is also thicker than the mounting surface of the substrate, and thus has the above problem.

According to the surface-mount semiconductor package according to the present invention, as shown in FIG. 5, the first electrode 353, the electrolytic layer 355, and the second electrode 357 are mounted on the substrate 310 having a planar shape. By taking a structure in which the lid 330 in the cap form covers all of the first electrode, the electrolytic layer, and the second electrode, problems such as dicing can be solved. However, in the case of the EDLC having the second electrode, the electrolytic layer, and the second electrode, the second electrode must also be connected to the predetermined circuit pattern like the first electrode mounted on the substrate on which the circuit pattern is formed. Conventionally, a second electrode is mounted on a lead on which a circuit pattern is formed. In this embodiment, a circuit pattern to be connected to the second electrode is formed on the lead. However, the second electrode is connected to the circuit pattern by pressing the lead in close contact with the second electrode in a state in which the second electrode is laminated on the electrolytic layer, instead of laminating it on the electrolytic layer after mounting the second electrode on the lead. .

That is, as shown in FIG. 6, the first electrode 353, the electrolyte layer 355, and the second electrode 357 are sequentially stacked on the planar substrate 310, and then the cap 330 is formed. The concave portion 357 is bonded to the second electrode. In this case as well, the bonding between the substrate and the lead is performed at the bonding surface 311 of the substrate and the bonding portion 333 of the lead, and the depth of the recess so that the recess 357 of the lead closely adheres to the second electrode by the pressure applied in the bonding process. Must be determined. In this case, when the lead is a flexible material having elasticity, more reliable close contact is made.

The electrolytic layer 355 is in a liquid state, a gel state, or a solid state positioned between the first electrode and the second electrode.

A joining material for joining the joining surface of the substrate is applied to the joining portion of the lead, and the joining material is heated and pressurized to a high temperature above the melting point to join the joining surface of the substrate. Here, the bonding material is AgCu, AuSn, Ni, or the like, and the bonding surface of the substrate or the bonding portion of the lead is made of Ni / Au or the like. It is preferable to select a bonding material so that characteristics such as an internal semiconductor element and an electrolytic layer do not change.

On the other hand, by applying a predetermined conductive material to the contact with the second electrode in the circuit pattern formed in the recessed portion of the lead, it is possible to more reliably perform electrical connection with the second electrode.

According to the above description, it is possible to solve a problem such as dicing due to the thickness of the substrate, and to take the structure of covering the lead after laminating the second electrode to the electrolytic layer instead of mounting it on the lead. It is possible. This translates into improved performance of EDLC. In summary, when the semiconductor device is an EDLC (Electric Double Layer Capacitor), the first electrode, the electrolytic layer, and the second electrode of the EDLC are sequentially stacked on the planar substrate, and the cap covering the EDLC. The lead of the form may be in close contact with the second electrode. In this case, a circuit pattern electrically connected to the second electrode may be formed in the lead, and the circuit pattern may be connected to the second electrode by closely contacting the lead.

7 is a block diagram showing a surface mount semiconductor package production system according to the present invention.

The surface mount semiconductor package production system illustrated in FIG. 7 includes a semiconductor device mounting unit 450 for mounting a semiconductor device on a flat substrate and a lid in a cap shape to cover the semiconductor device. The junction part 470 joined to a board | substrate is included.

The semiconductor device mounting unit 450 mounts the semiconductor device on a planar substrate instead of an opening formed in an existing substrate. To this end, a planar substrate should be provided. The substrate forming unit 410 may further include a substrate having a planar form. In this case, the substrate formed in the substrate forming unit may be cut to a size suitable for the surface mount semiconductor package. Of course, it may be suitably formed in the surface mount semiconductor package from the beginning without performing cutting.

The junction part 470 bonds a lead to the board | substrate in which the semiconductor element was mounted by the semiconductor element mounting part. At this time, the lead should have a cap shape so as to cover the semiconductor element mounted on the planar substrate. Since the lead of this type is formed in the lead forming unit 430, the surface mount semiconductor package production system may further include a lead forming unit. In this case, the lead formed in the lead forming unit may also be cut to a size suitable for the surface mount semiconductor package. Of course, it may be suitably formed in the surface mount semiconductor package from the beginning without performing cutting.

On the other hand, the lead forming portion 4309 can form a lead so that the recessed portion of the lead is in close contact with the semiconductor element. The recess of the lead is brought into close contact with the semiconductor element for a predetermined purpose such as heat dissipation. For this purpose, the depth of the recess of the lead may be appropriately adjusted. In this case, when the lead is a flexible material, the recess of the lead may be in close contact by reliably pressing the semiconductor device. In particular, when the second electrode is an EDLC (Electric Double Layer Capacitor) that needs to be in close contact with the lead, it is preferable when the recess of the lead is in close contact with the second electrode. As mentioned above, in the EDLC, when the first electrode, the electrolytic layer, and the second electrode are sequentially stacked, the first electrode and the second electrode need to be electrically connected to a predetermined circuit pattern. In this case, when the recessed portion of the cap-shaped lead is brought into close contact with the second electrode, the second electrode may also be stacked together when the first electrode and the electrolytic layer are stacked on the substrate. Therefore, since the lamination of the first electrode, the electrolytic layer, and the second electrode can be performed reliably, the performance improvement of the EDLC is expected. However, in order to reliably connect the second electrode to the circuit pattern formed in the concave portion of the lead, the material of the lead is made flexible and pressurized using elasticity, and a conductive material is applied to the contact with the second electrode in the concave portion. It is preferable to apply.

In the above, the production system in a state where both the substrate and the lead are cut or formed to fit each surface mount semiconductor package is shown. Alternatively, a plurality of semiconductor packages separated from each other on a substrate may be mounted, and then the entire surface of the semiconductor package may be manufactured by covering and bonding the entire semiconductor package with leads and then cutting them.

That is, the substrate forming unit 410 forms a substrate such that a plurality of semiconductor elements are mounted at a position separated from each other, and the lead forming unit 430 forms a lid such that a plurality of cap-shaped cap portions covering each of the semiconductor elements are formed. Can be formed. The device mounting unit 450 mounts the semiconductor device on the entire substrate formed in the substrate forming unit, not the individual substrates forming the surface mount semiconductor package. The junction 470 bonds the substrate and the entire lead. It is necessary to cut the bonded body of the substrate and the lead by semiconductor elements, and may further include a cutout 490. That is, in this case, the substrate is not a substrate of a single size constituting the surface mount semiconductor package, but a substrate in which a plurality of substrates of a plurality of sizes are arranged. Similarly, the lid also has a form in which a plurality of cap portions covering each semiconductor element are formed. These substrates and leads are cut into individual surface mount semiconductor packages by the cutouts after bonding. This reduces the equipment required to form and align individual substrates and leads.

8 is a flowchart illustrating a method of manufacturing a surface mount semiconductor package according to the present invention.

In general, the method includes mounting a semiconductor device on a substrate having a flat plate shape and bonding a cap-shaped lid to the substrate to cover the semiconductor device. same.

First, a substrate in the form of a flat plate is formed (S510). In the process performed in the substrate forming unit, the produced substrate may be a size suitable for each surface mount semiconductor package or a size including a plurality of surface mount semiconductor packages. In the latter case, a later cutting process (S550) is required. The formation of the substrate is sufficient before the semiconductor element is mounted.

A cap lid is formed to cover the semiconductor device mounted on the substrate (S520). The size of the lead produced at this time corresponds to the size of the substrate formed at the substrate forming portion. The lead forming process does not need to consider the prosecution with the substrate forming process. It is only sufficient before the joining process.

The semiconductor device is mounted on the substrate formed in the substrate forming unit (S530). In the device mounting part, the semiconductor device mounting includes flip bonding and wire bonding processes for connecting the semiconductor device to the circuit pattern.

The lead is bonded to the substrate to cover the semiconductor device (S540). At this time, when the board | substrate and lead to which a junction is made contain a some surface mount type semiconductor element, it is necessary to cut into individual surface mount type semiconductor elements. That is, in the case where the forming of the substrate is performed so that a plurality of substrates are mounted at positions where the semiconductor elements are separated, a cap forming cap corresponding to the lead forming step also covers a plurality of semiconductor elements mounted on the substrate. A plurality of parts should be formed. When bonding the substrate and the lead of this type, instead of being cut and bonded individually, the entire substrate and the lead may be bonded, and then the bonded body of the substrate and the lead may be cut for each semiconductor element unit. In other words, when the bonded body of the substrate and the lead includes a plurality of semiconductor devices that are separated from each other, the method may further include dividing and cutting the semiconductor devices into individual semiconductor devices.

If the semiconductor element mounted on the substrate is an EDLC or if heat dissipation or the like is required, the lead may be formed to be in close contact with the semiconductor element to be bonded. At this time, if necessary, the material of the lead can be made flexible.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

It is applicable to the production of surface mount semiconductor packages.

Specifically, it is useful for producing a TCXO (Temperature-Compensated Crystal Oscillator), a crystal, a Surface Acoustic Wave (SAW) filter, and an EDLC package. In particular, application is advantageous in the case of an EDLC package which needs to reliably stack the first electrode, the electrolytic layer, and the second electrode.

110, 210, 310 ... substrate 111, 211, 311 ...
130, 230, 330 ... lead 131, 231, 331 ...
133, 233, 333 ... junctions 150, 250, 350 ... circuit elements

Claims (14)

A substrate in the form of a flat plate on which the semiconductor device is mounted; And
A lid in a cap shape bonded to the substrate to cover the semiconductor device;
And it includes a
The lead is a flexible material having heat dissipation characteristics,
The recess of the lead is in close contact with the semiconductor element is a surface-mount semiconductor package for pressing the semiconductor element.
delete delete The method of claim 1,
The semiconductor device is an electric double layer capacitor (EDLC),
After the first electrode is laminated on the substrate, an electrolytic layer is stacked on the first electrode, and a second electrode is sequentially stacked on the electrolytic layer.
The lead is a surface-mount semiconductor package in close contact with the second electrode.
The method of claim 4, wherein
And a circuit pattern electrically connected to the second electrode, the circuit pattern being connected to the second electrode by the adhesion.
The method of claim 1,
The semiconductor device is a surface-mount semiconductor package which is one of a TCXO (Temperature-Compensated Crystal Oscillator), a crystal (Surface Acoustic Wave, SAW) filter.
A semiconductor device mounting unit for mounting a semiconductor device on a flat substrate;
A junction part for bonding a lid in a cap shape to the substrate to cover the semiconductor device;
A substrate forming unit forming the flat substrate; And
A lead forming unit forming a cap in a cap shape covering the semiconductor device;
Including
The lead forming portion forms the lead so that the recessed portion of the lead closely adheres to the semiconductor element, the lead is a flexible and heat dissipating material, and the recessed portion of the lead is pressed against the semiconductor element. Surface mount semiconductor package production system.
delete delete The method of claim 7, wherein
The semiconductor device is an EDLC (Electric Double Layer Capacitor) in which an electrolytic layer is stacked on a first electrode after a first electrode on the substrate, and a second electrode is sequentially stacked on the electrolytic layer.
And a recess of the lead is in close contact with the second electrode.
delete The method of claim 7, wherein
The substrate forming unit forms the substrate so that a plurality of the semiconductor element is mounted in a position separated from each other,
The lead forming part forms the lead so that a plurality of cap-shaped cap parts covering each of the semiconductor elements are formed.
And a cutting part which separates and cuts the semiconductor elements after bonding the substrate and the lead at the junction part.
Forming a substrate in the form of a plate;
Mounting a semiconductor device on the flat substrate;
Forming a lid in a cap shape covering the semiconductor device;
Bonding a cap-shaped lid to the substrate to cover the semiconductor device; And
Cutting the bonded body of the substrate and the lead for each semiconductor element unit;
Including
The forming of the substrate may include forming a plurality of the substrates at positions where the semiconductor elements are separated, and the forming of the leads may include a cap shape covering a plurality of the semiconductor elements mounted on the substrate. Forming a plurality of cap portion, the lead is a flexible (flexible), a material having a heat dissipation characteristics, the recessed portion of the lead is in close contact on the semiconductor element is a surface mount type semiconductor package production method for pressing the semiconductor element.
delete

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