KR101127827B1 - Apparatus and method for driving display device - Google Patents

Abstract

The present invention relates to a driving device and a method of a display device for protecting a display device from an unstable power supply.

A driving apparatus of a display device according to the present invention includes a display panel for displaying an image, a power generator for generating various power sources for driving the display panel, a main switch for switching external input power to the power generator, And a power protection circuit for controlling the main switch to block the input power outside the set voltage range from being supplied to the power generation unit.

According to this configuration, the present invention can protect the display device from unstable power by providing a power protection circuit for controlling the main switch so that input power in a specific voltage range is supplied to the display device. Accordingly, according to the present invention, hysteresis can be applied to stably turn on / off the main switch even in a low voltage region, and an abnormal image display can be displayed as a black / white image. As a result, the present invention can prevent abnormal display of an image displayed on the display panel.

Display, power protection circuit, comparator, main switch

Description

Display device driving method and method {APPARATUS AND METHOD FOR DRIVING DISPLAY DEVICE}

1 is a view showing a driving device of a display device according to the related art.

2 is a diagram illustrating a driving device of a display device according to an exemplary embodiment of the present invention.

3 is a diagram showing a voltage range set by a power supply protection circuit shown in FIG.

FIG. 4 is a circuit diagram showing the power protection circuit shown in FIG.

FIG. 5 is a circuit diagram showing another configuration of the third resistor shown in FIG. 4. FIG.

6 is a simulation model showing the power protection circuit shown in FIG.

FIG. 7 is a diagram illustrating waveforms according to simulation results of the power protection circuit of FIG. 6.

<Explanation of Signs of Major Parts of Drawings>

2, 102 display panel 4, 104 data driver

6, 106: gate driver 8, 108: timing controller

10, 110: power generation unit 120: power protection circuit

122, 124: comparators 126, 128: detection circuit

130: reference voltage circuit 132: stabilization circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a driving device and a method of a flat panel display device capable of protecting a display device from an unstable power supply.

Recently, various flat panel display devices that can reduce weight and volume, which are disadvantages of cathode ray tubes, have emerged. Examples of such flat panel display devices include a liquid crystal display, a field emission display, a plasma display panel, and a light emitting display.

Among the flat panel display devices, the liquid crystal display device displays an image by adjusting light transmittance of liquid crystal cells according to video data. Among the liquid crystal display devices, an active matrix type in which switching elements are provided for each liquid crystal cell is suitable for displaying a moving image. In an active matrix liquid crystal display device, a thin film transistor (hereinafter referred to as TFT) is mainly used as a switching element. Such liquid crystal display devices can be miniaturized compared to CRTs, and are widely used in personal computers and notebook computers, as well as office automation devices such as photocopiers, mobile devices such as cell phones and pagers. .

Referring to FIG. 1, a driving apparatus of a display device according to a related art includes a display panel 2 for displaying an image and a data driver 4 for driving data lines DL1 to DLm of the display panel 2. ), A gate driver 6 for driving the gate lines GL0 to GLn of the display panel 2, a timing controller 8 for controlling the data driver 4 and the gate driver 6, The main switch MSW for switching the input power Vin from the outside into the power generator 10 according to the main power on / off signal MS, and the input power input from the outside through the main switch MSW ( And a power generator 10 for generating various powers required for driving the display device using Vin).

In the display panel 2, liquid crystal is injected between two substrates, and the data lines DL1 to DLm and the gate lines GL0 to GLn are formed to be orthogonal to each other on the lower substrate, and the TFTs are disposed in the crossing area. Is formed. The TFT supplies video data on the data lines DL1 to DLm to the liquid crystal cell Clc in response to a gate pulse supplied to the gate lines GL0 to GLn. For this purpose, the gate electrode of the TFT is connected to the gate line GL, and the source electrode is connected to the data line DL. The drain electrode of the TFT is connected to the pixel electrode of the liquid crystal cell Clc. In addition, the storage capacitor Cst is formed in the liquid crystal cell Clc of the display panel 2. The storage capacitor Cst is formed between the pixel electrode of the liquid crystal cell Clc and the front gate line, or is formed between the pixel electrode of the liquid crystal cell Clc and the common electrode to maintain a constant voltage of the liquid crystal cell Clc. .

The timing controller 8 arranges the source data RGB input from the outside so as to be suitable for driving the display panel 2 and supplies the source data RGB to the data driver 4. The timing controller 8 generates the data control signal DCS and the gate control signal GCS using the horizontal / vertical synchronization signals Vsync and Hsync and the main clock MCLK input from the outside.                         

The data control signal DCS includes a dot clock (Dclk), a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), and a polarity control signal. (POL) and the like.

The gate control signal GCS includes a gate start pulse GSP, a gate shift clock GSC, a gate output enable GOE, and the like.

The data driver 4 samples the data Data from the timing controller 8 according to the data control signal DCS from the timing controller 8, and then latches the sampled data Data by one line. The converted data Data is converted into analog video data corresponding to the gamma voltage and supplied to the data lines DL.

The gate driver 6 generates a gate pulse including the gate high voltage VGH and the gate low voltage VGL in response to the gate start pulse GSP of the gate control signal GCS from the timing controller 8. The gate lines GL are sequentially supplied to the gate lines GL. In response to the gate high voltage VGH of this gate pulse, the TFT is turned on so that analog video data is supplied to the pixel electrode of the liquid crystal cell Clc via the data line DL.

The power generator 10 uses the input power Vin input from the outside through the main switch MSW according to the on / off of the main switch MSW by the main power on / off signal MS. Generates various power sources required for driving.

In detail, the power generator 10 generates a driving voltage Vcc for operating the timing controller 8, the data driver 4, and the gate driver 6. In addition, the power generator 10 generates a common voltage Vcom and supplies it to the common electrode of the display panel 2. The power generator 10 generates a gate high voltage VGH and a gate low voltage VGL to supply the gate driver 6 to the gate driver 6.

The driving device of the display device according to the related art drives the main switch MSW by the main power on / off signal MS to supply the input power Vin from the outside to the power generator 10. By driving the display device using various power sources (Vcc, VGH, VGL, Vcom, etc.) generated from the power generator 10, a desired image is displayed on the display panel 2.

However, the display device according to the related art performs an abnormal operation when the input power Vin input from the outside to the power generator 10 becomes unstable. In particular, when the display device is used as a vehicle display, the vehicle power becomes very unstable by other electrical devices connected to the vehicle.

Accordingly, the driving device of the display device according to the related art does not block the unstable power supplied to the display device when an unstable power is generated, thereby displaying an abnormal image on the display panel 2.

Accordingly, in order to solve the above problems, the present invention is to provide a driving device and method of a display device to protect the display device from an unstable power supply.

A driving apparatus of a display device according to an embodiment of the present invention for achieving the above object is a display panel for displaying an image, a power generation unit for generating a variety of power for driving the display panel, and an external input power source It characterized in that it comprises a main switch for switching to the power generating unit, and a power protection circuit for controlling the main switch to block the input power outside the set voltage range to be supplied to the power generating unit.

In the driving device of the display device, the power protection circuit includes a first detection circuit for detecting a first voltage from the input power supply, and a second detection circuit for detecting a second voltage higher than the first voltage from the input power supply. A reference voltage circuit for generating maximum and minimum reference voltages from the input power source, a first comparator for generating an on / off signal by comparing the minimum reference voltage with the first voltage and outputting the on / off signal to an output node; A second comparator configured to compare a reference voltage and the second voltage to generate the on / off signal, and output the on / off signal to the output node; and to stabilize the voltage of the on / off signal supplied from the output node to the main switch. It is characterized by including a stabilization circuit.

In the driving device of the display device, the first detection circuit includes: a first node electrically connected to a first input terminal of the second comparator; first and second resistors connected in series to the input power source and the first node; A first zener diode electrically connected between the first node and a base power source to stabilize the first node at a first voltage, and electrically connected to the first zener diode and the base power source to block a reverse current; It is characterized by including a diode.

In the driving device of the display device, the second detection circuit includes a second node electrically connected to the first input terminal of the first comparator, a third resistor electrically connected to the input power source and the second node; A second zener diode electrically connected between the third resistor and a base power source to stabilize the second node to a second voltage; and fourth and fifth resistors connected in series to the second zener diode and the base power source. It is characterized by including.

In the driving device of the display device, the reference voltage circuit includes a third node electrically connected to the second input terminal of the first comparator and the second input terminal of the second comparator, and the input power source and the third node. And a sixth resistor connected to each other, and a seventh resistor electrically connected to the third node and the base power source.

In the driving device of the display device, the stabilization circuit includes eighth and ninth resistors connected in series between the input power source and the output node, and a third zener diode electrically connected between the output node and the base power source. It features.

In the driving device of the display device, the main switch switches only the input power between the first voltage and the second voltage to the power generator in response to the on / off signal generated by each of the first and second comparators. It is characterized by.

In a method of driving a display device according to an embodiment of the present invention, a display device driving method including a display panel for displaying an image, the display device being driven using a power generation unit supplied with input power through a main switch from the outside. Generating various driving powers required for driving, and controlling the main switch to block the input power outside the set voltage range from being supplied to the power generation unit.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings and embodiments.

2 is a diagram illustrating a driving device of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 2, a driving apparatus of a display device according to an exemplary embodiment of the present invention may include a display panel 102 displaying an image and a data driver for driving data lines DL1 to DLm of the display panel 102. 104, a gate driver 106 for driving the gate lines GL0 to GLn of the display panel 102, and a timing controller 108 for controlling the data driver 104 and the gate driver 106. And a power switch 110 for generating various powers for driving the display device using the input power Vin from the outside, and a main switch for switching the input power Vin to the power generator 110 ( MSW) and a power protection circuit 120 for controlling the main switch MSW to block the input power Vin outside the set voltage range from being supplied to the power generator 110.

The display panel 102 may be a liquid crystal display panel including a liquid crystal cell (Clc), a light emitting display panel including a light emitting cell using a light emitting diode, and the like.                     

In the display panel 102, liquid crystal is injected between two substrates, and the data lines DL1 to DLm and the gate lines GL0 to GLn are formed to be orthogonal to each other on the lower substrate, and the TFTs are disposed in the crossing area. Is formed. The TFT supplies video data on the data lines DL1 to DLm to the liquid crystal cell Clc in response to a gate pulse supplied to the gate lines GL0 to GLn. For this purpose, the gate electrode of the TFT is connected to the gate line GL, and the source electrode is connected to the data line DL. The drain electrode of the TFT is connected to the pixel electrode of the liquid crystal cell Clc. In addition, the storage capacitor Cst is formed in the liquid crystal cell Clc of the display panel 102. The storage capacitor Cst is formed between the pixel electrode of the liquid crystal cell Clc and the front gate line, or is formed between the pixel electrode of the liquid crystal cell Clc and the common electrode to maintain a constant voltage of the liquid crystal cell Clc. .

The timing controller 108 arranges the source data RGB input from the outside to be suitable for driving the display panel 102 and supplies the source data RGB to the data driver 104. The timing controller 108 generates the data control signal DCS and the gate control signal GCS using the horizontal / vertical synchronization signals Vsync and Hsync and the main clock MCLK.

The data control signal DCS includes a dot clock (Dclk), a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), and a polarity control signal. (POL) and the like.

The gate control signal GCS includes a gate start pulse GSP, a gate shift clock GSC, a gate output enable GOE, and the like.

The data driver 104 samples the data from the timing controller 108 according to the data control signal DCS from the timing controller 108, and then latches the sampled data Data by one line. The converted data Data is converted into analog video data corresponding to the gamma voltage and supplied to the data lines DL.

The gate driver 106 generates a gate pulse including the gate high voltage VGH and the gate low voltage VGL in response to the gate start pulse GSP of the gate control signal GCS from the timing controller 108. The gate lines GL are sequentially supplied to the gate lines GL. In response to the gate high voltage VGH of this gate pulse, the TFT is turned on so that analog video data is supplied to the pixel electrode of the liquid crystal cell Clc via the data line DL.

The power generator 110 receives input power Vin input from the outside through the main switch MSW through the main switch MSW by the main power on / off signal MS and / or the main power control signal PCS. ) To generate various power sources for driving the display device.

In detail, the power generator 110 generates a driving voltage Vcc for operating the timing controller 108, the data driver 104, and the gate driver 106. In addition, the power generator 110 generates a common voltage Vcom and supplies it to the common electrode of the display panel 102. The power generator 110 generates a gate high voltage VGH and a gate low voltage VGL to supply the gate driver 106 to the gate driver 106.

The protection circuit 120 forcibly turns off the main switch MSW when the input power Vin from the outside is out of a specific voltage range, thereby preventing the unstable input power Vin from being supplied to the power generator 110. Done.

As shown in FIG. 3, the protection circuit 120 has a voltage corresponding to a display area that is longer than a voltage of the input power Vin outside a specific voltage range, that is, a normal display area (normal operation period). In case of a power source that can't operate the part, the main switch (MSW) is forcibly turned off.

Here, the specific voltage range is a voltage between the minimum on voltage VLon and the maximum off voltage VHoff. At this time, the minimum on-voltage (VLon) is a voltage for turning on the main switch (MSW) to the minimum voltage to be a normal display area in the abnormal display area, the maximum off-voltage (VHoff) is a maximum to the abnormal display area in the normal display area. This voltage is for turning off the main switch MSW.

On the other hand, the low voltage abnormal display area corresponding to the voltage below the minimum on voltage VLon has a hysteresis area HA that clearly distinguishes the on / off of the main switch MSW from the low voltage area by hysteresis. . The range of this hysteresis region HA is a voltage between the minimum off voltage VLoff and the minimum on voltage VLon.

To this end, as shown in FIG. 4, the protection circuit 120 includes a first detection circuit 126 for detecting a first voltage that is the minimum on voltage VLon from the input power source Vin, and an input power source Vin. A second detection circuit 128 for detecting a second voltage which is the maximum off voltage VHoff from the reference voltage circuit; a reference voltage circuit 130 for generating the maximum and minimum reference voltages from the input power source Vin; And a first comparator 122 for comparing the second voltage to the output node n0, a second comparator 124 for comparing the minimum reference voltage and the first voltage to the output node n0, and outputting the same. And a stabilization circuit 132 for stabilizing the voltage at the node n0.

The first detection circuit 126 is connected in series with a first node n1 electrically connected to the non-inverting input terminal (+) of the second comparator 124, an input power source Vin and a first node n1. The first and second resistors R1 and R2, the first zener diode ZD1 electrically connected between the first node n1 and the base power supply GND, and the first zener diode ZD1 and the base A diode D1 is electrically connected to the power supply GND to block reverse current.

The first and second resistors R1 and R2 limit the current supplied from the input power Vin to the first zener diode ZD1.

The first zener diode ZD1 is a voltage stabilization circuit and includes a cathode electrode electrically connected to the second resistor R2, that is, a first node n1, and an anode electrode electrically connected to the anode electrode of the diode D1. Equipped. The first zener diode ZD1 stabilizes the voltage of the first node n1 to the first voltage.

The diode D1 blocks the reverse current flowing from the base power supply GND to the first zener diode ZD1.

The first detection circuit 126 stabilizes the input power Vin supplied to the first node n1 to the first voltage using the first zener diode ZD1, thereby non-inverting the second comparator 124. Input to input terminal (+). At this time, the first detection circuit 126 constantly connects the first zener diode ZD1 and the diode D1 opposite to each other in a temperature-dependent manner to constantly change the voltage of the first node n1 according to the temperature. do.

On the other hand, the first detection circuit 126 is connected between the first node (n1) and the base power supply (GND) to further add a filter capacitor (not shown) for removing the noise of the first zener diode (ZD1). It can be provided.

The second detection circuit 128 is electrically connected to the second node n2 electrically connected to the inverting input terminal (-) of the first comparator 122, the input power source Vin and the second node n2. The third resistor R3, the second zener diode ZD2 and the second zener diode ZD2 and the ground power source GND, which are electrically connected between the third resistor R3 and the base power source GND. Fourth and fifth resistors R4 and R5 connected in series are provided.

The third resistor R3 serves to limit the current supplied from the input power Vin to the second zener diode ZD2. Meanwhile, the third resistor R3 includes four resistors R31, R32, and R33 connected in parallel between the input power source Vin and the second node n2, as shown in FIG. 5, in order to prevent an internal short. , R34).

The second zener diode ZD2 is a voltage stabilization circuit and includes a cathode electrode electrically connected to the third resistor R3, that is, the second node n2, and an anode electrode electrically connected to the fourth resistor R4. do. Here, the second zener diode ZD2 has a different zener voltage Vz from the first zener diode ZD1. The second zener diode ZD2 stabilizes the input power Vin supplied to the second node n2 to the second voltage.                     

The fourth and fifth resistors R4 and R5 serve to keep the voltage change of the second node n2 constant with temperature. In this case, the fourth and fifth resistors R4 and R5 may be replaced with one diode such as the diode D1 in the first detection circuit 126.

The second detection circuit 128 stabilizes the input power Vin supplied to the second node n2 to the second voltage by using the second zener diode ZD2, thereby inverting the input of the first comparator 122. Input to terminal (-). In this case, the second detection circuit 128 uses the fourth and fifth resistors R4 and R5 to uniformly change the voltage of the second node n2 according to the temperature.

Meanwhile, the second detection circuit 128 may further include a filter capacitor (not shown) connected between the second node n2 and the base power supply GND to remove noise of the second zener diode ZD2. have.

The reference voltage circuit 130 includes a third node n3 electrically connected to a non-inverting input terminal (+) of the first comparator 122 and an inverting input terminal (-) of the second comparator 124, and an input power source. And a sixth resistor R6 electrically connected to Vin and the third node n3, and a seventh resistor R7 electrically connected to the third node n3 and the ground power source GND.

The third node n3 between the sixth and seventh resistors R6 and R7 is electrically connected to the non-inverting input terminal (+) of the first comparator 122 and at the same time, the inverting input terminal of the second comparator 124. It is electrically connected to (-).

The reference voltage circuit 130 may further include a filter capacitor connected between the third node n3 and the base power source GND to be connected in parallel with the seventh resistor R7.

The first comparator 122 compares the maximum reference voltage from the third node n3 with the second voltage from the second node n2 and generates the main power control signal PCS according to the comparison result to output the output node ( nO) to the main switch (MSW). In other words, the first comparator 122 controls the main power supply in a high state when the second voltage applied to the inverting input terminal (-) is lower than the maximum reference voltage applied to the non-inverting input terminal (+). When the signal PCS is generated and, on the contrary, the second voltage applied to the inverting input terminal (-) is greater than the maximum reference voltage applied to the non-inverting input terminal (+), the main power control signal of the low state ( PCS) is generated and supplied to the output node nO.

The second comparator 124 compares the minimum reference voltage from the third node n3 with the first voltage from the first node n1 and generates a main power control signal PCS according to the comparison result to output the output node ( nO) to the main switch (MSW). In other words, the second comparator 124 controls the main power supply in a high state when the first voltage applied to the non-inverting input terminal (+) is higher than the minimum reference voltage applied to the inverting input terminal (−). The main power supply control signal in the low state when the signal PCS is generated and the first voltage applied to the non-inverting input terminal (+) is lower than the minimum reference voltage applied to the inverting input terminal (−). PCS) is generated and supplied to the output node nO.

The stabilization circuit 132 is electrically connected between the eighth and ninth resistors R8 and R9 connected in series between the input power source Vin and the output node nO, and the output node nO and the base power source GND. Connected third zener diode ZD3.

The eighth and ninth resistors R8 and R9 limit the current supplied from the input power Vin to the third zener diode ZD3. In addition, the eighth and ninth resistors R8 and R9 form a voltage divider resistor with the first and second resistors R1 and R2 and the sixth and seventh resistors R6 and R7 to have hysteresis characteristics at low voltage. It plays a role.

The third zener diode ZD3 is a voltage stabilization circuit and includes a cathode electrode electrically connected to the output node nO, and an anode electrode electrically connected to the base power source GND.

The stabilization circuit 132 stabilizes the voltages from the first and second comparators 122 and 124 with the main power control signal PCS using the third zener diode ZD3 and supplies them to the main switch MSW. Done.

On the other hand, the stabilization circuit 132 is connected between the output node (nO) and the base power supply (GND) so as to be connected in parallel with the third zener diode (ZD3) to remove the noise of the third zener diode (ZD3) A filter capacitor may be further provided.

FIG. 6 is a simulation model illustrating the power protection circuit 120 of FIG. 4, and FIG. 7 is a waveform diagram illustrating a waveform diagram according to the simulation result of FIG. 6. In Fig. 7, Vn1 is the voltage of the first node n1, Vn2 is the voltage of the second node n2, Vn3 is the voltage of the third node n3, and VnO is the voltage of the output node nO. to be.

An operation of the power protection circuit 120 will be described with reference to FIGS. 6 and 7 as follows.

First, when the main switch MSW is turned on by the main power on / off signal MS, the reference voltage circuit 130 uses the sixth and seventh resistors R6 and R7 to minimum reference from the input power Vin. Generate voltage and maximum reference voltage respectively. The maximum reference voltage is input to the non-inverting input terminal (+) of the first comparator 122 and the minimum reference voltage is input to the inverting input terminal (-) of the second comparator 124.

The input power Vin input to the first node n1 of the first detection circuit 126 is stabilized to the first voltage by the first zener diode ZD1 and thus the non-inverting input terminal of the second comparator 124 ( Supplied to +). At the same time, the input power Vin input to the second node n2 of the second detection circuit 128 is stabilized to the second voltage by the second zener diode ZD2 to invert the input terminal of the first comparator 122. Supplied with (-).

Accordingly, the first comparator 122 outputs the main power control signal PCS in the high state to the output node nO only when the voltage Vn2 on the second node n2 is lower than the maximum reference voltage. The second comparator 124 outputs the main power control signal PCS in the high state to the output node nO only when the voltage Vn1 on the first node n1 is greater than the minimum reference voltage.

The main power control signal PCS, which is supplied from the first and second comparators 122 and 124 to the output node nO, is stabilized by the third zener diode ZD3 of the stabilization circuit 132 and thus the main switch MSW. Supplied to.

Accordingly, the driving device and method of the display device according to an exemplary embodiment of the present invention use the power protection circuit 120 to input an input within a range of a minimum on voltage VLon and a maximum off voltage VHoff, as shown in FIG. 7. Only the power Vin is supplied to the power generator 110.

Accordingly, in the driving apparatus and method of the display device according to the exemplary embodiment of the present invention, the unstable input power Vin except for the voltage between the minimum on voltage VLon and the maximum off voltage VHoff is a power generator 110 of the display device. It is possible to protect the display device from unstable input power (Vin) by blocking the supply to).

As described above, the driving device and method of the display device according to the exemplary embodiment of the present invention use the power protection circuit 120 to supply only the normal input power Vin to the power generator 110 from the power generator 110. The display device is operated using various generated power sources (Vcc, VGH, VGL, Vcom, etc.) to display a desired image on the display panel 102.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention It will be apparent to those skilled in the art.

The driving apparatus and method of the display device according to the embodiment of the present invention as described above can protect the display device from unstable power supply by including a power protection circuit for controlling the main switch so that input power of a specific voltage range is supplied to the display device. have. Accordingly, according to the present invention, hysteresis can be applied to stably turn on / off the main switch even in a low voltage region, and an abnormal image display can be displayed as a black / white image. As a result, the present invention can prevent abnormal display of an image displayed on the display panel.

Claims (13)

A display panel displaying an image, A power generator for generating various powers for driving the display panel; A main switch for switching external input power to the power generation unit; And a power protection circuit for controlling the main switch to block the input power outside the set voltage range from being supplied to the power generation unit. The power supply protection circuit includes a first detection circuit for detecting a first voltage from the input power supply, a second detection circuit for detecting a second voltage higher than the first voltage from the input power supply, and a maximum from the input power supply. And a reference voltage circuit for generating a minimum reference voltage, a first comparator for generating an on / off signal and outputting the on / off signal to an output node by comparing the minimum reference voltage with the first voltage, and the maximum reference voltage and the second voltage. And a second comparator for generating the on / off signal and outputting the on / off signal to the output node, and a stabilizing circuit for stabilizing a voltage of the on / off signal supplied from the output node to the main switch. A drive device for a display device. delete The method of claim 1, The first detection circuit, A first node electrically connected to the first input terminal of the second comparator; First and second resistors connected in series with the input power source and a first node; A first zener diode electrically connected between the first node and a base power source to stabilize the first node to a first voltage; And a diode electrically connected to the first zener diode and the base power source to block reverse current. The method of claim 1, The second detection circuit, A second node electrically connected to the first input terminal of the first comparator; A third resistor electrically connected to the input power source and the second node; A second zener diode electrically connected between the third resistor and a base power source to stabilize the second node to a second voltage; And fourth and fifth resistors connected in series with the second zener diode and the base power source. The method of claim 1, The reference voltage circuit, A third node electrically connected to the second input terminal of the first comparator and the second input terminal of the second comparator; A sixth resistor electrically connected to the input power source and a third node; And a seventh resistor electrically connected to the third node and a base power source. The method of claim 1, The stabilization circuit, Eighth and ninth resistors connected in series between the input power source and the output node; And a third zener diode electrically connected between the output node and the base power source. The method of claim 1, The main switch switches only an input power between the first voltage and the second voltage to the power generator in response to the on / off signal generated by each of the first and second comparators. Drive system. In a driving method of a display device comprising a display panel for displaying an image, Generating various driving powers for driving the display device by using a power generation unit to which input power is supplied from the outside through a main switch; Controlling the main switch to block the input power outside the set voltage range from being supplied to the power generator, The controlling of the main switch may include setting a maximum and minimum reference voltage from the input power supply, detecting a first voltage from the input power supply, and receiving a second voltage higher than the first voltage from the input power supply. Detecting, comparing the minimum reference voltage with the first voltage to generate an on / off signal, and outputting the on / off signal to an output node, comparing the maximum reference voltage with the second voltage to obtain the on / off signal. Generating and outputting to the output node and controlling the main switch by stabilizing a voltage of the on / off signal on the output node. delete The method of claim 8, The detecting of the first voltage may include stabilizing the input power using a first zener diode. The method of claim 8, The detecting of the second voltage may include stabilizing the input power using a second zener diode. The method of claim 8, And stabilizing the voltage of the on / off signal on the output node uses a third zener diode. The method of claim 8, And the main switch switches only the input power between the first voltage and the second voltage to the power generator in response to the on / off signal.

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