KR101088877B1 - Apparatus for manufacturing poly-silicon thin film - Google Patents

Apparatus for manufacturing poly-silicon thin film Download PDF

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Publication number
KR101088877B1
KR101088877B1 KR1020100092882A KR20100092882A KR101088877B1 KR 101088877 B1 KR101088877 B1 KR 101088877B1 KR 1020100092882 A KR1020100092882 A KR 1020100092882A KR 20100092882 A KR20100092882 A KR 20100092882A KR 101088877 B1 KR101088877 B1 KR 101088877B1
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South Korea
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electrode terminal
conductive layer
thin film
electric field
center region
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KR1020100092882A
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Korean (ko)
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노재상
홍원의
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주식회사 엔씰텍
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/326—Application of electric currents or fields, e.g. for electroforming

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The present invention chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; And a power applying unit including an electrode terminal for applying power to the conductive layer, wherein the electrode terminal comprises a first electrode terminal and a second electrode terminal, and between the first electrode terminal and the second electrode terminal. The spacing relates to an electric field applying device, wherein the spacing in the outer region is larger than the spacing in the center region.
Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.

Description

Apparatus for manufacturing Poly-Silicon thin film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for manufacturing a polycrystalline silicon thin film, and to an apparatus and method for producing a polycrystalline silicon thin film by generating joule heat by applying power to a substrate.

In general, amorphous silicon (a-Si) has disadvantages of low mobility and opening ratio of electrons, which are charge carriers, and incompatibility with CMOS processes. On the other hand, in the poly-silicon thin film device, it is possible to configure a driving circuit on the substrate like the pixel TFT-array, which is necessary for writing an image signal to the pixel, which was not possible in the amorphous silicon TFT (a-Si TFT). . Therefore, in the polycrystalline silicon thin film element, the connection between the plurality of terminals and the driver IC becomes unnecessary, so that the productivity and reliability can be increased and the thickness of the panel can be reduced. In addition, in the polycrystalline silicon TFT process, since the microfabrication technology of silicon LSI can be used as it is, a microstructure can be formed in wiring etc. Therefore, since there is no pitch constraint on the TAB mounting of the driver IC seen in the amorphous silicon TFT, pixel reduction is easy and a large number of pixels can be realized with a small field of view. The thin film transistor using polycrystalline silicon in the active layer has a high switching capability and the channel position of the active layer is determined by self-matching, compared with the thin film transistor using amorphous silicon, so that device miniaturization and CMOS are possible. For this reason, polycrystalline silicon thin film transistors are used as pixel switch elements in active matrix type flat panel displays (e.g., liquid crystal displays, organic ELs), and the like. It is emerging as a major device.

On the other hand, the inventors of the present invention in Korea Patent Application No. 2007-0021252 has proposed a method for crystallization by heating the joule by applying an electric field after interposing a conductive thin film on or below the silicon thin film.

1A is a schematic perspective view illustrating a conventional method of manufacturing a polycrystalline silicon thin film, FIG. 1B is a cross-sectional view taken along line II of FIG. 1A, and FIG. 1C is a plan view of FIG. 1A.

First, referring to FIGS. 1A and 1B, in the conventional method of manufacturing a polycrystalline silicon thin film, an amorphous silicon film 12 is formed on a substrate 11 made of glass, stainless steel, or plastic, and the amorphous silicon film ( 12, an insulating film 13 such as a silicon oxide film or a silicon nitride film is formed, and the conductive layer 14 is formed of a transparent conductive thin film or a metal thin film on the insulating film 13.

Thereafter, an electric field is applied to the conductive layer 14 through the electrode terminal 15 provided in the polycrystalline silicon thin film manufacturing apparatus, that is, the first electrode terminal 15a and the second electrode terminal 15b. 12 is crystallized by Joule heating. In this case, the first electrode terminal 15a and the second electrode terminal 15b are spaced apart from each other while maintaining a predetermined interval d1. Meanwhile, reference numeral 130 denotes a power applying unit.

However, the conductive layer 14 used in the manufacture of the conventional polycrystalline silicon thin film is a result of the conductive layer forming method, the thickness of the conductive layer is relatively thin in the center region, the outer region is relatively thick. 1C, the center region becomes a high resistance region, and becomes a low resistance region from the center region to the outer region.

Therefore, when an electric field is applied to the conductive layer through the first electrode terminal 15a and the second electrode terminal 15b spaced apart from each other while maintaining a predetermined distance d1, the electric field is applied to the low resistance region rather than the high resistance region. Since the current is relatively large, the low heat resistance region generates heat at a high temperature, and the high resistance region generates heat at a relatively low temperature. As a result, the center region becomes a high temperature region, and the low temperature region is gradually increased from the center region to the outer region. do.

Accordingly, a difference occurs in the heat transferred to the amorphous silicon film formed under the low temperature region of the conductive layer and the amorphous silicon film formed under the high temperature region of the conductive layer, resulting in a polycrystalline silicon thin film having overall uniform crystallinity. There is a problem that can not be formed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field in the conductive layer.

The present invention provides an electric field applying apparatus including a power applying unit including an electrode terminal for applying electric power to a conductive layer, wherein the electrode terminal is curved.

According to the present invention, the electrode terminal includes a first electrode terminal and a second electrode terminal, wherein the distance between the first electrode terminal and the second electrode terminal is larger than the distance in the center region in the outer region. An electric field applying apparatus is provided.

The electrode terminal may include a first electrode terminal and a second electrode terminal, and a distance between the first electrode terminal and the second electrode terminal is wider from the center region to the outer region. Provided is an electric field applying device.

In addition, the present invention is a chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; And a power applying unit including an electrode terminal for applying power to the conductive layer, wherein the electrode terminal comprises a first electrode terminal and a second electrode terminal, and between the first electrode terminal and the second electrode terminal. The spacing provides an electric field applying apparatus, wherein the spacing in the outer region is larger than the spacing in the center region.

The present invention also provides an electric field applying apparatus, wherein the first electrode terminal and the second electrode terminal are symmetrical with respect to the longitudinal direction of the electrode terminal.

The present invention also provides an electric field applying apparatus, wherein each of the first electrode terminal and the second electrode terminal is vertically symmetrical with respect to the width direction of the electrode terminal.

In addition, the present invention provides an electric field applying apparatus, characterized in that the amount of current applied to the conductive layer is larger than the amount of current applied to the outer region.

In addition, the present invention provides a field applying apparatus, characterized in that the thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region.

In addition, the present invention provides an electric field applying apparatus, characterized in that the electric field applying apparatus is a polycrystalline silicon thin film manufacturing apparatus.

Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.

1A is a schematic perspective view for explaining a method of manufacturing a conventional polycrystalline silicon thin film.
FIG. 1B is a cross-sectional view taken along line II of FIG. 1A.
1C is a top view of FIG. 1A.
Figure 2a is a schematic perspective view for explaining an apparatus for producing a polycrystalline silicon thin film according to the present invention.
FIG. 2B is a cross-sectional view taken along the line II-II of FIG. 2A.
FIG. 2C is a cross-sectional view taken along line III-III of FIG. 2A.
FIG. 2D is a top view of FIG. 2A.
3 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosure may be made thorough and complete, and to fully convey the spirit of the invention to those skilled in the art. Like reference numerals designate like elements throughout the specification.

FIG. 2A is a schematic perspective view illustrating a manufacturing apparatus of a polycrystalline silicon thin film according to the present invention, FIG. 2B is a sectional view taken along line II-II of FIG. 2A, FIG. 2C is a sectional view taken along line III-III of FIG. 2A, FIG. 2D is a top view of FIG. 2A.

2A through 2C, an amorphous silicon film 12, an insulating film 13, and a conductive layer 14 are sequentially formed on a substrate 11, and an electric field is applied to the conductive layer 14. High Joules are generated by inducing Joule heating to crystallize the amorphous silicon film 14 by the high heat.

The material of the substrate 11 is not particularly limited. For example, a transparent substrate material such as glass, quartz, plastic, or the like may be used, and glass is more preferable in terms of economy.

The amorphous silicon film 12 may be formed by, for example, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, plasma enhanced chemical vapor deposition (PECVD), sputtering, vacuum evaporation, or the like.

The insulating layer 13 may serve to prevent the amorphous silicon film 12 from being contaminated by the conductive layer 14 during the heat treatment process and to insulate the TFT device. In general, silicon oxide (SiO 2 ), It can be formed by depositing silicon nitride.

The conductive layer 14 may be formed of a transparent conductive thin film or a metal thin film. Specifically, the transparent conductive thin film may use indium tin oxide (ITO), indium zinc oxide (IZO), or the like. Mo, Ti, Cr, Al, Cu, Au, Ag, Pd or MoW may be used, but the material of the conductive layer is not limited in the present invention.

The conductive layer 14 may be formed by a method such as sputtering or evaporation, and may be formed at 500 kPa to 3000 kPa. But it is not limited to that.

In the present invention, as described above, Joule heating is generated by applying an electric field to the conductive layer. Joule heating means heating by using heat generated by resistance when current flows through a conductor. .

That is, the amount of energy per unit time applied to the conductive layer by Joule heating due to the application of the electric field may be represented by the following equation.

W = V × I

In the above formula, W is the amount of energy per unit time of Joule heating, V is the voltage across the conductive layer, and I is the current, respectively.

From the above equation, it can be seen that as the voltage V increases and / or the current I increases, the amount of energy per unit time applied to the conductive layer by Joule heating increases. When the temperature of the conductive layer is increased by Joule heating, the amorphous silicon film 14 is crystallized into a polysilicon film by the high heat.

In this case, since the application of the electric field is determined by various factors such as resistance, length and thickness of the conductive layer, it is difficult to be specified, but about 100 W / cm 2 to 1,000,000 W / cm 2 May be enough. In addition, the applied current may be direct current or alternating current, and the application time of the electric field may be 1 / 10,000,000 to 10 seconds continuously applied. The application of this electric field can be repeated several times in regular or irregular units.

On the other hand, applying the electric field to the conductive layer 14 is applied through the electrode terminal 25, that is, the first electrode terminal 25a and the second electrode terminal 25b provided in the polycrystalline silicon thin film manufacturing apparatus, the present invention In the first electrode terminal (25a) and the second electrode terminal (25b) is characterized in that the curved.

At this time, the distance between the first electrode terminal 25a and the second electrode terminal 25b is larger than the distance d3 in the center region.

That is, the distance between the first electrode terminal 25a and the second electrode terminal 25b becomes wider from the center region to the outer region. In this case, in the present invention, the center region and the outer region are defined based on the length direction of the electrode terminal, and these expressions are divided into the center region and the outer region for convenience of description, and the meaning of the terms in the present invention. It is not limited to.

Meanwhile, in the present invention, in order to apply a uniform electric field, the shapes of the first electrode terminal 25a and the second electrode terminal 25b are preferably symmetrical with each other, and the first electrode terminal 25a and the second electrode are also symmetrical. Each of the electrode terminals 25b is preferably symmetrical up and down. At this time, the left and right symmetry is based on the length direction of the electrode terminal, the vertical symmetry is based on the width direction of the electrode terminal.

Subsequently, referring to FIG. 2D, as described above, the first electrode terminal 25a and the second electrode terminal 25b are curved, and at this time, the first electrode terminal 25a and the second electrode terminal are curved. The interval between 25b is formed such that the interval d2 in the outer region is larger than the interval d3 in the central region.

On the other hand, as described above, the electric field is applied to the conductive layer 14 through the first electrode terminal 25a and the second electrode terminal 25b provided in the polycrystalline silicon thin film manufacturing apparatus, Joule heating due to the application of the electric field The amount of energy per unit time applied to the conductive layer is proportional to the current applied to the conductive layer, which is inversely proportional to the resistance of the conductive layer.

In this case, the resistance of the conductive layer between the first electrode terminal 25a and the second electrode terminal 25b is small in the center region where the spacing between the first electrode terminal 25a and the second electrode terminal 25b is relatively short. As a result, they become larger in relatively long outer regions.

That is, the resistance of the conductive layer between the first electrode terminal 25a and the second electrode terminal 25b is increased from the center region to the outer region, and thus the amount of current applied to the conductive layer from the center region to the outer region. Will be less.

As a result, the amount of energy applied to the conductive layer by Joule heating due to the application of the electric field increases as the current increases, and therefore, the amount of energy applied to the outer region becomes smaller than the amount of energy applied to the central region.

On the other hand, as described above, the conductive layer 14 used in the production of the polycrystalline silicon thin film is a result of the method of forming the conductive layer, the center region is formed relatively thin thickness, the outer region is relatively Since the thickness is formed thick, the center region becomes a high resistance region and becomes a low resistance region from the center region to the outer region.

Therefore, in the related art, the amount of current applied to the center region is smaller than the amount of current applied to the outer region due to the resistance difference of the conductive layer. However, in the present invention, the first electrode terminal 25a and the second electrode terminal 25b The interval between them is widened from the center region to the outer region, and eventually, the amount of current applied to the conductive layer is made larger than the amount of current applied to the outer region, thereby increasing the amount of current applied to the outer region. To compensate for the amount of current applied.

Accordingly, in the present invention, by reducing the difference between the heat transferred to the amorphous silicon film formed under the center region of the conductive layer and the amorphous silicon film formed under the outer region of the conductive layer, the polycrystal has a uniform crystallinity as a whole. A silicon thin film can be formed.

Meanwhile, reference numeral 130 denotes a power applying unit to be described later.

3 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.

Referring to FIG. 3, the polycrystalline silicon thin film manufacturing apparatus 100 according to the present invention is provided with a chamber 110, a substrate stage 120 installed at a lower portion of the chamber 110, and an upper portion of the chamber 110. It includes a power supply unit 130, the substrate support unit 120 and the power supply unit 130 is installed to face.

In addition, the polycrystalline silicon thin film manufacturing apparatus 100 may further include an alignment check unit 140 installed in the chamber 110.

The chamber 110 provides a process progress space enclosed therein to allow the polycrystalline silicon thin film manufacturing process to proceed.

The substrate stage 120 is a device for aligning and fixing the substrate 50 at an accurate position so that a polycrystalline silicon thin film manufacturing process may be performed on the loaded substrate 50.

In this case, a substrate 50 to be loaded is positioned on an upper surface of the substrate stage 120, and the substrate 50 includes an amorphous silicon film, an insulating film, and a conductive layer as described above.

In addition, the substrate stage 120 may include one or more adsorption holes formed to be exposed to the upper surface thereof.

The suction hole is connected to the vacuum unit 150 through the vacuum line 151, and the vacuum unit 150 is positioned on the upper surface of the substrate stage 120 in the suction hole through the vacuum line 151. It provides a vacuum for adsorption fixing the substrate 50.

The power applying unit 130 is a device for applying power to the conductive thin film of the substrate 50 aligned and fixed to the substrate stage 120, the electrode movement unit 131 is installed in the upper portion of the chamber 110 And an electrode terminal 135 installed on the electrode movement unit 131.

The electrode movement unit 131 is connected to a cylinder 132 fixed to an upper portion of the chamber 110, a piston 133 and a piston 133 which are coupled to the cylinder 132 to reciprocate at a predetermined distance. It includes an electrode holder 134 is installed, the electrode holder 134 may be a flat plate formed integrally with the piston 133.

The electrode terminal 135 is installed on a lower surface of the electrode holder 134 opposite to the substrate support part 120 so as to apply power to the conductive thin film of the substrate 50.

In addition, the electrode terminal 135 has a first electrode terminal 136 and the second electrode terminal 137 having a different polarity is installed in the shape of a curved electrode terminal, the power supply unit via the power line 161 And electrically connected to 160.

At this time, as described above, the first electrode terminal 136 and the second electrode terminal 137 is formed in a curved shape, the interval between the first electrode terminal 136 and the second electrode terminal 137 is the outer The spacing in the area is made larger than the spacing in the center area.

The power supply unit 160 supplies power to the electrode terminal 135 through the power line 161 to the conductive thin film of the substrate 50.

The alignment check unit 140 is a device for monitoring the alignment state of the substrate stage 120 and the substrate 50 from the outside and may be installed on an inner wall of the chamber 110.

Of course, the alignment check unit 140 may be installed anywhere in the chamber 110 to monitor the alignment of the substrate stage 120 and the substrate 50.

In addition, when the electrode terminal 135 contacts the substrate 50 to apply power to the substrate 50, the alignment check unit 140 may contact the substrate 50 and the electrode terminal 135. You can also monitor the alignment of your liver.

Therefore, the alignment check unit 140 is installed to monitor the preset positions, for example, corners of the substrate 50, to check the alignment state.

In addition, the alignment check unit 140 may be prepared before the crystallization process is performed in addition to the alignment state of the substrate stage 120 and the substrate 50 and the alignment state of the substrate 50 and the electrode terminal 135. You can also monitor the process.

However, in the present invention, since the first electrode terminal 136 and the second electrode terminal 137 are formed in a curved shape, the distance between the first electrode terminal 136 and the second electrode terminal 137 is in the outer region. It is characterized in that the interval of is formed larger than the interval in the center region, and therefore, the present invention does not limit the configuration and shape of the polycrystalline silicon thin film manufacturing apparatus.

As mentioned above, although the present invention has been described with reference to the illustrated embodiments, it is only an example, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the scope of the present invention should be defined by the appended claims and their equivalents.

100: polycrystalline silicon thin film manufacturing apparatus 110: chamber
120: substrate stage 130: power supply unit
135: electrode terminal
140: alignment check unit 150: vacuum unit
151: vacuum line 160: power supply unit

Claims (20)

delete In the electric field applying apparatus including a power applying unit including an electrode terminal for applying power to the conductive layer,
The electrode terminal is curved
The electrode terminal includes a first electrode terminal and a second electrode terminal,
And the distance between the first electrode terminal and the second electrode terminal is greater than the distance between the center region and the center region. In the electric field applying apparatus including a power applying unit including an electrode terminal for applying power to the conductive layer,
The electrode terminal is curved
The electrode terminal includes a first electrode terminal and a second electrode terminal,
The distance between the first electrode terminal and the second electrode terminal is an electric field applying device, characterized in that the wider toward the outer region from the center region. The method according to claim 2 or 3,
The center region and the outer region are defined based on the longitudinal direction of the electrode terminal. The method according to claim 2 or 3,
The substrate further comprises an amorphous silicon film. The method according to claim 2 or 3,
And the first electrode terminal and the second electrode terminal are mutually symmetrical with respect to the length direction of the electrode terminal. The method according to claim 2 or 3,
Each of the first electrode terminal and the second electrode terminal is vertically symmetrical with respect to the width direction of the electrode terminal. delete In the electric field applying apparatus including a power applying unit including an electrode terminal for applying power to the conductive layer,
The electrode terminal is curved
The thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region. The method according to claim 2 or 3,
The electric field applying device is characterized in that the polycrystalline silicon thin film manufacturing apparatus. chamber;
A substrate stage installed in the chamber and having a substrate including a conductive layer; And
It includes a power supply unit including an electrode terminal for applying power to the conductive layer,
The electrode terminal is composed of a first electrode terminal and a second electrode terminal,
And the distance between the first electrode terminal and the second electrode terminal is greater than the distance between the center region and the center region. The method of claim 11,
The distance between the first electrode terminal and the second electrode terminal is an electric field applying device, characterized in that the wider toward the outer region from the center region. The method of claim 11,
And the first electrode terminal and the second electrode terminal are curved. The method of claim 11,
The center region and the outer region are defined based on the longitudinal direction of the electrode terminal. The method of claim 11,
The substrate further comprises an amorphous silicon film. The method of claim 11,
And the first electrode terminal and the second electrode terminal are mutually symmetrical with respect to the length direction of the electrode terminal. The method of claim 11,
Each of the first electrode terminal and the second electrode terminal is vertically symmetrical with respect to the width direction of the electrode terminal. delete The method of claim 11,
The thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region. The method of claim 11,
The electric field applying device is characterized in that the polycrystalline silicon thin film manufacturing apparatus.
KR1020100092882A 2010-09-24 2010-09-24 Apparatus for manufacturing poly-silicon thin film KR101088877B1 (en)

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