KR101069104B1 - Safety improved multi battery pack system and control method thereof, and battery pack using the same - Google Patents

Abstract

The present invention discloses a multi-battery pack system having improved stability, a control method thereof, and a battery pack using the same. The multi-battery pack system according to the present invention receives a total voltage for all battery packs every predetermined time, calculates a target voltage, transfers the calculated target voltage to each slave battery pack, and the target voltage and its entirety. A master battery pack for comparing the voltages and controlling or switching the switching elements according to the results, thereby connecting or disconnecting the output terminals and the cell groups thereof; And transmits its entire voltage to a master battery pack at the request of the master battery pack, receives a target voltage from the master battery pack, compares the target voltage with its total voltage, and accordingly the switching element. And controlling one or more slave battery packs to connect or disconnect an output terminal and its cell group. Each of the battery packs senses its own charging current or discharging current, and the switching when the sensed current value exceeds a threshold. And a current buffer circuit for limiting the charging current or the discharging current to the constant current by performing an operation of raising the on-resistance of the device by negative feedback control.

Battery Pack, Discharge, Charge, Master, Slave, Current Charge, SST, PRECHG

Description

Multi-battery pack system with improved stability and control method thereof, and battery pack using same {SAFETY IMPROVED MULTI BATTERY PACK SYSTEM AND CONTROL METHOD THEREOF, AND BATTERY PACK USING THE SAME}

1 is a block diagram of a multi-battery pack system according to a preferred embodiment of the present invention.

2 is a detailed configuration diagram of a battery pack according to a preferred embodiment of the present invention.

3 is a control flowchart of a master battery pack according to a preferred embodiment of the present invention.

4 is a control flowchart of a slave battery pack according to a preferred embodiment of the present invention.

5 illustrates a data format according to a preferred embodiment of the present invention.

6 is a view showing a discharge method according to a preferred embodiment of the present invention.

7 is a view showing a charging method according to a preferred embodiment of the present invention.

8 shows waveforms of a target total voltage according to a preferred embodiment of the present invention.

9 is a configuration diagram of a current buffer circuit according to a preferred embodiment of the present invention.

10A and 10B are graphs showing output voltage levels of an amplifier and a comparator in the charge buffer circuit, respectively.

11A and 11B are graphs showing output voltage levels of an amplifier and a comparator in the discharge buffer circuit, respectively.

12 is a configuration diagram of a current buffer circuit according to another embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

M: master battery pack

S ₁ to S _N : First to Nth Slave Battery Packs

200: control unit

202: cell voltage and current detection circuit

204 cell group

206: switching unit

208: switching element control unit

CFET, DFET: Charge Control and Discharge Control Switch

R: sense resistor

901, 1101: charge buffer circuit

1001 and 1201: discharge buffer circuit

902, 1002, 1102, 1202: Amplifier

903, 1003, 1103, 1203: comparators

904, 1004, 1300: half on switch

The present invention relates to a battery pack, and more particularly, to a multi-battery pack system composed of a plurality of battery packs, a control method thereof, and a battery pack using the same.

In general, portable electronic devices such as mobile phones, notebook computers, and digital cameras use secondary battery packs having a plurality of rechargeable cells as power sources.

In recent years, a multi-battery pack system has been proposed to connect a plurality of battery packs in parallel to provide a sufficient capacity for ensuring stable operation of the portable electronic device and to cope with various kinds of portable electronic devices.

As the multi-battery pack system is implemented to vary the number of battery packs included therein, the control of the multi-battery pack system has a complicated problem.

Various solutions have been proposed to solve this problem, for example, there is a multiple battery pack power supply disclosed in Patent No. 3405526, which is patented by the Japan Patent Office. The plurality of battery pack power supply units each include a circuit for detecting a charge / discharge state and controlling charge / discharge of a plurality of cells and a plurality of cells, and one of them as a master battery pack and the other as a slave battery pack. And the master battery pack requests transmission of data representing the charge / discharge state by communication to the slave battery pack, manages the entire data, determines the charge / discharge state, transmits commands, and performs charge / discharge control. The slave battery pack may transmit data indicating a charge / discharge state, receive a command, and perform charge / discharge according to a data request.

According to the above-described prior art, since the master battery pack controls charging and discharging of the plurality of slave battery packs, there is a problem in that the load of the battery pack determined as the master increases as the number of slave battery packs increases.

Accordingly, there is an urgent need for a technology development capable of performing control of a large number of slave battery packs without increasing the load of the master battery pack of the multi-battery pack system.

On the other hand, the master battery pack of the multi-battery pack system discharges current by turning on the battery pack having the largest charging capacity during the discharging operation, and when the charging capacity of the battery pack being discharged falls below a certain level, Increase the number In the charging operation, the battery pack having the smallest charging capacity is turned on to perform charging, and when the charging capacity of the battery pack being charged increases above a certain level, the number of battery packs to be charged is increased.

However, in the process of newly turning on the battery pack, the separation between the pack voltage (terminal voltage + internal resistance * current) of the battery pack that is previously turned on and the terminal voltage of the newly turned on battery pack (internal resistance *) Current) is generated. As a result, a current (inter-battery pack current) flows between the battery pack that is turned on and the battery pack that is turned on. The current flowing at this time is larger than the limit current that operates the over-current protection function of the battery pack. If large, the overcurrent protection function is activated in the protection circuit included in the battery pack into which the current flows, causing a problem that the battery pack is turned off. This problem usually occurs when the load is temporarily stopped and the load current becomes zero (e.g., when the multi-battery system is mounted in a hybrid car, when the motor is suspended due to the stopping of the car). do.

For example, battery packs E1 and E2 with 0.05 ohm internal resistance, V1 terminal voltage, 30 A and 8 A discharge overcurrent protection current and charge overcurrent protection current of the protection circuit are connected in parallel to the load through the power output terminals. Suppose that a current of 20A is discharged to the load only at E1. In this case, the pack voltage of E1 is V1 + 20 * 0.05 = (V1 + 1) V. At this time, if E2 is newly turned on under the control of the master battery pack while the current supply to the load is temporarily suspended, the terminal voltage of E2 is V1, so the pack voltage of E1 and the terminal voltage of E2 are 1V. It becomes visible. Accordingly, a current of 10 A (1 V / 0.1 Ω) between battery packs flows from the E1 to the E2 side. However, since the protection circuit included in E2 is set to operate the charging overcurrent protection function when a charging current of 8A or more flows, the charging overcurrent protection function is activated in E2 when a current of 10A flows, thereby inadvertently turning off the battery pack. Problems will arise.

Therefore, when designing a multi-battery pack system, even when a battery pack is turned on, even if current is generated between battery packs that cause an overcurrent protection operation of a protection circuit included in the battery pack, the battery pack is prevented from being unintentionally turned off. Means must be taken to prevent damage to the battery cells included in the battery pack by the inter-current.

Disclosure of Invention The present invention is to overcome the above-mentioned conventional problems, and to control a large number of slave battery packs without increasing the load of the master battery pack of the multi-battery pack system and the control thereof. It is an object of the present invention to provide a method and a battery pack using the same.

Another technical problem to be solved by the present invention is that the battery pack is newly turned on for the charge / discharge operation in the multi-battery pack system. The present invention provides a multi-battery pack system, a method of controlling the same, and a battery pack using the same, which can prevent an unintentional overcurrent protection function caused by a current between battery packs caused by a voltage difference generated between terminal voltages.

The multi-battery pack system according to the present invention for achieving the above object and to solve the problems of the prior art, receives a total voltage for the entire battery pack every predetermined time to calculate a target voltage, and the calculated target voltage to each slave A master battery pack which is transmitted to a battery pack, compares the target voltage with its total voltage, and controls a switching element according to the result, thereby connecting or disconnecting an output terminal and its cell group; And transmits its entire voltage to a master battery pack at the request of the master battery pack, receives a target voltage from the master battery pack, compares the target voltage with its total voltage, and accordingly the switching element. And controlling one or more slave battery packs to connect or disconnect an output terminal and its cell group. Each of the battery packs senses its own charging current or discharging current, and the switching when the sensed current value exceeds a threshold. And a current buffer circuit for limiting the charging current or the discharging current to the constant current by performing an operation of raising the on-resistance of the device by negative feedback control.

According to the present invention, the master battery pack of the multi-battery pack system receives the total voltages (TTLV) of the plurality of slave battery packs every predetermined time, calculates a target voltage (TGTTLV) according to the charging or discharging mode, and transmits the target voltages (TGTTLV) to the plurality of slave battery packs. The plurality of slave battery packs receiving the target voltage TGTTLV may connect or disconnect the output terminal and the plurality of cells for charging or discharging based on the total voltage TTLV and the target voltage TGTTLV.

As described above, the present invention allows the master battery pack to control the plurality of battery packs included in the multi-battery pack system only by providing only the target voltage TTGTLV to the plurality of slave battery packs, thereby increasing the number of slave battery packs. Even if it does, the load of the master battery pack is not increased.

In addition, according to the target voltage setting of the master battery pack, it is possible to prevent the unintended overcurrent protection function from operating due to the inter-package current exceeding the limit when the battery packs are connected in parallel for charging or discharging. Damage to the included battery cells can be prevented.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms or words used in the present specification and claims should not be construed as being limited to the common or dictionary meanings, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention. Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiments of the present invention and do not represent all of the technical idea of the present invention, various equivalents that may be substituted for them at the time of the present application It should be understood that there may be water and variations.

1 is a basic configuration of a multi-battery pack system according to a preferred embodiment of the present invention.

Referring to FIG. 1, the multi battery pack system includes a master battery pack M and first to Nth slave battery packs S ₁ to S _N.

The master battery pack M and the first to Nth slave battery packs S ₁ to S _N are connected in parallel to power output terminals V + and V- and through the power output terminals V + and V-. The charging current is input or discharge current is output.

The master battery pack M requests the total voltage TTLV from the first to Nth slave battery packs S ₁ to S _N whenever a predetermined time elapses, and according to the request, the first to Nth slaves. When the battery packs S ₁ to S _N provide respective total voltages TTLV, their total voltages TTLV and the total voltages TTLV of the first to Nth slave battery packs S ₁ to S _{N are} provided. The target voltage TGTTLV is calculated based on the reference value, and the target voltage TGTTLV is transmitted to the first to Nth slave battery packs S ₁ to S _N.

Thereafter, the master battery pack M compares the target voltage TGTTLV with its total voltage TTLV and connects or disconnects the cell group and the output terminal according to the result. Separately, the master battery pack M selectively controls the switching elements of the switching unit according to the charging or discharging mode to control the charging or discharging current.

When the first to Nth slave battery packs S ₁ to S _N are provided with the target voltage TGTTLV from the master battery pack M, the target voltage TGTTLV is compared with its total voltage TTLV. As a result, the cell group and the output terminal are connected or disconnected. Separately, the first to Nth slave battery packs S ₁ to S _N selectively control the switching elements of the switching unit according to the charge or discharge mode to control the charge or discharge current.

Here, when the switching unit of the master battery pack M and the first to Nth slave battery packs S ₁ to S _N itself connects the cell group and the output terminals V + and V−, each battery pack has an output terminal. Parallel connection is made based on (V +, V-).

Since the hardware configuration of the master battery pack M and the first to Nth slave battery packs S ₁ to S _N differs only in accordance with a master or slave setting in the same state, the configuration of any one battery pack will be described below. Bay will be described in detail with reference to FIG.

Referring to FIG. 2, when the controller 200 of the battery pack is set as a master, the controller 200 receives each of the total voltages TTLV from the first to Nth slave battery packs S ₁ to S _N , and the master itself. The total voltage TTLV is supplied from the current detection circuit 202 to calculate a target voltage TGTTLV for all battery packs, and the calculated target voltage TGTTLV is calculated from the first to Nth slave battery packs S. FIG. ₁ ~ S _N ). The controller 200 controls the switching unit 206 according to the target voltage TGTTLV to charge the cell group 204 or to discharge the cell group 204.

In particular, the control unit 200 set as a master calculates a target voltage TTGTLV for all battery packs based on the minimum voltage for all battery packs in the charging mode, and refers to the maximum voltage for all battery packs in the discharge mode. The target voltage TGTTLV for the entire battery pack is calculated. Here, the target voltage in the charging or discharging mode takes into account the maximum load current value, the switch current capacity of each pack, the temperature of the pack, the current flowing, the total voltage of each pack (TTLV), the internal resistance and characteristics of the battery. Is determined.

In addition, when the controller 200 is set as a slave, the controller 200 transmits its entire voltage TTLV at the request of the master battery pack M, and according to the target voltage TGTTLV provided from the master battery pack M. The switching unit 206 is controlled.

In addition, the control unit 200 is activated by receiving a start signal, and is connected to another battery pack through a communication path to perform serial communication based on RS 232.

The communication format according to the present invention is composed of a start 1 bit, a data 8 bits, and an end 1 bit as shown in FIG. 5A, and the communication speed is 9600 [bps]. Here, in the preferred embodiment of the present invention, only serial communication based on RS 232 is illustrated, but it is apparent to those skilled in the art that various communication methods such as IIC may be employed.

In the data portion of the communication format, the control unit 200 sends a total voltage (TTLV) request message composed of an address and a command of the slave battery pack and transmits it to any slave battery pack as shown in FIG. According to the full voltage (TTLV) request message, a full voltage (TTVL) response message including its maximum and minimum voltage values may be transmitted to the master battery pack (M).

In addition, as shown in FIG. 5C, the controller 200 is configured to display maximum and minimum voltage values of the address, the command, and the target voltage TGTTLV representing the first to Nth slave battery packs S ₁ to S _N. The configured target voltage TGTTLV notification message may be sent.

Meanwhile, the controller 200 receives the voltage detection values for each of the plurality of cells Cell1 to Cell8 belonging to the cell group 204 from the cell voltage and current detection circuit 202 and adds them to the total voltage TTLV. To calculate.

In addition, if the total voltage TTLV and the target voltage TGTTLV are different from each other, the controller 200 may have both ends and output terminals V + and V− of the cell group 204 in which a plurality of cells Cell1 to Cell8 are connected in series. The switching unit 206 is controlled to be connected.

The switching unit 206 includes a charge control switch (CFET) and a discharge control switch (DFET) connected in series between the cell group 204 and the output terminal V +, and the switching element controller 208. Here, the charge control switch (CFET) and the discharge control switch (DFET) are composed of a metal oxide field effect transistor (MOSFET), but the present invention is not limited thereto. The switching element controller 208 controls the charge control switch (CFET) and the discharge control switch (DFET) under the control of the controller 200. The configuration and operation of the switching unit 206 is a technique that is already common in the battery pack, and the detailed description thereof is omitted since it is already disclosed in Japanese Patent Laid-Open No. 10-321535.

The cell voltage and current detection circuit 202 detects voltages and currents for each of the cells Cell1 to Cell8 belonging to the cell group 204 and inputs them to the AD terminals of the controller 200. In particular, the sense resistor R is connected in series between the cell group 204 and the output terminal V−, and the cell voltage and current detection circuit 202 senses the current through the voltage across the sense resistor R.

The cell group 204 is composed of a plurality of chargeable cells Cell 1 to Cell 8 connected in series.

The operation of the multi-battery pack system according to the embodiment of the present invention will be described in more detail based on the above description.

3 is a flowchart illustrating a processing procedure in a master battery pack for calculating a target voltage according to a preferred embodiment of the present invention.

Referring to FIG. 3, the control unit of the master battery pack M checks whether a predetermined time has elapsed by an internal timer (not shown) (step 300). The predetermined time may be determined from a number 10 [msec] to a number [sec]. When the predetermined time elapses, the controller of the master battery pack M transmits a total voltage TTLV request message to each of the first to Nth slave battery packs S ₁ to S _N connected through a communication path (step 302). ).

When the first to Nth slave battery packs S ₁ to S _N transmit the full voltage TTLV response message according to the full voltage (TTLV) request message (YES in step 304), the master battery pack M The control unit detects its total voltage TTLV through its cell voltage and current detection circuit (step 306). This control is the total battery pack _{(M, S 1 ~ S N} ) the whole cell, and obtaining a total voltage (TTLV) pack for the _{(M, S 1 ~ S N} ) target voltage by using a full voltage for (TGTTLV (Step 308). In particular, the controller calculates a target voltage TTGTLV for all battery packs based on the minimum voltage for all battery packs in the charging mode, and the entire battery pack based on the maximum voltage for all battery packs in the discharge mode. The target voltage TGTTLV is calculated and stored in the memory unit.

When the target voltage TGTTLV is calculated, the controller of the master battery pack M configures the target voltage TGTTLV as a target voltage notification message to the first to Nth slave battery packs S ₁ to S _N. Transmit (step 310).

4 is a flowchart illustrating a processing procedure in which a slave battery pack communicates with a master battery pack to transmit its total voltage TTLV and to receive and store a target voltage TGTTLV. Since the processing procedures of the first to Nth slave battery packs S ₁ to S _N are the same, only the operation of one slave battery pack will be described below as an example.

Referring to FIG. 4, when the control unit of the slave battery pack receives the full voltage (TTLV) request message from the master battery pack M (YES in step 400), the control unit of the slave battery pack may transmit its total voltage (TTLV) through the cell voltage and current detection circuits. ) Is detected (step 402), and the detected total voltage TTLV is composed of a full voltage response message and sent to the master battery pack M (step 404).

Then, when the control unit of the slave battery pack receives the target voltage TGTTLV message from the master battery pack M (YES in step 406), the controller stores the received target voltage in a memory unit (not shown) (step 408).

3 and 4, the master battery pack M periodically generates a target voltage based on the total voltage TTLV for the entire battery packs M and S ₁ to S _N every time a predetermined time elapses. Therefore, if the total voltage for all the battery packs M, S ₁ to S _N varies according to discharge or charge transition, the target voltage also changes. As a result, the slave battery pack having the total voltage not corresponding to the target voltage may correspond to the target voltage over time.

The operation of the battery pack according to the target voltage will now be described with reference to the drawings.

First, the operation in the discharge mode will be described with reference to the flowchart of FIG. 6.

In the discharge mode (YES in step 600), the controller of the master or slave battery pack detects its total voltage TTLV through the cell voltage and current detection circuit (step 306), and detects the detected total voltage ( TTLV) and the previously stored target voltage TGTTLV are compared to check whether the two voltages correspond to each other (step 602). Here, corresponding to each other means that the total voltage TTLV is greater than or equal to the target voltage TGTTLV.

If the detected total voltage TTLV corresponds to the previously stored target voltage TGTTLV (YES in step 602), the controller of the master or slave battery pack switches to connect the output terminals V + and V- to the cell group. Control wealth (step 604). As a result, the charging voltage of the cells in the cell group is discharged through the output terminals V + and V-.

Operation in the charging mode will be described with reference to the flowchart of FIG. 7.

When the controller of the master or slave battery pack is in the charging mode (YES in step 700), the controller detects its total voltage TTLV through the cell voltage and current detection circuit (step 306), and detects the detected total voltage (TTLV). ) And the previously stored target voltage TGTTLV, it is checked whether the two voltages correspond to each other (step 702). Here, corresponding to each other means that the total voltage TTLV is less than or equal to the target voltage TGTTLV.

If the detected total voltage TTLV corresponds to the previously stored target voltage TGTTLV (YES in step 702), the controller of the master or slave battery pack switches to connect the output terminals V + and V- to the cell group. The wealth is controlled (step 704). As a result, a plurality of cells in the cell group are charged according to the power input through the output terminals V + and V-.

The operation according to the preferred embodiment of the present invention described above will now be described once again with reference to FIG.

Since the master battery pack M determines the target voltage based on the total voltage TTLV for the entire battery packs M and S ₁ to S _N each time a predetermined time elapses, the target battery pack M is set as the discharge or charging is performed. Is also variable. As the target voltage is varied according to the discharge or the charge, the slave battery packs connected in parallel for the discharge or the charge also vary.

Referring to FIG. 8A, the discharge mode will be described in detail. As the discharge is performed while only a predetermined battery pack A corresponding to the initial target voltage TGTTLV1 is connected to the output terminal, the battery pack A ) The overall voltage TTLV drops to.

In connection with the voltage drop of the predetermined battery pack A, the average of the total voltages TTLV with respect to the entire battery packs M and S ₁ to S _N is also lowered, and thus the total battery packs M and S ₁ to S are reduced. _The target voltages TGTTLV1-> TGTTLV2 calculated based on the total voltage TTLV of _N ) are also dropped. For example, if the average value of the total voltages (TTLV) of all the battery packs M and S ₁ to S _N obtained at a specific point of time decreases by more than a predetermined reference value than the average value of the total voltages calculated at the previous point of time, the current point in time The target voltage is lowered to a level between the average value of the total voltage TTLV and the maximum total voltage TTLV calculated at. However, the present invention is not limited thereto. Therefore, it will be apparent to those skilled in the art that various modifications such as periodically decreasing the target voltage level may be possible in a state where the falling level of the target voltage is previously determined.

As the target voltage drops in this manner, the battery pack B, which initially had a total voltage lower than the predetermined battery pack A, is also connected in parallel to the output terminal. As a result, the battery packs A and B discharge simultaneously. In addition, when the target voltage decreases from TGTTLV2 to TGTTLV3 over time, battery packs A, B, and C are actively connected to the output terminal at the same time to discharge.

As described above, according to the present invention, the target voltage TGTTLV is changed according to the voltage variation due to the discharge, and each of the plurality of battery packs is connected to each other according to the variation of the target voltage TGTTLV, and the output is according to the result. Perform the connection with the terminal.

Referring to FIG. 8B, the charging mode will be described in detail. As the charging is performed while only the predetermined battery pack D corresponding to the initial target voltage TGTTLV6 is connected to the output terminal, the predetermined battery pack ( The total voltage TTLV for D) rises.

The average value of the total voltage TTLV with respect to the entire battery packs M and S ₁ to S _N is also increased in association with the total voltage rise of the predetermined battery pack D, and thus the total battery packs M and S ₁ to. The target voltages TGTTLV4-> TGTTLV5, which are calculated based on the total voltage TTLV for S _N , are also raised. For example, if the average value of the total voltages (TTLV) of all the battery packs (M, S ₁ to S _N ) obtained at a specific point of time increases by more than a predetermined reference value than the average value of the total voltages (TTLV) calculated at the previous point of time, the lowest total value The target voltage is increased to a level between the voltage TTLV value and the average value of the total voltage TTLV calculated at the present time. However, the present invention is not limited thereto. Therefore, it will be apparent to those skilled in the art that various modifications such as periodically increasing the target voltage level may be possible in a state where the target voltage is increased in advance.

As the target voltage is increased in this manner, the battery pack E, which initially had a total voltage higher than the predetermined battery pack D, is also connected in parallel to the output terminal. Accordingly, the battery packs D and E charge simultaneously. In addition, as time passes and the target voltage rises again from TGTTLV5 to TGTTLV4, the battery packs D, E, and F are actively connected to the output terminal at the same time to charge.

As described above, according to the present invention, the target voltage TGTTLV is changed according to the voltage variation due to charging, and each of the plurality of battery packs is connected to each other according to the variation of the target voltage TGTTLV, and the output is according to the result. Perform the connection with the terminal.

Next, unintentional overcurrent in the control circuit included in the predetermined battery pack due to inter-package current during the process of newly connecting the battery pack to the power output terminal in the course of the charging or discharging operation of the multi-battery pack system. A configuration that can prevent a protective action from occurring is described.

First, the overcurrent protection operation performed by the battery pack control circuit will be described with reference to FIG. 2. Each battery pack actively performs parallel connection with the power output terminal according to the target voltage TGTTLV set by the master pack. Here, the connection with the power output terminal is made by simultaneously turning on each switch by applying an operating voltage to the gate terminals of the charge control switch (CFET) and the discharge control switch (DFET).

On the other hand, the controller 200 continuously monitors whether a charge current or a discharge current that exceeds a preset limit flows through the sense resistor R. If a charge current or a discharge current exceeding a limit flows through the sense resistor R during monitoring of the current, the controller 200 controls the switching unit 206 to selectively block the charge current or the discharge current. Specifically, the charge control switch (CFET) is turned off when the charge current exceeds the limit. When the discharge current exceeds the limit, the discharge control switch (DFET) is turned off.

By the way, in the case of a multi-battery pack system, the charging current beyond the limit may be supplied through an external charging device, but may be introduced from another battery pack in the process of connecting the battery pack to the power output terminal in parallel. Similarly, the discharge current exceeding the limit may be a current supplied to an external load, but may also be a current supplied to another battery pack while another battery pack is connected to the power output terminal in parallel.

In view of the above, each battery pack (master battery pack and slave battery pack) included in the multi-battery pack system according to the present invention has excessive charging current from other battery packs connected in parallel or other batteries connected in parallel. It includes a current buffer circuit capable of buffering the phenomenon that excessive discharge current is released to the pack side.

FIG. 9 is a circuit diagram schematically illustrating a configuration of a current buffer circuit added in a control circuit of each battery pack included in a multi-battery pack system. The circuit diagram shown in FIG. 9 omits the illustration of the controller 200, the switching element controller 208, the cell voltage and current detection circuit 202 and the cell group 204 in the circuit diagram shown in FIG. Note that the buffer circuit is mainly shown.

In Fig. 9, gate terminals of the charge control switch CFET and the discharge control switch DFET are connected to the switching element control unit 208 of Fig. 2, respectively. In addition, during the charge / discharge operation of the battery pack, the switching element controller 208 applies a gate driving voltage '-VGDR' to the gate terminals of the charge control switch (CFET) and the discharge control switch (DFET).

Referring to FIG. 9, the current buffer circuit includes a charge buffer circuit unit 901 for buffering a charging current flowing from another battery pack, and a discharge buffer circuit unit 1001 for buffering a discharge current flowing into another battery pack. .

The charging buffer circuit unit 901 senses a current (charge current) flowing through the sense resistor R and amplifies and outputs a voltage between both ends of the sense resistor R, a reference voltage PCHGV, and an amplifier. Compared to the amplification voltage output from the (902) and outputs a constant level voltage (CFETVS: source voltage of the CFET) under the condition that the amplification voltage is less than the reference voltage (PCHGV), if the amplification voltage is greater than the reference voltage (PCHGV) The comparator 903 reduces and outputs the CFETVS voltage level in proportion to the difference, and when the voltage level output from the comparator 903 decreases, the gate voltage of the charge control switch (CFET) is controlled to control the on-resistance of the switch. And a half on switch 903 that limits the charging current flowing through the charge control switch (CFET).

In the present invention, the voltage level PCHGV may be designed and applied to a separate constant voltage output circuit, or may be applied through the controller by embedding the constant voltage output circuit in the controller (see 200 of FIG. 2). When a voltage signal lower than the CFETVS voltage level is output through the comparator 903, the voltage signal is referred to as a 'half on operating voltage' for convenience of description.

FIG. 10A is a graph showing the voltage level output from the amplifier 902 and FIG. 10B is a graph showing the voltage level output through the comparator 903. Referring to FIGS. 10A and 10B, the operation of the charge buffer circuit 901 will be described in more detail. The amplifier 902 senses a current flowing through the sense resistor R to amplify a voltage across the sense resistor R. To print. At this time, the amplification voltage is proportional to the magnitude of the current flowing through the sense resistor (R) as shown in FIG. The amplified voltage output through the amplifier 902 is applied to one terminal (+) of the comparator 903 and the reference voltage level PCHGV is applied to the other terminal (−) of the comparator 903. The comparator 903 then outputs a constant voltage level CFETVS under the condition that the amplification voltage is smaller than the PCHGV, compared to the amplification voltage and the reference voltage level PCHGV input through the amplifier 902, and in FIG. 10B under the condition where the amplification voltage is greater than the PCHGV. As shown in the drawing, the half-on operating voltage is reduced in proportion to the 'amplification voltage-PCHGV' based on the constant voltage level CFETVS. When the half-on operation voltage is output through the comparator 903, a current flows through the transistors constituting the half-on switch 904 to increase the gate voltage of the charge control switch (CFET). As a result, the gate-source voltage of the charge control switch (CFET) is reduced to decrease the concentration of minority carriers in the depletion layer, thereby increasing the on resistance of the switch, thereby limiting the charging current flowing into the battery pack. When the charging current is limited in this manner, the voltage across the sense resistor R is decreased, so that the amplification voltage output through the amplifier 902 is reduced. The comparator 903 has a lower level than the CFETVS unless the amplification voltage is smaller than the PCHGV. Since the voltage is output, the on-resistance rising state of the charge control switch (CFET) is maintained by the operation of the half-on switch 904, so that the constant current control of the charging current is realized by negative feedback control. This constant current control process is repeated until the amplified voltage level output through the amplifier 902 is smaller than PCHGV.

On the other hand, the above-described charging buffer circuit unit 901 is preferably operated when connected in parallel with the power output terminal to perform the discharge operation in the multi-battery pack system. To this end, the charge buffer circuit 901 further includes a switch (S1) for selectively locking the current input terminal of the amplifier 902. The switch S1 is turned on by the controller when the battery pack is connected in parallel to the power output terminal for the discharge operation.

Next, the configuration and operation of the discharge buffer circuit unit 1001 will be described. Referring to FIG. 9, the discharge buffer circuit unit 1001 senses a current (discharge current) flowing through the sense resistor R and amplifies and outputs a voltage between both ends of the sense resistor R, and a reference voltage. The amplification voltage output from the SSTV and the amplifier 1002 is compared to output a constant level voltage (DFETVS: source voltage of the DFET) under the condition that the amplification voltage is smaller than the reference voltage SSTV. If larger than SSTV, the comparator 1003 reduces and outputs the voltage level in proportion to the voltage difference, and when the voltage level output from the comparator 1003 is decreased, the gate voltage of the charge control switch (DFET) is controlled to control the internal resistance of the switch. And a half on switch 1004 for limiting the discharge current flowing through the charge control switch (DFET).

In the present invention, the voltage level SSTV may be designed and applied to the constant voltage output circuit, or may be applied through the controller by embedding the constant voltage output circuit in the controller (see 200 of FIG. 2). When a voltage signal lower than the DFETVS voltage level is output through the comparator 1003, the voltage signal is referred to as a 'half on operating voltage' for convenience of description.

FIG. 11A is a graph showing the voltage level output from the amplifier 1002 and FIG. 11B is a graph showing the voltage level output through the comparator 1003. Referring to FIGS. 11A and 11B, the operation of the discharge buffer circuit unit 1001 will be described in more detail. The amplifier 1002 senses a current flowing through the sense resistor R to amplify a voltage at both ends of the sense resistor R. FIG. do. At this time, the amplification voltage is proportional to the magnitude of the current flowing through the sense resistor (R) as shown in FIG. The amplified voltage output through the amplifier 1002 is applied to one terminal (+) of the comparator 1003 and the reference voltage level SSTV is applied to the other terminal (−) of the comparator 903. The comparator 1003 then outputs a constant voltage level DFETVS under the condition that the amplification voltage is smaller than that of the SSTV, and compares the amplification voltage inputted through the amplifier 1002 with the reference voltage level SSTV. As shown in the drawing, the half-on operating voltage of which the level is reduced is proportional to the 'amplification voltage -SSTV' based on the constant voltage level DFETVS. When the voltage level output through the comparator 903 drops, a current flows through the transistors constituting the half-on switch 1004, thereby increasing the gate voltage of the discharge control switch (DFET). As a result, the gate-source voltage of the discharge control switch (DFET) is reduced to decrease the concentration of minority carriers in the depletion layer, thereby increasing the on-resistance of the switch. As a result, the on-resistance of the discharge control switch (DFET) is raised to remove the battery from the battery pack. The discharge current discharged is limited. When the discharge current is limited in this manner, the voltage across the sense resistor R is reduced, thereby reducing the amplified voltage output through the amplifier 1002. However, since the half-on operation voltage is output from the comparator 1003 as long as the amplification voltage is not smaller than the SSTV, the on-resistance rising state of the discharge control switch (DFET) is maintained by the operation of the half-on switch 1004, thereby reducing the discharge current. The constant current control state is maintained. Since the constant current control process is repeated until the amplified voltage level output through the amplifier 1002 becomes smaller than the SSTV, the discharge buffer circuit unit 1001 maintains a constant magnitude of the discharge current by the negative feedback control.

On the other hand, the above-described discharge buffer circuit unit 1001 is preferably operated when the battery pack is connected in parallel with the power output terminal to perform the charging operation. To this end, the discharge buffer circuit unit 1001 further includes a switch S2 for selectively canceling the current input terminal of the amplifier 1002. The switch S2 is turned on by the controller when the battery pack is connected in parallel to the power output terminal for the charging operation.

12 is a circuit diagram showing the configuration of a charge buffer circuit portion 1101 and a discharge buffer circuit portion 1201 according to another embodiment of the present invention. Referring to the drawings, the basic configuration of the charge buffer circuit portion 1101 and the discharge buffer circuit portion 1201 is the same as shown in Figure 9, the output terminal and the discharge buffer of the comparator 1103 provided in the charge buffer circuit portion 1101 The output terminal of the comparator 1203 provided in the circuit unit 1201 is commonly connected to the driving terminal (base terminal of the transistor) of the half on switch 1400. The source terminal of the charge control switch (CFET) and the source terminal of the discharge control switch (DFET) are connected in common, and the gate driving voltage (-VGDR) of each switch is applied in common.

According to the circuit configuration as described above, when the battery pack is connected in parallel with the power output terminal for the discharge operation, the switch (S1) is turned on by the control unit, the charge buffer circuit unit 1101 starts operation, the battery pack is charged operation For this purpose, when connected in parallel with the power output terminal, the switch S2 is turned on by the control unit so that the discharge buffer circuit unit 1201 starts operation.

On the other hand, when the charge current or the discharge current flowing through the sense resistor (R) exceeds the limit, the gate voltages of the charge control switch (CFET) and the discharge control switch (DFET) are simultaneously raised by the half on switch 1300. As a result, the gate-source voltage of each switch drops to increase the on-resistance of each switch, and the charging current or the discharge current is controlled to the constant current by the negative feedback control substantially as described with reference to FIG. 9. do.

When the current buffer circuit described above is included in each battery pack included in the multi-battery pack system, the battery pack is excessively charged by the current between the packs in the process of being connected in parallel with the power output terminal to perform the charging or discharging operation. Alternatively, even if a discharge current is induced, not only an unintended overcurrent protection function can be prevented from operating, but an excessive current can effectively prevent damage to a battery cell included in a battery pack.

Meanwhile, in the above-described embodiment, the charge control switch (CFET) and the discharge control switch (DFET) may be configured using a P channel MOSFET or an N channel MOSFET. However, when a charge control switch (CFET) and a discharge control switch (DFET) are configured using an N-channel MOSFET, a boost circuit such as a charge pump is required because the gate voltage must be kept higher than the source voltage. Such boost circuits are well known in the art to which the present invention pertains, and thus detailed descriptions thereof will be omitted.

Next, the function of the current buffer circuit will be described in more detail by way of example.

In the multi-battery pack system, when the discharge from the 25-volt slave battery pack is performed, the 28-volt slave battery pack is newly connected in parallel according to the target voltage setting of the master battery pack, and the parallel connection of the 25-volt slave battery pack is released. Suppose you have a situation to do.

In such a case, it is not preferable to cut off the supply of the discharge current to the load in order to switch the discharge target battery pack, so that the 28V slave battery pack is connected in parallel to the power supply output terminal while the 25V slave battery pack is connected in parallel. This allows overcurrent to flow from the 28V slave battery pack to the 25V slave battery pack. However, in the discharge mode, since the charging buffer circuit unit included in the 25V slave battery pack is turned on, the overcurrent is limited by the charging buffer circuit unit even when an overcurrent (a kind of charging current) flows into the 25V slave battery pack. This prevents unintentional overcurrent protection on 25V slave battery packs. When the 25V slave battery pack is turned off while the overcurrent is limited by the charge buffer circuit of the 25V slave battery pack, the 28V slave battery pack is discharged from the 25V slave battery pack without disconnecting the load current. You can switch to

Next, while the 24V slave battery pack is being charged in the multi-battery pack system, the 22V slave battery packs are newly connected in parallel according to the target voltage setting of the master battery pack, and the charge is performed. Suppose you need to suspend charging for.

In such a case, it is not preferable to cut off the charging current supply for switching the battery pack to be charged. Therefore, the 22V slave battery pack is connected in parallel to the power supply output terminal while the 24V slave battery pack is connected in parallel. This allows overcurrent to flow from the 24V slave battery pack to the 22V slave battery pack. However, in the charging mode, since the discharge buffer circuit part of the 24V slave battery pack is turned on, the overcurrent is limited by the discharge buffer circuit part even when an overcurrent (a kind of discharge current) flows from the 24V slave battery pack to the 22V slave battery pack. do. This prevents unintentional overcurrent protection from operating in a 24V slave battery pack. When the 24V slave battery pack is turned off while the overcurrent is limited by the discharge buffer circuit of the 24V slave battery pack, the 22V slave battery pack can be charged from the 24V slave battery pack without shutting off the charge current. You can switch to

Embodiments of the present invention described above include a computer readable medium including program instructions for performing various computer-implemented operations. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination. The program instructions on the media may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well-known and available to those having skill in the computer software arts.

According to an aspect of the present invention, the present invention has the effect of enabling the control of a large number of slave battery packs without increasing the load of the master battery pack of the multi-battery pack system.

According to another aspect of the present invention, the present invention has the advantage that can provide the flexibility of mounting or detaching the slave battery pack as the master battery pack does not directly control the slave battery pack.

According to another aspect of the present invention, according to the target voltage setting of the master battery pack, the unintended overcurrent protection function is operated by the inter-package current exceeding the limit in the process of connecting each battery pack in parallel for charging or discharging Can be prevented and the battery cells included in the battery pack can be prevented from being damaged.

As described above, the present invention has been described by way of limited embodiments and drawings, but the present invention is not limited to the above-described embodiments, which can be variously modified and modified by those skilled in the art to which the present invention pertains. Modifications are possible.

Therefore, the spirit of the present invention should be grasped only by the claims described below, and all equivalent or equivalent modifications thereof will belong to the scope of the present invention.

Claims (31)

In a battery pack having a plurality of cells, A cell group consisting of a plurality of cells connected in series; A voltage detection circuit which senses a voltage of each of the plurality of cells and outputs the full voltage; A switching element for turning on or off a connection between the cell group and an output terminal; Receiving a total voltage of at least one slave battery pack and a total voltage from the voltage detection circuit, calculating a target voltage, transmitting the calculated target voltage to each slave battery pack, and calculating the calculated target voltage and its total voltage. A control unit which compares and controls the switching element according to the comparison result; And When the charge current or the discharge current of the battery pack is sensed and the sensed current value exceeds the threshold, the operation of raising the on-resistance of the switching element is performed by negative feedback control to generate the charge current or the discharge current as a constant current. A battery pack comprising: a current buffer circuit for limiting. The method of claim 1, The target voltage calculates target voltages for all battery packs based on minimum voltages for all battery packs in the charging mode. The battery pack, characterized in that for calculating the target voltage for all battery packs based on the maximum voltage for all battery packs in the discharge mode. The method of claim 2, In the charging mode, the target voltage rises step by step over time, In the discharge mode, the battery pack, characterized in that the target voltage drops in stages as time passes. The method of claim 1, The switching device, A charge control switch connecting the cell group and the output terminal for charging the cell group, and a discharge control switch connecting the cell group and the output terminal for discharging the cell group, And the control unit selectively controls the charge control switch and the discharge control switch according to a charge mode and a discharge mode. The method of claim 1, The control unit, And periodically receiving the total voltage of the at least one slave battery pack and the total voltage from the voltage detection circuit to calculate the target voltage. The method of claim 1, The current buffer circuit, An amplifier outputting an amplified voltage in proportion to the battery pack current; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operating voltage and increase an on resistance of the switching device. The method of claim 6, And the comparator outputs, as a half-on operating voltage, a voltage signal dropped from a predetermined constant voltage level in proportion to the difference between the amplification voltage and the reference voltage. The method of claim 6, The switching element is a field effect transistor, The half-on switch receives the half-on operating voltage to drop the drain-source voltage of the field-effect transistor to decrease the concentration of minority carriers in the depletion layer, thereby increasing the on-resistance of the field-effect transistor. . 5. The method of claim 4, The current buffer circuit includes a charge buffer circuit portion and a discharge buffer circuit portion, The charging buffer circuit unit, An amplifier for outputting an amplification voltage in proportion to the charging current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to increase the on resistance of a charge control switch by receiving the half on operation voltage. The discharge buffer circuit unit, An amplifier for outputting an amplified voltage in proportion to the discharge current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operation voltage and increase an on resistance of a discharge control switch. In a battery pack having a plurality of cells, A cell group consisting of a plurality of cells connected in series; A voltage detection circuit which senses a voltage of each of the plurality of cells and outputs the full voltage; A switching element for connecting or disconnecting between the cell group and the output terminal; In response to a request of a master battery pack, a total voltage from the voltage detection circuit is received and transmitted to the master battery pack, a target voltage is received from the master battery pack, and a total voltage thereof is compared with the master battery pack. A control unit for controlling the switching element; And Current buffer for limiting the charging current or the discharge current to a constant current by performing the operation of increasing the on-resistance of the switching element by the negative feedback control when the sensed current value of the battery pack is sensed exceeds the limit value by the negative feedback control Battery pack comprising a; circuit. The method of claim 10, The switching unit, A charge control switch connecting the cell group and the output terminal for charging the cell group, and a discharge control switch connecting the cell group and the output terminal for discharging the cell group, And the control unit selectively controls the charge control switch and the discharge control switch according to a charge mode and a discharge mode. The method of claim 10, The current buffer circuit, An amplifier outputting an amplified voltage in proportion to the battery pack current; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operating voltage and increase an on resistance of the switching device. The method of claim 12, And the comparator outputs, as a half-on operating voltage, a voltage signal dropped from a predetermined constant voltage level in proportion to the difference between the amplification voltage and the reference voltage. The method of claim 12, The switching element is a field effect transistor, The half-on switch receives the half-on operating voltage to drop the drain-source voltage of the field-effect transistor to decrease the concentration of minority carriers in the depletion layer, thereby increasing the on-resistance of the field-effect transistor. . The method of claim 11, The current buffer circuit includes a charge buffer circuit portion and a discharge buffer circuit portion, The charging buffer circuit unit, An amplifier for outputting an amplification voltage in proportion to the charging current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to increase the on resistance of a charge control switch by receiving the half on operation voltage. The discharge buffer circuit unit, An amplifier for outputting an amplified voltage in proportion to the discharge current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operation voltage and increase an on resistance of a discharge control switch. In a multi-battery pack system comprising a master battery pack and a plurality of slave battery packs, The master battery pack receives a total voltage from each slave battery pack every predetermined time to calculate a target voltage using its total voltage and the total voltages of all slave battery packs, and calculates the calculated target voltage for each slave battery pack. And the output voltage and its cell group are connected or disconnected by controlling the switching element according to the result. The slave battery pack transmits its entire voltage to a master battery pack at the request of the master battery pack, receives a target voltage from the master battery pack, compares the target voltage with its total voltage, and as a result, Control the switching element according to the connection or disconnection between the output terminal and its own cell group, Each battery pack senses its own charging current or discharging current to increase the on-resistance of the switching element by a negative feedback control when the sensed current value exceeds a threshold, thereby converting the charging current or the discharging current into a constant current. Limiting current buffer circuit; multi-battery pack system comprising a. The method of claim 16, The target voltage calculates target voltages for all battery packs based on minimum voltages for all battery packs in the charging mode. In the discharge mode, the multi-battery pack system for calculating a target voltage for all battery packs based on the maximum voltage for all battery packs. The method of claim 17, In the charging mode, the target voltage rises step by step over time, In the discharge mode, the multi-battery pack system, characterized in that the target voltage drops in stages as time passes. The method of claim 16, The current buffer circuit, An amplifier outputting an amplified voltage in proportion to the battery pack current; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operating voltage and increase an on resistance of the switching device. The method of claim 19, And the comparator outputs, as a half-on operating voltage, a voltage signal dropped from a predetermined constant voltage level in proportion to the difference between the amplification voltage and the reference voltage. The method of claim 19, The switching element is a field effect transistor, The half-on switch receives the half-on operating voltage to drop the drain-source voltage of the field-effect transistor to decrease the concentration of minority carriers in the depletion layer, thereby increasing the on-resistance of the field-effect transistor. Pack system. The method of claim 16, The switching element includes a charge control switch for opening and closing the charge current and a discharge control switch for opening and closing the discharge current, The current buffer circuit includes a charge buffer circuit portion and a discharge buffer circuit portion, The charging buffer circuit unit, An amplifier for outputting an amplification voltage in proportion to the charging current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to increase the on resistance of a charge control switch by receiving the half on operation voltage. The discharge buffer circuit unit, An amplifier for outputting an amplified voltage in proportion to the discharge current of the battery pack; A comparator comparing the amplification voltage with a reference voltage and outputting a half-on operation voltage when the amplification voltage is greater than a reference voltage; And And a half on switch configured to receive the half on operating voltage and increase an on resistance of discharge control switching. In the control method of a multi-battery pack system comprising a master battery pack and at least one slave battery pack in communication therewith, Receiving, by the master battery pack, a total voltage of the battery pack from each slave battery pack every predetermined time, calculating a target voltage based on its total voltage and the provided total voltage, and transmitting the target voltage to each slave battery pack; And And comparing, by the master and slave battery packs, the target voltage with its total voltage, and controlling the switching element according to the result, thereby connecting or disconnecting an output terminal and its cell group. Each battery pack senses charging current or discharging current to increase the on-resistance of the switching element when the sensed current value exceeds a threshold value by performing negative feedback control to control the charging current or discharging current to a constant current. Controlling the multi-battery pack system. 24. The method of claim 23, The target voltage calculates target voltages for all battery packs based on minimum voltages for all battery packs in the charging mode. The control method of the multi-battery pack system, characterized in that for calculating the target voltage for all battery packs based on the maximum voltage for all battery packs in the discharge mode. The method of claim 24, In the charging mode, the target voltage rises step by step over time, In the discharge mode, the control method of the multi-battery pack system, characterized in that the target voltage falls in stages as time passes. In the control method of the master battery pack that can communicate with at least one slave battery pack, Receiving the total voltage of the battery pack from each slave battery pack every predetermined time and detecting the total voltage of the master battery pack; Calculating a target voltage by using the total voltage of each of the received slave battery packs and the detected voltage of the master battery pack; And Transmitting the calculated target voltage to each slave battery pack, comparing the target voltage with its total voltage, and controlling a switching element according to the result, thereby connecting or disconnecting an output terminal and its cell group; and and, The master battery pack senses the charging current or the discharge current to increase the on-resistance of the switching element when the sensed current value exceeds the limit value by controlling the negative feedback to control the charging current or the discharge current as a constant current. The master battery pack control method characterized in that the step; The method of claim 26, The target voltage calculates target voltages for all battery packs based on minimum voltages for all battery packs in the charging mode. The master battery pack control method, characterized in that for calculating the target voltage for all battery packs based on the maximum voltage for all battery packs in the discharge mode. The method of claim 27, In the charging mode, the target voltage rises step by step over time, In the discharge mode, the master battery pack control method, characterized in that the target voltage falls in stages as time passes. 1. A method of controlling a slave battery pack in a multi-battery pack system including a plurality of slave battery packs connected to communicate with a master battery pack that calculates a target voltage based on the total voltage of all battery packs. Detecting a total voltage at a request of the master battery pack every predetermined time and transmitting the total voltage to the master battery pack; Receiving the target voltage from the master battery pack; And Comparing the target voltage with its total voltage and controlling a switching element according to the result, thereby connecting or disconnecting an output terminal and its own cell group.  The slave battery pack senses the charging current or the discharging current to increase the on-resistance of the switching element when the sensed current value exceeds a threshold value by controlling the negative feedback to control the charging current or the discharging current as a constant current. Slave battery pack control method characterized in that the; proceeds. 30. The method of claim 29, The target voltage calculates target voltages for all battery packs based on minimum voltages for all battery packs in the charging mode. The slave battery pack control method, characterized in that for calculating the target voltage for all battery packs based on the maximum voltage for all battery packs in the discharge mode. 31. The method of claim 30, In the charging mode, the target voltage rises step by step over time, In the discharge mode, the slave battery pack control method, characterized in that the target voltage falls in stages as time passes.

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