KR101064897B1 - Vertical laminating element with sapphire layer and the method of production of same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical light emitting device and a method of manufacturing the same. In particular, a via hole penetrating to the bottom of the sapphire layer and a region of the semiconductor layer is formed, and then a metal layer is laminated to provide excellent thermal and chemical properties of the sapphire layer used in the horizontal light emitting device. The present invention relates to a vertical light emitting device having a sapphire layer capable of obtaining both stability and structural stability by the vertical light emitting device method and a method of manufacturing the same.

Vertical light emitting device, sapphire layer, via hole, metal layer

Description

Vertical laminating element with sapphire layer and manufacturing method thereof {Vertical laminating element with sapphire layer and the method of production of same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical light emitting device and a method of manufacturing the same. In particular, a via hole penetrating to the bottom of the sapphire layer and a region of the semiconductor layer is formed, and then a metal layer is laminated to provide excellent thermal and chemical properties of the sapphire layer used in the horizontal light emitting device. The present invention relates to a vertical light emitting device having a sapphire layer capable of obtaining both stability and structural stability by the vertical light emitting device method and a method of manufacturing the same.

In general, it is widely known that a light emitting diode (LED) is a semiconductor device that converts current into light.

The wavelength of light emitted by such a light emitting device depends on the properties of the semiconductor material used to manufacture the light emitting device.

This is because the wavelength of the emitted light depends on the band gap characteristics of the semiconductor material, which exhibits a valence band, an energy difference between the electrons and the conduction band electrons.

In particular, gallium nitride compound semiconductors (Gallium Nitride: GaN) have received a lot of attention.

This is because the GaN can be combined with other elements to produce a semiconductor layer that emits green, blue or white light.

Such GaN-based light emitting devices are generally stacked on a sapphire (Al 2 O 3) layer (or sapphire wafer).

This is because the sapphire layer is available in a size suitable for mass production of GaN-based devices, supports relatively high quality GaN thin film growth, and has a wide range of temperature processing capabilities.

In addition, the sapphire layer is chemically or thermally stable, has a high melting point to enable a high temperature manufacturing process, has a high binding energy (122.4 kcal) and a dielectric constant.

When using such a sapphire layer can be adopted a horizontal device method.

This will be described with reference to FIG. 1, which conceptually illustrates the light emitting device 10 of the horizontal device type.

In the horizontal light emitting device 10, a semiconductor layer S is stacked on the sapphire layer 11.

In this case, the semiconductor layer S is an n-GaN layer 12 stacked on the sapphire layer 11 and an active region 13 and the active layer stacked on the n-GaN layer 12. And a p-GaN layer 14 stacked on (13).

In this case, the transparent electrode layer 15 and the p electrode P are stacked on the p-GaN layer 14.

In addition, n electrodes N are stacked on one side of the n-GaN layer 12.

At this time, the insulating layer 17 is stacked on the exposed portion between the p electrode (P) and the n electrode (N).

In other words, in the horizontal light emitting device 10, all the electrodes are located at the top surface.

The conventional horizontal light emitting device 10 can manufacture a chip in the simplest form as described above, but the light emitting area is small and there are problems in current spreading and heat transfer.

In order to solve this problem, a vertical light emitting device 20 has been proposed.

The vertical light emitting device 20 will be described with reference to FIG. 2, which illustrates the concept of the vertical light emitting device 20.

As illustrated in the vertical light emitting device 20, a p-GaN layer 22 is stacked on the conductive substrate 21.

An active layer 23 is stacked on the p-GaN layer 22, and an n-GaN layer 24 is stacked thereon.

An n electrode N may be stacked on the n-GaN layer 24, and a transparent electrode 25 may be stacked on the n electrode N.

Since the vertical light emitting device 20 can increase the number of chips, the light emitting area is increased and the current spreading is high.

A method S10 of manufacturing the vertical light emitting device 20 will be described with reference to FIGS. 3A to 3F.

3A to 3F are conceptual views illustrating the concept of the method, which will be described based on the chip process, and will be described with reference to the vertical light emitting device 30 having a structure slightly different from that described above.

As shown, the first step S11 is a semiconductor layer 32 stacked on the sapphire layer 31, for example, an n-GaN layer and a p-GaN layer and an active layer disposed therebetween, as described above. Is etched to form an etching portion 33 (see FIG. 3A).

Thereafter, a second step of laminating an ohmic metal 34a and a reflecting metal 34b on the bottom surface of the semiconductor layer 32 and a bonding metal 34c on the bottom surface thereof ( S12) (see FIG. 3B).

Meanwhile, a third step S13 of separately depositing the bonding metal 36 on the silicon substrate 35 is performed. (See Figure 3c)

Thereafter, a fourth step S14 of bonding the bonding metal 34c stacked on the bottom surface of the sapphire layer 31 and the bonding metal 36 stacked on the silicon substrate 35 is performed. (See FIG. 3D)

Then, a fifth step S15 of removing the sapphire layer 31 by the laser lift off (LLO) method is performed (see FIG. 3E).

Finally, in step S16, the electrode 37 is stacked in the place where the sapphire layer 31 is removed. (See Figure 3f)

The conventional method of manufacturing a vertical light emitting device has the following problems.

That is, when the fifth step S15 of removing the sapphire layer 31 by the laser lift off (LLO) method is performed, the wafer due to the difference in thermal expansion coefficient between the sapphire layer 31 and GaN is formed. Warping occurs.

For example, the coefficient of thermal expansion (ppm / K) of the sapphire layer 31 is 7.5, whereas the coefficient of thermal expansion (ppm / K) of the silicon substrate 35 is 5.6. Phenomenon occurs.

In addition, in the conventional case, the yield may be reduced according to the bonding process (fourth step) and the electrical short may be caused by the Si wafer sawing process, and a high production cost may be generated due to the complicated process and the required expensive equipment.

The present invention is to solve the above problems.

First, by adopting the vertical light emitting device method of forming a via hole penetrating to the bottom of the sapphire layer and one region of the semiconductor layer and then stacking the metal layer, it takes thermal or chemical stability which is an advantage of the horizontal light emitting device method.

Second, it can take a wide light emitting area and high current diffusion, which are advantages of the vertical light emitting device type, and solve the high production cost due to expensive LLO and bonding equipment, which is a cause of lowered yield.

Third, it is an object of the present invention to provide a vertical light emitting device having a low-cost sapphire layer without the warping phenomenon and yield reduction by removing the laser lift off and bonding processes as described above, and a method of manufacturing the same.

The present invention for achieving the above object is a vertical light emitting device comprising a sapphire layer, a semiconductor layer stacked on the sapphire layer and an electrode stacked on the semiconductor layer, via holes and metal layers formed on the bottom surface of the sapphire layer The via hole may be formed to penetrate from one area of the bottom surface of the sapphire layer to one area of the semiconductor layer, and the metal layer may include a sapphire layer stacked on the bottom of the sapphire layer and the via hole. have.

A method of manufacturing a vertical light emitting device comprising a sapphire layer, a semiconductor layer stacked on the sapphire layer and an electrode stacked on the semiconductor layer,

A via hole is formed in a bottom surface of the sapphire layer, wherein the via hole is formed to penetrate to one region of the semiconductor layer, and a vertical type having a sapphire layer including laminating a metal layer on the bottom surface of the sapphire layer and the via hole. There is another feature of the manufacturing method of the light emitting device.

In this case, the via hole may be formed by laser irradiation.

In addition, the silicon layer may remove the epoxy layer by acetone.

According to the present invention as described above, first, by adopting a vertical light emitting device method of forming a via hole penetrating to the bottom of the sapphire layer and one region of the semiconductor layer and then stacking a metal layer, thermal or chemical stability which is an advantage of the horizontal light emitting device method At the same time it has the effect of taking

There is an effect that can take a wide light emitting area and high current diffusion, which is an advantage of the vertical light emitting device method,

By removing the laser lift off process described above, there is an effect of preventing warpage or electrical short of the wafer.

Hereinafter, with reference to the accompanying drawings and embodiments will be described in detail with respect to the present invention.

4A to 4F are conceptual diagrams illustrating the method of the present invention step by step.

5 is a conceptual diagram illustrating a cross section of a vertical light emitting device according to the present invention.

Hereinafter, the vertical light emitting device 100 and the manufacturing method S100 of the present invention will be described for each embodiment.

Example 1

In the present embodiment, a method (S100) of manufacturing a vertical light emitting device will be described with reference to FIGS. 4D and 4E.

The method S100 includes a sapphire layer 110, a semiconductor layer S stacked on the sapphire layer 110, and a vertical light emitting device 100 including an electrode 150 stacked on the semiconductor layer S. It is a manufacturing method.

In this case, the via hole V is formed on the bottom surface of the sapphire layer 110, and the via hole V is formed to penetrate to one region of the semiconductor layer S (S150). )

In this case, the via hole V may be formed by laser irradiation.

That is, the bottom surface of the sapphire layer 110 is irradiated with a laser to penetrate the bottom surface of the sapphire layer 110 and then penetrate to one region of the semiconductor layer S stacked on the sapphire layer 110.

Thereafter, a step (S160) of laminating the metal layer 180 on the bottom surface of the sapphire layer 110 and the via hole V (see FIG. 4E).

The metal layer 180 functions as an electrode.

By such a method, the laser lift off process (see FIG. 3e) and the wafer bonding process (see FIG. 3d), which are conventionally applied, can be removed, thereby preventing warping and yield reduction of the wafer as described above.

Meanwhile, as described above, the present invention includes forming the via hole V (S150) and stacking the metal layer 180 (S160).

Therefore, in the case of including the steps (S150, S160) of the present invention, it is a matter of course that all the methods for performing the semiconductor layer lamination process, the electrode forming process, and other various processes belong to the scope of the present invention.

Meanwhile, in the present embodiment, the semiconductor layer S is described as being stacked on the sapphire layer 110. The semiconductor layer S is disposed on the sapphire layer 110 to emit light by any method. All stacked materials should be interpreted to mean that they belong to the scope of the present invention.

In addition, the semiconductor layer S may include an n-GaN layer 120 and a p-GaN layer 140 and an active layer 130 disposed therebetween.

However, as long as the semiconductor layer S emits light, it is a matter of course that all of the other configurations are included in the scope of the present invention.

This is the same in the embodiments to be described later, and overlapping description is omitted.

Example 2

In the present embodiment, the overall process of manufacturing the vertical light emitting device 100 including the steps S150 and S160 will be described with reference to FIGS. 4A to 4F.

The method to be described in this embodiment includes the steps S150 and S160, and reference numerals for the method use the same reference numerals as S100.

The method S100 includes a sapphire layer 110, a semiconductor layer S stacked on the sapphire layer 110, and a vertical light emitting device 100 including an electrode 150 stacked on the semiconductor layer S. It is as described for the manufacturing method of.

In this case, the step S110 of stacking the electrode 150 on the semiconductor layer S is first performed (see FIG. 4A).

Thereafter, a step (S130) of laminating the silicon layer 170 on the electrode 150 is performed.

The silicon layer 170 serves as a support member of the vertical light emitting device 100 of the present invention.

In this case, the epoxy layer 160 may be stacked on the electrode 150, and then the silicon layer 170 may be stacked on the epoxy layer 160 (see FIG. 4B).

Thereafter, a via hole V is formed in a bottom surface of the sapphire layer 110, and the via hole V is formed to penetrate to one region of the semiconductor layer S (S150). Reference)

In this case, as described above, the via hole V may be formed by laser irradiation.

In the present embodiment, the via hole V has a trapezoidal shape in which the width thereof decreases toward the upper side (silicon layer 170 direction).

However, the via hole V is intended to allow the metal layer 180 to be described later to be stacked to be in contact with the semiconductor layer S so that the via hole V can function as an electrode. Naturally, even if it has a different shape, it belongs to the scope of the present invention.

After the step S150, the step S160 of laminating the metal layer 180 on the bottom surface of the sapphire layer 110 and the via hole V is performed (see FIG. 4E).

The metal layer 180 functions as an electrode as described above.

In the present invention, the material of the metal layer 180 is not limited, and if it is possible to electrically conduct electricity with the semiconductor layer S, it is natural that the present invention falls within the scope of the present invention.

Thereafter, the step S170 of removing the silicon layer 170 is included (see FIG. 4F).

On the other hand, it is also possible to further include the step (S120) of stacking the transparent electrode layer 190 between the electrode 150 and the epoxy layer 160 (see Figure 4a).

In the present invention, the material of the transparent electrode layer 190 is not limited. For example, ITO may be used, and even if the transparent electrode layer 190 uses a different material, it is natural that all of the materials fall within the scope of the present invention.

On the other hand, after the step of stacking the silicon layer 170 (S130), it is also possible to further include a step (S140) to reduce the thickness by grinding the sapphire layer (110).

This is to facilitate via hole (V) processing using a laser in the sapphire layer 110 to be described later.

In the removing of the silicon layer 170 (S170), the silicon layer 170 may be removed by removing the epoxy layer 160 by acetone.

In the case of the conventional vertical light emitting device, as described above, the sapphire layer was removed using a laser lift off method (see FIG. 3E).

However, when the laser is incident, there is a problem in that the GaN layer is decomposed into metal Ga and gaseous nitrogen (N) by irradiating a laser.

However, according to the present invention as described above, it is possible to solve the above-mentioned conventional problems by not using a laser.

Meanwhile, as described above, the semiconductor layer S may include the n-GaN layer 120 and the p-GaN layer 140 and the active layer 130 disposed therebetween.

The present invention as described above has the following effects.

Conventionally, a laser lift off process (refer to FIG. 3e) is performed, which causes a problem in that the wafer is bent due to stress due to a difference in thermal expansion coefficient between the sapphire layer 31 and GaN, resulting in a low yield.

However, in the case of the present invention, the laser lift off process is not required, and thus, the above-described problem can be solved.

In addition, in the conventional case, the yield may be reduced according to the bonding process (see FIG. 3D) and the electrical short may be caused by the Si wafer sawing process, and a high production cost may be incurred by the complicated process and the required expensive equipment.

As described above, however, the laser lift off process (see FIG. 3e) and the metal bonding process (see FIG. 3d) are not performed in the present invention, which may result in an increase in yield and a low production cost.

In addition, the use of the sapphire layer 110 can achieve thermal and chemical stability, and can increase the light extraction efficiency by utilizing the mesa structure of the substrate.

This effect will be described again in the following examples.

Example 3

In the present embodiment, a vertical light emitting device 100 manufactured by the method (S100) of the present invention described above will be described with reference to FIG.

The vertical light emitting device 100 of the present invention already includes a sapphire layer 110, a semiconductor layer S stacked on the sapphire layer 110, and an electrode 150 stacked on the semiconductor layer S. As described.

In this case, the semiconductor device may further include a via hole V and a metal layer 180 formed on the bottom surface of the sapphire layer 110, wherein the via hole V is formed from one region of the bottom surface of the sapphire layer 110. It is formed to penetrate to the area.

In addition, the metal layer 180 is stacked on the bottom surface of the sapphire layer 110 and the via hole (V).

As described above, the metal layer 180 serves as an electrode.

In addition, the vertical light emitting device 100 of the present invention includes a sapphire layer 110, a semiconductor layer S stacked on the sapphire layer 110, and an electrode 150 stacked on the semiconductor layer S, An epoxy layer (not shown) stacked on the electrode 150 and a silicon layer (not shown) stacked on the epoxy layer may be further included.

In this case, the via hole V formed on the bottom surface of the sapphire layer 110 and penetrating from one region of the bottom surface of the sapphire layer 110 to one region of the semiconductor layer S may be included. same.

In addition, the metal layer 180 stacked on the bottom surface of the sapphire layer 110 and the via hole V may be included.

At this time, as the epoxy layer is decomposed, the silicon layer is separated to finally obtain a vertical light emitting device 100 having a structure as shown in FIG. 5.

Such a vertical light emitting device of the present invention has the following effects.

First, as described above, the warpage of the wafer may be prevented, thereby minimizing process loss.

Second, conventionally, the laser lift off process as described above is not performed, and thus, a yield reduction phenomenon may be prevented.

In addition, there is no need to use expensive equipment for the laser lift off process, and a special epitaxial structure for the process is unnecessary.

Third, in the case of the present invention there is an effect that the production process can be simplified to improve the yield.

1 is a conceptual diagram conceptually showing a light emitting device of a conventional horizontal device type.

2 is a view showing the concept of a conventional vertical light emitting device.

3A to 3F are conceptual views showing step by step of a conventional method of manufacturing a vertical light emitting device.

4A to 4F are conceptual views conceptually illustrating an overall process of manufacturing a vertical light emitting device of the present invention.

5 is a conceptual diagram showing a cross section of a vertical light emitting device manufactured by the method of the present invention.

<Description of the symbols for the main parts of the drawings>

100 vertical light emitting element 110 sapphire layer

S: semiconductor layer V: via hole

Claims (10)

delete delete delete Method of manufacturing vertical light emitting device 100 including sapphire layer 110, semiconductor layer S stacked on sapphire layer 110 and electrode 150 stacked on semiconductor layer S (S100) As Stacking the electrode 150 on the semiconductor layer S (S110); Stacking a silicon layer 170 on the electrode 150 (S130); Forming a via hole (V) in a bottom surface of the sapphire layer (110), wherein the via hole (V) is formed to penetrate to one region of the semiconductor layer (S150); Stacking a metal layer 180 on the bottom surface of the sapphire layer 110 and the via hole V (S160); Including the step (S170) of removing the silicon layer 170, The method of manufacturing a vertical light emitting device having a sapphire layer, characterized in that the silicon layer (170) is laminated on the epoxy layer (160) after laminating an epoxy layer (160) on the electrode (150). 5. The method of claim 4, Method of manufacturing a vertical light emitting device having a sapphire layer further comprising the step (S120) of laminating a transparent electrode layer (190) between the electrode (150) and the epoxy layer (160). 5. The method of claim 4, After the step of stacking the silicon layer 170 (S130), the vertical light emitting device having a sapphire layer further comprises the step of reducing the thickness by grinding the sapphire layer (110) (S140). Method of preparation. 5. The method of claim 4, The via hole (V) is a method of manufacturing a vertical light emitting device having a sapphire layer, characterized in that formed by the laser irradiation. 5. The method of claim 4, Removing the silicon layer 170 (S170) is a vertical light emitting device having a sapphire layer, characterized in that for removing the silicon layer 170 by removing the epoxy layer 160 by acetone. Way. 5. The method of claim 4, The semiconductor layer S includes an n-GaN layer 120 and a p-GaN layer 140 and an active layer 130 interposed therebetween, to manufacture a vertical light emitting device having a sapphire layer. Way. delete

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