KR101047540B1 - Electronic device and its power consumption control method - Google Patents

Abstract

An electronic device and a method of controlling power consumption thereof are disclosed. The electronic device includes an idle time measuring unit measuring an operating time of an idle task, a load rate calculating unit calculating a load ratio of the plurality of tasks using the operating time of the idle task, and a clock frequency corresponding to the calculated load ratio. It includes a clock converter for adjusting the. According to the present invention, it is possible to reduce the power consumption of the entire system by adjusting the clock to minimize the time spent in the idle task.

Power, processor, idle, clock.

Description

Electronic device and power consumption control method {Electronic device and power consumption control method}

The present invention relates to an electronic device, and more particularly, to an electronic device and a method of controlling power consumption thereof.

BACKGROUND With the development of electronic devices, electronic components operating at various high frequencies such as processors are used in various applications and products. As software technology and semiconductor technology advance, these electronic components are becoming more multifunctional, but there is an increasing need for the capacity, compactness, and control efficiency of the battery power to operate them.

Looking at the prior art in terms of power control, the prior art does not provide accurate power control using hardware logic to monitor to measure the load on the central processing unit (CPU) or using software approximate approximations. In addition, the monitoring hardware logic causes unnecessary development cost, increases the unit cost of the processor, and if a problem such as a bug is found in the logic, maintenance is difficult. In addition, in the case of a system using hardware monitoring logic, logic for measuring loads on cores, memory, and buses is added, which leads to high design complexity, difficulty in maintenance when problems such as bugs occur, and development costs increase. The unit price will also increase.

For systems using approximate approximations in software for power control, for example, MP3 is designed to be 10% of the total available clock, 20% for WMA, 70% for DivX, and 60% for WMV. As a result, even in the case of MP3, there may be divisions such as CBR (Constant BitRate) and VBR (Variable BitRate), and bit rates are very diverse such as 48Khz, 44.1Khz, 8Khz and the number of channels (for example, 6Ch, 5.1Ch, Stereo, Mono) also requires a variety of clock settings. In addition, the video codec is variably divided into DivX, Xvid, WMV, Mpeg2, Mpeg4, etc., and the audio codec is also diverse in MP3, Ogg, WMA, AMR, AAC, DTS, etc. (BitRate), sample rate (SampleRate), number of channels, and the like vary. The resolution, frame rate, bit rate, sample rate, and number of channels of all these audio and video codecs are not practical, and there is a problem that maintenance is difficult when a higher or lower bit rate sound source is generated in the future.

The background art described above is technical information possessed by the inventors for the derivation of the present invention or acquired during the derivation process of the present invention, and is not necessarily a publicly known technique disclosed to the general public before the application of the present invention.

An object of the present invention is to provide an electronic device and a method of controlling power consumption, which can reduce power consumption of an entire system by adjusting a clock to minimize a time spent in an idle task.

In addition, the present invention provides an electronic device having lower design complexity, easier maintenance, lower cost, and more efficient and accurate clock adjustment than a system using software PWM, compared to a system using hardware monitoring logic. It is to provide a power consumption adjustment method.

Technical problems other than the present invention will be easily understood through the following description.

According to an aspect of the present invention, an electronic device for controlling power consumption by adjusting a clock frequency used in a processor on which a plurality of tasks are operated, the idle time measuring unit measuring an operating time of an idle task; An electronic device includes a load rate calculator configured to calculate a load ratio of the plurality of tasks using an operation time of the idle task, and a clock converter configured to adjust the clock frequency in correspondence with the calculated load ratio.

The clock converter may compare the calculated load rate with a preset reference load rate and set the clock frequency smaller when the calculated load rate is smaller than the reference load rate.

The clock converter may compare the calculated load rate with a reference load rate having a predetermined range, and adjust the clock frequency such that the calculated load rate is within the range of the reference load rate.

The present embodiment may further include a time delay unit configured to set an operation period of at least one of the idle time measuring unit and the load rate calculating unit. The calculated load rate may be compared with a preset reference load rate. The display device may further include a load rate verification unit configured to generate a signal maintaining the clock frequency when the reference load rate is greater than the reference load rate.

Here, the idle time measuring unit may be a monitor task for measuring an operation time of the idle task in correspondence with a predetermined period, and the idle time measuring unit may change a bit rate of a codec driven in a task operating in the processor. The apparatus may further include an event measuring unit generating an event signal at the time point, and the idle time measuring unit may measure an operation time of an idle task when receiving the event signal.

The clock converter may adjust the clock frequency by the following equation.

Ir = (r-1 + K) / r

Lr = (1-K) / r

Here, K is the idle rate according to the operation time of the idle task, (1-K) is the calculated load rate, r is the adjustment factor of the clock frequency, Ir is the idle rate to be adjusted and Lr is the load factor to be adjusted, May be 90% to 100%, and the clock converter may adjust the clock frequency by adding or subtracting by a predetermined unit.

In addition, according to another embodiment of the present invention, in the method for adjusting the power consumption by adjusting the clock frequency used in the processor in which the plurality of tasks are operated, the electronic device to measure the operating time of the idle task (Idle Task) Comprising a step of calculating the load ratio of the plurality of tasks using the operation time of the idle task, and adjusting the clock frequency corresponding to the calculated load ratio is provided.

The clock frequency adjusting may include comparing the calculated load rate with a preset reference load rate and setting the clock frequency smaller when the calculated load rate is smaller than the reference load rate.

The clock frequency adjusting may include comparing the calculated load rate with a reference load rate having a predetermined range, and adjusting the clock frequency so that the calculated load rate is within the range of the reference load rate.

Here, any one or more steps of the operation time measurement step and the load factor calculation step may be performed for each preset operation period.

The present invention may further include comparing the calculated load factor with a preset reference load factor and generating a signal maintaining the clock frequency when the calculated load factor is greater than the reference load factor.

The present invention may further include generating an event signal at a point in time at which a bit rate of a codec driven in a task operating in the processor is changed, wherein the operation time measuring step is performed when the event signal is generated. Can be.

Here, the clock frequency adjustment step, the clock frequency can be adjusted by the following equation.

Ir = (r-1 + K) / r

Lr = (1-K) / r

Here, K is the idle rate according to the operation time of the idle task, (1-K) is the calculated load rate, r is the adjustment factor of the clock frequency, Ir is the idle rate to be adjusted and Lr is the load factor to be adjusted, May be from 90% to 100%.

The clock converter and the clock frequency adjusting step may adjust the clock frequency by extracting the clock frequency corresponding to the load factor from a pre-stored reference table.

Further, according to another aspect of the present invention, in order to perform the above-described power consumption adjustment method, a program of instructions that can be executed by the digital processing apparatus is tangibly embodied, and a program that can be read by the digital processing apparatus is recorded. A record carrier is provided.

Other aspects, features, and advantages other than those described above will become apparent from the following drawings, claims and detailed description of the invention.

The apparatus and method for controlling power consumption according to the present invention have the effect of reducing the power consumption of the entire system by adjusting the clock to minimize the time spent in idle tasks.

As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all changes, equivalents, and substitutes included in the spirit and scope of the present invention.

Terms including ordinal numbers such as first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. As used herein, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof described on the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

In the following description of the present invention with reference to the accompanying drawings, the same components are denoted by the same reference numerals regardless of the reference numerals, and redundant explanations thereof will be omitted. In the following description of the present invention, if it is determined that the detailed description of the related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

1 is a block diagram of main components of an electronic device with a power consumption adjustment function according to an embodiment of the present invention.

Referring to FIG. 1, an electronic device includes a processor 110 and a power consumption adjustment unit. In addition, the electronic device may further include various components (for example, a decoding unit, an output unit, a display unit, etc. in the case of an audio reproducing apparatus) according to the purpose, but since the electronic device is somewhat distanced from the gist of the present invention, description thereof will be provided. Omit.

The power consumption adjusting unit includes an idle time measuring unit 120, a load rate calculating unit 130, a clock converting unit 140, a memory 150, and a time delay unit 160. One or more components of the power consuming unit may be implemented as a software program or may be implemented to enable the execution of the corresponding functions in the processor chip.

The present embodiment is characterized by measuring an operating time during which an idle task of the processor 110 operates, and adjusting a clock frequency to reduce it to a predetermined range. That is, the present embodiment is characterized in that power consumption is reduced by adjusting clock frequencies of cores, memories, buses, etc. using execution times of idle tasks of an OS operating in a processor.

The processor 110 is a circuit integrating the functions of a central processing unit (CPU). For example, the processor 110 may include functional units such as an arithmetic logic unit (ALU), registers, program counters, instruction decoders, control circuits, and the like. In the processor 110 in which a plurality of tasks are operated, a clock signal is generally used, and the present embodiment may adjust the clock frequency by a specific range.

The power consumption control unit according to the present embodiment may be implemented as a separate chip physically separated from the processor 110 or may be implemented in software inside the processor 110. In the former case, the power consumption adjusting unit may be connected to the processor 110 through a predetermined bus to transmit and receive a signal. In addition, the present embodiment calculates a clock of a core, a memory, a bus, etc. that maximizes the CPU load rate when using various contents (audio, video, images, etc.) in a system using a reduced instruction set computer (RISC). Using a clock can reduce power consumption.

The idle time measuring unit 120 measures an operating time of an idle task operating in the processor 110. Methods of measuring the time and / or operation rate (idle rate) in which an idle task operates may vary as follows. For example, how to use the schedule count provided by the task control block (TCB) of the OS, how to measure the ratio of the schedule count of the idle task to the schedule count of all tasks, and the execution time of the idle task. The measurement may be performed using a real time clock (RTC).

In addition, the idle time measuring unit 120 may measure a time and / or an operation rate at which an idle task operates while using the above-described measuring method at a predetermined cycle or a specific time point. For example, the idle time measuring unit 120 may set a measurement time point using any one or more of a monitor task, a timer, and an event measuring unit.

When the idle time measuring unit 120 is a monitor task, the monitor task may measure an operation time and / or an operation rate of the idle task once every predetermined period, for example, 10 ms, 100 ms, 500 ms, 1 second, or the like. Can be. The monitor task can be set to have the highest priority, so that it can operate accurately at a predetermined cycle.

In addition, the present embodiment may further include a timer. The timer may measure time so that the idle time measuring unit 120 may operate at a predetermined period, and set an operation period.

In addition, the idle time measurement unit 120 may further include an event measurement unit (not shown) and may operate at a specific event time point of the task. For example, in the case of audio (eg, VBR) where the bit rate changes, the event measuring unit generates an event signal at a time point when the bit rate of the codec driven in the task changes, and the idle time measuring unit Can be passed to 120. Here, the number of tasks for which the codec operates may be one or plural according to the type of program. For example, in the case of audio, the codec operates only in the audio task, but in the case of a video, the codec may operate in the audio task and the video task, respectively.

The idle time measurement unit 120 may determine whether the changed bit rate is higher or lower than the conventional one, and measure the time and / or operation rate at which the idle task operates according to the height of the bit rate. Even in the case of video, the event measuring unit generates an event signal by determining whether the bit rate is changed and the amount of computation such as I-Frame, P-Frame, or B-Frame, as described above, and the idle time measuring unit 120 generates such an event signal. The operation time of the idle task can be measured by receiving the event signal and corresponding to the change in the amount of computation.

Here, the event measuring unit may transmit the event signal to the load rate calculator 130, which will be described later, and the load rate calculator 130 may calculate the change amount of the load rate using the change amount of the bit rate or the change amount of the calculation amount of the frame. For example, if the bit rate or frame amount is doubled, the load rate can be doubled accordingly.

The load factor calculator 130 calculates load ratios of a plurality of tasks operated by the processor 110 by using an operation time of an idle task measured by the idle time measurer 120. Since the idle task according to the present embodiment is also one task, the load rate of the plurality of tasks according to the present embodiment may include the load rate of the idle task and the load rate of the actual work task. In the following, the former load rate can be expressed separately under the name of the idle rate.

When all clocks available in the processor 110 are set to the maximum, the idle task is performed for the remaining time after the task of performing the actual task. Therefore, the load factor calculator 130 calculates a load factor, which is a performance rate of the task performing the actual work, using the received operation time of the idle task and the operation time of the task that performs the actual work.

In addition, the load factor calculator 130 may calculate a load factor by using an operation rate (idle rate) of an idle task representing an operation time of an idle task with respect to a predetermined unit time. An operating system (OS) may have a plurality of tasks that necessarily include idle tasks. Thus, the load factor can be equal to 1 minus the idle rate.

The clock converter 140 may convert the clock frequency input to the processor 110 using the load factor calculated by the load factor calculator 130. The clock frequency may vary according to the load rate. For example, when the load rate calculated by the load rate calculation unit 130 is smaller than the reference load rate, the clock frequency is not set or changed to be smaller than the previously input frequency. When the load ratio calculated by the calculator 130 is greater than the reference load ratio, the clock frequency may be set larger than the previously input frequency or may not be changed.

Here, the reference load rate may be stored in the memory 150 in advance, and is a load rate for adjusting the clock compared to the load rate calculated by the load rate calculator 130. The reference load rate can be 90 to 100%. The reference load factor may be set to a specific value or a specific range. In the latter case, the clock frequency can be adjusted so that the measured current load factor is within a certain range. For example, when the load factor calculated by the load factor calculator 130 is smaller than the lower limit of the reference load factor, the clock frequency is set smaller than a frequency input previously, and conversely, the load factor calculated by the load factor calculator 130 is the upper limit value of the reference load factor. If greater, the clock frequency may be set larger than the frequency input previously, and the clock frequency may not be changed if the load rate calculated by the load rate calculator 130 is within the range of the reference load rate. According to this embodiment, since the load ratio is kept within a specific range, there is an advantage that can drive the system stably.

The reference load ratio may be preset in the manufacture of an electronic device to which the present invention is applied and stored in the memory 150. According to the present embodiment, the user interface may be provided so that the user can change the reference load rate, or the user's access may be blocked so that the reference load rate is not changed.

The clock converter 140 may convert a clock frequency corresponding to one processor 110 or a plurality of processors 110. That is, the clock frequency converted by the clock converter 140 may be set differently according to the purpose, type, etc. of the processor 110.

The time delay unit 160 may maintain an operation of the processor 110 for a predetermined time by determining an operation period of the idle time measurement unit 120 and / or the load factor calculator 130. For example, the time delay unit 160 sets an operation period, for example, 200 ms and 400 ms, and allows the idle time measuring unit 120 and / or the load factor calculator 130 to operate once every set period. Work of the processor 110 may be smoothly performed. The time delay unit 160 may determine an operation cycle of only the load rate calculator 130, an operation cycle of only the idle time measurement unit 120, or may separately or identically define the operation cycle of the two.

2 is a view showing a power consumption adjustment method according to an embodiment of the present invention. A case where the idle task, task 1, and task 2 operate for one second in the system in which the processor 110 is driven will be described.

Referring to FIG. 2A, the input clock frequency is 300 MHz, and when task 1 operates for 200 ms for 1 second and task 2 operates for 300 ms, the idle task operates for 500 ms. Therefore, 500 ms of idle tasks is a waste of time, during which time the processor 110 consumes power without performing actual work. Here, the above-mentioned idle rate is 50%, and the load rate is 50%.

Referring to FIG. 2B, when the frequency input to the processor 110 is lowered to 50% of A, that is, 150 MHz, task 1 operates for 400 ms and task 2 operates for 600 ms, and the idle task does not operate. Therefore (0ms), it can be a system that operates efficiently without wasting power. Here, the above-mentioned idle rate is 0%, and the load rate is 100%.

Accordingly, in (A), if 100 mA of power is consumed when the clock frequency is 300 MHz, in (B), since 50 mA of power is consumed when the clock frequency is 150 MHz, power consumption is reduced in (B). .

3 is a diagram illustrating a relationship between a clock frequency, an idle rate, and a load rate of a power consumption control unit according to an exemplary embodiment of the present invention. Referring to FIG. 3, a formula generalizing idle rate and load rate is presented.

The clock converter 140 may use a reference table, apply a predetermined ratio, or add or subtract by a specific unit to increase or decrease the clock frequency. This embodiment corresponds to the case of adjusting the clock frequency by applying a predetermined ratio to the clock frequency.

When the clock frequency is F, the measured and calculated idle rate is K and the load rate is 1-K. When the clock frequency is adjusted by r times (rF), the adjusted idle rate (Ir) and load rate (Lr) are as follows. Is the same as

Ir = (r-1 + K) / r (1)

Lr = (1-K) / r (2)

According to the present embodiment, in order to adjust the clock frequency such that the load ratio is equal to or greater than the reference load ratio, the above-described clock converter 140 adjusts the clock frequency by calculating r values such that (1-K) / r is equal to or greater than the reference load ratio. Can be.

For example, assuming that a setting time (for example, 200 hours) can be used when operating at 100% load for 1 second, it will be described below. Since the schedule count of tasks such as the idle task continues to increase from the time when the processor 110 operates, the idle time measuring unit 120 calculates the schedule count of the idle task in order to obtain the schedule count of the current 1 second with respect to the idle task. By extracting and subtracting the schedule count measured one second from this value, we can measure how long the idle task has been running for the current one second. The load rate calculator 130 may calculate the above-mentioned idle rate and load rate from a time when the idle task operates for one second.

If the idle task has been running for 200 hours, this indicates that the other tasks have not been running, in which case the idle rate is 100% and the load rate is 0%. In addition, if the idle task has been running for 100 hours, this indicates that other tasks have been running for 100 hours, in which case the idle rate is 50% and the load rate is 50%. In addition, if the idle task has been running for 50 hours, this indicates that other tasks have been running for 150 hours, in which case the idle rate is 25% and the load rate is 75%.

When the reference load ratio is 100%, if the load ratio is 50%, K = 0.5 in Equation (2). When the clock frequency is set to 0.5 times, that is, r is set to 0.5, the newly set load ratio becomes 100%. According to 1), the idle rate is 0%. In addition, when the load ratio is 75%, K = 0.25 in Equation (2). Therefore, when the clock frequency is set to 0.75 times, that is, r is set to 0.75, the newly set load rate becomes 100%. The idle rate is 0%.

In the case where the reference load ratio is 95%, if the load ratio is 50%, K = 0.5 in the above formula (2), and r, where the formula (2) becomes 95%, can be obtained as follows.

0.95 = (1-0.5) / r (3)

r = 50/95 (4)

According to the present embodiment, when the reference load ratio is about 95%, the information on the current clock may be sufficiently obtained. If the load ratio is 100%, it is difficult to determine whether the current clock is sufficient or insufficient. In addition, since the load rate may change from time to time, the clock frequency can be changed by continuously calculating the idle rate or load rate every predetermined short time, for example, 100 ms or 200 ms.

4 is a diagram illustrating a reference table of a power consumption adjustment unit according to an embodiment of the present invention. This embodiment corresponds to the case where the clock converter 140 adjusts the clock frequency by using a reference table. Here, the reference table may be stored and used in the memory 150, for example.

Referring to FIG. 4, each clock frequency applied to each process operating in a core, a bus, a memory, and the like is specified, and the clock converter 140 determines a reference index. You can call it to specify the clock frequency for that process. Each clock frequency may be determined in accordance with the load factor.

For example, if the reference value is 1, each clock frequency is set to 300 on the core, 200 on the bus, and 100 in memory. If the reference value is 10, each clock frequency is set to 30 on the core, 20 on the bus, and 10 on memory. Can be. According to this example, the larger the idle rate (that is, the smaller the load rate) can call the larger reference value to lower the idle rate. In addition, various clock frequency adjustment methods may be applied to the present invention, such as adjusting the clock frequency individually for each process or adjusting the clock frequency by adding or subtracting a specific unit (for example, 10 units, 20 units, etc.) from the clock frequency. to be.

5 is a block diagram of an essential part of an electronic device according to another embodiment of the present invention. 4, the processor 110, the idle time measuring unit 120, the load rate calculating unit 130, the load rate verifying unit 135, the clock converting unit 140, the memory 150, and the time delay unit 160. Is shown. The differences from the above will be explained mainly.

The load rate verification unit 135 receives the current load rate of the processor 110 calculated by the load rate calculation unit 130 and compares the current load rate with a preset reference load rate, and additionally sets a clock frequency when the current load rate is greater than or equal to the reference load rate. By not converting, the amount of power consumed can be reduced while reducing the amount of computation.

The load rate verification unit 135 compares the current load rate with the reference load rate stored in the memory 150 or preset. If the current load rate is smaller than the reference load rate, the clock frequency change signal is generated and transmitted to the clock converter 140, and the clock converter 140 only receives the clock frequency change signal, as described above. The frequency can be changed to correspond to the load factor. Conversely, if the current load ratio is greater than the reference load ratio, the load ratio verification unit 135 generates a signal maintaining the clock frequency, and the clock converter 140 receives a signal maintaining the clock frequency or changes the clock frequency. If no signal is received, the clock frequency can be maintained.

6 is a flowchart illustrating a power consumption adjustment method according to an embodiment of the present invention.

In operation S410, the idle time measuring unit 120 measures an operating time of an idle task operating in the processor 110. In operation S415, the method for measuring an operation time of an idle task may be performed at a specific event time point of the task using a method using a monitor task, a method using time measurement and a calculation cycle setting through a timer, and an event measuring unit as described above. And the like.

In operation S420, the load factor calculator 130 calculates a load factor of the processor 110 by using an operation time of an idle task measured by the idle time measurer 120. Since the load rate of the processor 110 may be calculated using the idle rate of the idle task, the present invention may also include the right rate when the load rate calculator 130 calculates the idle rate.

In operation S430, the clock converter 140 converts the clock frequency input to the processor 110 according to the load ratio of the processor 110. The method used by the clock converter 140 to increase or decrease the clock frequency may be any one or more of a method using a reference table, a method applied by a predetermined ratio, and a method added or subtracted by a specific unit as described above. have.

In operation S440, the time delay unit 160 determines an operation period of the idle time measurement unit 120 and / or the load factor calculator 130 as described above to maintain the operation of the processor 110 for a predetermined time. You can do that.

In addition, a specific description of a common platform technology such as an embedded system, an OS, a communication standard, an interface standardization technology such as an I / O interface, and the like, for a power consumption control device according to an embodiment of the present invention, As it is obvious to a person who has knowledge of O, it will be omitted.

The method for controlling power consumption according to the present invention may be implemented in the form of program instructions that can be executed by various computer means and recorded in a computer readable medium. In other words, the recording medium may be a computer readable recording medium having recorded thereon a program for causing the computer to execute the above steps.

The computer readable medium may include a program command, a data file, a data structure, etc. alone or in combination. Program instructions recorded on the media may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well-known and available to those having skill in the computer software arts. Examples of computer readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROMs, DVDs, and magnetic disks such as floppy disks. -Magneto-Optical Media, and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, and the like.

Those skilled in the art will appreciate that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention as set forth in the claims below.

1 is a block diagram of a power consumption control apparatus according to an embodiment of the present invention.

2 is a view showing a method of operating a power consumption control apparatus according to an embodiment of the present invention.

3 is a diagram illustrating a relationship between a clock frequency, an idle rate, and a load rate of an apparatus for controlling power consumption according to an embodiment of the present invention.

4 is a diagram illustrating a reference table of an apparatus for controlling power consumption according to an embodiment of the present invention.

5 is a block diagram of a power consumption control apparatus according to another embodiment of the present invention.

6 is a flow chart of a power consumption adjustment method according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

110: processor 120: idle time measurement unit

130: load factor calculator 135: load factor verification unit

140: clock converting unit 150: memory

160: time delay unit

Claims (22)

An electronic device for controlling power consumption by adjusting a clock frequency used in a processor in which a plurality of tasks are operated, An idle time measuring unit measuring an operation time of an idle task; A load ratio calculator configured to calculate load ratios of the plurality of tasks by using an operation time of the idle task; A clock converter which adjusts the clock frequency according to the calculated load ratio; And And a time delay unit configured to set an operation period of at least one of the idle time measurement unit and the load factor calculator. The method of claim 1, And the clock converting unit compares the calculated load ratio with a preset reference load ratio, and sets the clock frequency smaller when the calculated load ratio is smaller than the reference load ratio. The method of claim 1, And the clock converting unit compares the calculated load ratio with a preset reference load ratio and sets the clock frequency large when the calculated load ratio is greater than the reference load ratio. The method of claim 1, And the clock converter compares the calculated load rate with a reference load rate having a predetermined range, and adjusts the clock frequency so that the calculated load rate is within the range of the reference load rate. delete The method of claim 1, And a load ratio verification unit for comparing the calculated load ratio with a preset reference load ratio and generating a signal maintaining the clock frequency when the calculated load ratio is greater than the reference load ratio. The method of claim 1, And the idle time measuring unit is a monitor task for measuring an operation time of the idle task in correspondence with a predetermined period. The method of claim 1, The idle time measuring unit may further include an event measuring unit generating an event signal at a time when a bit rate of a codec driven in a task operating in the processor is changed. The idle time measuring unit measures an operation time of an idle task when the event signal is received. The method of claim 1, And the clock converter adjusts the clock frequency by the following equation. Ir = (r-1 + K) / r Lr = (1-K) / r Here, K is the idle rate according to the operation time of the idle task, (1-K) is the calculated load rate, r is the adjustment factor of the clock frequency, Ir is the idle rate is adjusted and Lr is the load rate is adjusted. 10. The method of claim 9, The regulated load factor is 90% to 100%. The method of claim 1, And the clock converter extracts the clock frequency corresponding to the load ratio from a pre-stored reference table to adjust the clock frequency. The method of claim 1, And the clock converting unit adjusts the clock frequency by adding or subtracting the predetermined unit. A method of controlling power consumption by an electronic device adjusting a clock frequency used in a processor in which a plurality of tasks are operated, Measuring an operating time of an idle task; Calculating a load ratio of the plurality of tasks by using an operation time of the idle task; And Adjusting the clock frequency in accordance with the calculated load ratio; In the adjusting of the clock frequency, the clock frequency is adjusted by the following equation. Ir = (r-1 + K) / r Lr = (1-K) / r Where K is the idle rate according to the operation time of the idle task, (1-K) is the calculated load rate, r is the adjustment factor of the clock frequency, Ir is the idle rate to be adjusted and Lr is the load rate to be adjusted. The method of claim 13, The clock frequency adjustment step, And comparing the calculated load ratio with a preset reference load ratio and setting the clock frequency smaller when the calculated load ratio is smaller than the reference load ratio. The method of claim 13, The clock frequency adjustment step, And comparing the calculated load rate with a reference load rate having a predetermined range, and adjusting the clock frequency so that the calculated load rate is within the range of the reference load rate. The method according to claim 13, And at least one of the operation time measurement step and the load factor calculation step is performed at each preset operation period. The method of claim 13, And comparing the calculated load ratio with a preset reference load ratio and generating a signal for maintaining the clock frequency when the calculated load ratio is greater than the reference load ratio. The method of claim 13, Generating an event signal at a point in time at which a bit rate of a codec driven in a task operating in the processor is changed; And measuring the operation time when the event signal is generated. delete The method of claim 13, The regulated load ratio is 90% to 100% power consumption adjustment method. The method of claim 13, The adjusting of the clock frequency may include adjusting the clock frequency by extracting the clock frequency corresponding to the load ratio from a pre-stored reference table. A program of instructions that can be executed by a digital processing apparatus for performing the power consumption adjusting method according to any one of claims 13 to 18 and 20 to 21 is tangibly embodied. Recording medium recording a program that can be read.

Images