KR101041623B1 - Exponential Function Generator and Variable Gain Amplifier Using the Same - Google Patents

Abstract

An exponential generator with excellent linear characteristics at log scale and a variable gain amplifier using the same are presented.
The variable gain amplification apparatus according to the present invention is connected between a power supply terminal and a ground terminal, an exponential function generator for outputting first and second adjustment voltages by adjusting the control voltage so that the control voltage has an exponential function, and a power supply voltage terminal; A gain controller and first and second output voltages connected between the ground terminals to generate first and second output voltages by adjusting gains of the first and second input voltages by first and second regulated voltages and feedback voltages. And an output controller configured to compare the reference voltage with a reference voltage to generate a feedback voltage and provide the feedback voltage to the gain controller. A first transistor driven, a first current source connected in parallel with the first transistor, and a second transistor diode-connected between the first output node and the ground terminal A third transistor connected between the transistor, the control voltage input terminal and the second output node for outputting the second regulated voltage and driven by a ground voltage, a second current source connected between the power supply voltage terminal and the second output node; By including a fourth transistor diode-connected between the second output node and the ground terminal, it is possible to stabilize the linear characteristics of the exponential function and to manufacture the exponential generator with low cost and simple process using CMOS devices.

Description

Exponential Function Generator and Variable Gain Amplifier Using the Same}

The present invention relates to an exponential generator, and more particularly, to an exponential generator having excellent linear characteristics at a logarithmic scale and a variable gain amplifier using the same.

In general, an exponential generator is widely applied to analog systems including a variable gain amplifier (VGA), and VGA is used in various fields such as communication systems, disk drives, and medical devices. .

The signal size of a transmitter and a receiver that transmits and receives a signal in a communication system varies according to a distance and a state of the transceiver. In particular, in a wireless communication system, a change in signal size is further deepened by multipath fading. Accordingly, a VGA capable of changing a signal size for smooth signal processing at a transmitting and receiving end has been used.

The VGA is configured to automatically control a gain proportional to the control voltage within the feedback loop. The decibel (dB) used as the unit of gain is the logarithmic function, so it is easy to convert the amplifier gain to linear decibel when the gain of the VGA changes exponentially. Therefore, it is preferable that the gain of the VGA varies exponentially with respect to the control voltage applied from the outside.

In order to obtain such an exponential characteristic, the VGA is conventionally configured by using a bipolar transistor having an exponential function when operating in an active mode. That is, a CMOS (Complementary Metal-Oxide Semiconductor) device has a feature of the square function or the linear function according to the operating region, it is difficult to implement an exponential function.

However, as the field of application of exponential generators such as VGA expands day by day, the necessity of implementing exponential generators using CMOS devices with low production cost and high integration has emerged.

'CMOS EXPONENTIAL CURRENT-TO-VOLTAGE CIRCUIT BASED ON NEWLY PROPOSED APPROXIMATION METHOD', published at the IEEE International Symposium on Circuits And Systems (ISCAS) in 2004, exponential) and an approximate exponential function using Taylor series expansion are used to define a new approximate exponential function, and an example of implementing a current generation circuit using the same as a CMOS device is described.

Equation 1 is an approximate exponential function using Taylor series, Equation 2 is a pseudo exponential function, and Equation 3 is a new approximate exponential function presented in Paper 1.

[Equation 1]

[Equation 2]

&Quot; (3) "

In Equation 3, k is a constant and x is an independent variable.

1 is a graph showing the linear characteristics of the log scale for each type of the exponential function of Equations 1 to 3.

In FIG. 1, A1, B1, and C1 are dB scale curves for the independent variable x when the k value is changed to 1, 0.8, and 0.6 for the approximate exponential function presented in Paper 1, respectively. Also, D1 is the dB scale curve for the approximate exponential function using the Taylor series, and E1 is the dB scale curve for the pseudo exponential function.

As can be seen in FIG. 1, in the case of the dB scale curve according to Equation 3 (A1, B2, C1), the linearity error is ± 0.5 compared to the dB scale curves D1 and E1 according to Equation 1 and Equation 2. It can be seen that it is within dB and the linear section is about 20 dB.

In addition, in Equation 3, the larger the k value, the shorter the linear interval, and the smaller the k value, the higher the linearity error.

However, since the wireless communication system requires a gain variation range of about 60 dB, the approximate exponential function presented in Paper 1 alone is difficult to satisfy the system performance.

In order to solve this problem, a paper published in 2005 Symposium on VLSI Circuits Digest of Technical Papers, "An ALL CMOS 84dB-Linear Low-Power Variable Gain Amplifier" (hereinafter, 'Paper 2'), A new approximate exponential function is presented.

&Quot; (4) "

Where k is a constant and x is an independent variable.

FIG. 2 is a graph showing linear characteristics of log scales according to types of exponential functions of Equations 1, 2, and 4. FIG.

A2, B2 and C2 of FIG. 2 are dB scale curves for the independent variable x when the k value is changed to 1, 0.25, and 0.15 for the approximate exponential function presented in Paper 2. Also, D2 is the dB scale curve for the approximate exponential function using the Taylor series, and E2 is the dB scale curve for the pseudo exponential function.

As can be seen in FIG. 2, in the case of the dB scale curve according to [Equation 4] (A2, B2, C2), a wider linear section than the dB scale curves D1 and E1 according to Equations 1 and 2 It can be seen that it has (about 60dB).

In addition, the authors of the paper 2 implement the exponential function generator for VGA using the principle of Equation 4.

3 is an exemplary diagram of a general exponential generator.

As shown, the general exponential function generator is connected between the power supply voltage terminal V _DD and the first node K11 and driven by a control voltage V _C applied from the outside to convert the control voltage into a current signal. The first transistor P11, the first current source I11 connected in parallel with the first transistor P11 to generate the specified current IO, the second node and the ground terminal V _SS and connected to the control voltage V _C. A second current source I12 and a first node K11 that are driven by a second transistor N11 for converting a control voltage into a current signal and are connected in parallel with the second transistor N11 to generate a specified current IO. And a third transistor connected between the ground terminal V _SS and driven by a voltage applied to the first node K11 to output a voltage applied to the first node K11 to the first output terminal C11 ( N12) is connected between the power supply voltage terminal V _DD and the second node K12 to connect to the third node K13. The fifth transistor P13 connected between the fourth transistor P12, the power supply voltage terminal V _DD , and the fourth node K14 driven by a voltage applied thereto and driven by a voltage applied to the third node K13. ) And driven by a voltage connected between the fourth node K14 and the ground terminal V _SS and applied to the fourth node K14, the voltage applied to the fourth node K14 is converted into the second output terminal C12. ) Is a sixth transistor (N13) output to.

Here, the fourth transistor P12 is commonly connected to a source and a gate, and the fourth and fifth transistors P12 and P13 are configured to transfer current from the second node K12 to the fourth node 14. It works as a current mirror. In addition, the first, fourth and fifth transistors are P-type transistors, and the second, third and sixth transistors are N-type transistors.

In FIG. 3, the drain current ID1 of the first transistor P11 and the drain current ID2 of the second transistor N11 are as follows.

[Equation 5]

&Quot; (6) "

Here, Kp and Kn are constants determined from process variables (carrier mobility, gate capacitance), channel length, and width of the first and second transistors P11 and N11, and V _Thp is a constant of the first transistor P11. Threshold voltage, V _Thn is the threshold voltage of the second transistor (N11).

Then, the current IO from the first current source I11 is added to the drain current ID1 of the first transistor P11 to determine the current amount IC1 flowing to the first node K11, and the second transistor N11 is determined. The current IO by the second current source I12 is added to the drain current ID2 of the C1 and the current amount IC2 flowing through the second node K14 is determined as follows.

[Equation 7]

[Equation 8]

,

,

라고 가정하면, IC2/IC1은 다음과 같다.In [Equation 7] and [Equation 8]

,

,

Suppose that IC2 / IC1 is as follows.

[Equation 9]

,

,

이며, 결국 [수학식 4]와 같은 형태를 갖게 됨을 알 수 있다.In Equation 9,

,

,

It can be seen that eventually has the form as shown in [Equation 4].

When configuring a VGA using an exponential generator having such characteristics, the gain of the VGA becomes a function of the control voltage V _C , and the desired gain variable range can be obtained by adjusting the IO.

라고 가정하였으나, 실제 제작되는 P타입 트랜지스터 및 N타입 트랜지스터의 Kp와 Kn, V_THp와 V_THn의 크기는 동일하지 않고 각각의 공정 변동율이 다르다. 따라서 상기 가정대로 지수함수 발생기를 구성하는 경우 VGA의 이득 제어폭이 변화되거나 dB 스케일 곡선이 쉬프트될 수 있다.However, in paper 2, Kp = Kn = K,

However, the magnitudes of Kp and Kn, V _THp and V _THn of P-type transistors and N-type transistors actually manufactured are not the same, and process variation _rates are different. Therefore, when the exponential generator is configured as described above, the gain control width of the VGA may be changed or the dB scale curve may be shifted.

Therefore, the expected linear characteristics cannot be obtained when the specified control voltage V _C is applied. Furthermore, there is a problem that system characteristics are deteriorated because desired gain cannot be obtained from VGA.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above problems, and there is a technical problem to provide an exponential generator having excellent linear characteristics at a logarithmic scale by using CMOS transistors having the same operating characteristics and sizes.

Another technical problem of the present invention is to provide a variable gain amplifier device having excellent linear characteristics and wide gain variation using an exponential function generator using a CMOS transistor.

Exponential function generator according to an embodiment of the present invention for achieving the above technical problem is a first transistor connected between a power supply terminal and a first output node driven by a control voltage; A first current source connected in parallel with the first transistor; A second transistor diode-connected between the first output node and a ground terminal; A third transistor connected between the control voltage input terminal and a second output node and driven by a ground voltage; A second current source connected between the power supply voltage terminal and the second output node; And a fourth transistor diode-connected between the second output node and the ground terminal.

In addition, the exponential function generator according to another embodiment of the present invention includes a first transistor connected between the first output node and the ground terminal is driven by a control voltage; A first current source connected in parallel with the first transistor; A second transistor diode-connected between a power supply voltage terminal and said first output node; A third transistor connected between a second output node and the control voltage input terminal and driven by the power supply voltage; A second current source connected in parallel with the third transistor; And a fourth transistor diode-connected between the power supply voltage terminal and the second output node.

On the other hand, the variable gain amplifier according to an embodiment of the present invention is connected between the power supply terminal and the ground terminal, the exponent for outputting the first and second control voltage by adjusting the control voltage so that the control voltage has an exponential function Function generator; A gain control unit connected between the power supply voltage terminal and the ground terminal to generate first and second output voltages by adjusting gains of first and second input voltages by the first and second adjustment voltages and a feedback voltage; And an output regulator configured to compare the first and second output voltages with a reference voltage to generate the feedback voltage and provide the feedback voltage to the gain controller. The exponential function generator may include the power voltage terminal and the first regulator. A diode connected between a first transistor connected between a first output node for outputting a voltage and driven by the control voltage, a first current source connected in parallel with the first transistor, and between the first output node and the ground terminal A third transistor connected between a second transistor, the control voltage input terminal and a second output node for outputting the second regulated voltage, and driven by a ground voltage, between the power supply voltage terminal and the second output node; A second current source and a fourth transistor diode-connected between the second output node and the ground terminal.

In addition, the variable gain amplifying apparatus according to another embodiment of the present invention is connected between a power supply terminal and a ground terminal to adjust the control voltage so that the control voltage has an exponential function, and outputs the first and second regulating voltages. Function generator; A gain control unit connected between the power supply voltage terminal and the ground terminal to generate first and second output voltages by adjusting gains of first and second input voltages by the first and second adjustment voltages and a feedback voltage; And an output regulator configured to compare the first and second output voltages with a reference voltage to generate the feedback voltage and provide the feedback voltage to the gain controller. The exponential function generator may include the power voltage terminal and the first regulator. A diode connected between a first transistor connected between a first output node for outputting a voltage and driven by the control voltage, a first current source connected in parallel with the first transistor, and between the first output node and the ground terminal A third transistor connected between a second transistor, the control voltage input terminal and a second output node for outputting the second regulated voltage, and driven by a ground voltage, between the power supply voltage terminal and the second output node; A second current source and a fourth transistor diode-connected between the second output node and the ground terminal.

According to the present invention, the linear characteristics of the exponential function can be stabilized by converting the control voltage into a current signal using transistors of the same type. In addition, the exponential function generator can be configured using a CMOS device to reduce the manufacturing cost and simplify the process.

In addition, when the exponential function generator is applied to the variable gain amplifier, the gain variable range can be widened, and the gain control range can be varied according to the system specification, thereby implementing a variable gain amplifier suitable for the design purpose.

1 and 2 are graphs showing linear characteristics of log scales of various exponential functions.
3 is an exemplary diagram of a general exponential generator;
4 is a configuration diagram of an exponential function generator according to an embodiment of the present invention;
5 is a configuration diagram of an exponential function generator according to another embodiment of the present invention;
6 is a block diagram of a variable gain amplifier according to an embodiment of the present invention;
FIG. 7 is a detailed circuit diagram according to an embodiment of the gain control unit shown in FIG. 6;
FIG. 8 is a detailed circuit diagram of an embodiment of an output control unit illustrated in FIG. 6;
9 is a detailed circuit diagram according to another embodiment of the gain control unit shown in FIG. 6;
FIG. 10 is a detailed circuit diagram according to another embodiment of the output adjusting unit shown in FIG. 7;
11 and 12 are graphs showing a change in gain of a variable gain amplifier according to threshold voltage characteristics;
FIG. 13 is a graph illustrating a gain change of a variable gain amplifier according to process variable variations of an N type transistor and a P type transistor.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

라고 가정하는 오류로 인하여 지수함수 발생기의 선형 특성을 최대화할 수 없었다.In Paper 2, Kp = Kn = K,

The linear error of the exponential generator could not be maximized due to the error assumed to be.

Thus, the present invention constructs an exponential function generator using CMOS transistors that actually have the same characteristics and sizes. That is, the transistor used to receive the control voltage V _C and convert it into a current signal is configured as a P-type transistor or an N-type transistor to improve the log scale linear characteristic of the exponential function generator.

4 is a block diagram of an exponential generator according to an embodiment of the present invention.

As shown, the exponential function generator according to an embodiment of the present invention is connected between the power supply voltage terminal V _DD and the first output node C21 and driven by the control voltage V _C to supply the control voltage. A first transistor P21 for converting into a signal, a first current source I21 connected in parallel with the first transistor P21, a first output node C21 and a ground terminal V _SS connected to each other to form a first output node ( The third transistor N21 driven by the voltage applied to the C21, the control voltage V _C is connected between the input terminal and the second output node C22, and the third transistor driven by the ground voltage V _SS ( P22, the second current source I22 connected between the power supply voltage terminal V _DD and the second output node C22, and the second output node C22 and the ground terminal V _SS connected to each other. And a fourth transistor N22 driven by a voltage applied to C22.

Here, the first and third transistors P21 and P22 are P-type transistors, and a body and a source are commonly connected to minimize the body effect. In the present embodiment, since the first and third transistors P21 and P22 that receive the control voltage V _C and convert it into a current signal have the same type, the linearity of the exponential function generator can be secured stably.

In addition, the second and fourth transistors N21 and N22 are N-type transistors.

In addition, the first and second current sources I21 and I22 generate the same amount of current and may be configured as a variable current source. For example, the first current source I21 may be configured as a transistor connected between the power supply voltage terminal V _DD and the first output node C21 and driven by a current control voltage IO _C applied from the outside. have. In addition, the second current source (I22) is connected between the power supply voltage terminal (V _DD) and the second output node (C22) can be configured as a transistor which is driven by a current control voltage (IO _C).

By varying the amount of current generated by the first and second current sources I21 and I22, the slope of the dB scale curve with respect to the exponential function, that is, the gain variable width, can be adjusted.

In addition, the exponential function generator shown in FIG. 3 requires a current mirror composed of the second and third transistors P12 and P13 to equally use the current flowing in the second node K12 at the output terminal. As a result, the total amount of current flowing through the first node K11, the second node K12, and the fourth node K14 becomes IC1 + 2IC2.

However, the exponential function generator of the present invention shown in Fig. 4 has an amount of current flowing through the first and second output nodes C21 and C22 as IC1 + IC2, so it is about 2/3 of the exponential function generator shown in Fig. 3. The amount of current is reduced.

This not only reduces the operating current of the exponential generator, but also improves the degree of integration by reducing the device configuration.

Referring to the exponential characteristics of the exponential generator shown in Figure 4 as follows.

In FIG. 3, if the first and second transistors P11 and N11 are the same type, for example, P-type transistors, Equations 5 and 6 may be modified as follows.

[Equation 10]

[Equation 11]

Accordingly, IC1 and IC2 are represented as follows.

[Equation 12]

[Equation 13]

And since V _DD = -V _SS can be summarized as follows.

[Equation 14]

,

,

이며, 결국 [수학식 4]와 같은 형태를 가짐을 알 수 있다.In Equation 14,

,

,

It can be seen that eventually has the form as shown in [Equation 4].

라고 가정하는 것이 아니라, 실제로 Kp=K,

가 되도록 구현함으로써, 지수함수 발생기의 동작 특성을 개선할 수 있다.Thus, in the present invention, Kp = Kn = K,

Rather than assuming that Kp = K,

By implementing so as to improve the operating characteristics of the exponential generator.

5 is a configuration diagram of an exponential function generator according to another embodiment of the present invention.

In this embodiment, in order to obtain an exponential output characteristic by the control voltage, an N-type transistor having the same operation characteristic and size is used as a CMOS transistor which receives the control voltage V _C and converts it into a current signal.

That is, in Equations 12 and 13, -V _SS instead of V _{DD and} V _THn instead of V _THp are applied.

Referring to FIG. 5, the exponential function generator according to the present embodiment is connected between the first output node C31 and the ground terminal V _SS and driven by the control voltage V _C to convert the control voltage into a current signal. Is connected between the first transistor N31, the first current source I31 connected in parallel with the first transistor N31, the power supply voltage terminal V _DD , and the first output node C31 so as to be connected to the first output node C31. It is connected between the second transistor P31, the second output node C32, and the control voltage V _C input terminal driven by the voltage applied to and driven by the power supply voltage V _DD to _{convert the} control voltage into a current signal. The third transistor N32 for conversion, the second current source I32 connected in parallel with the third transistor N32 and the power supply voltage terminal V _DD and the second output node C32 are connected to each other. And a fourth transistor P32 driven by a voltage applied to C32.

Here, the first and third transistors N31 and N32 are N-type transistors, and the second and fourth transistors P31 and P32 are P-type transistors. In the present embodiment, since the first and third transistors N31 and N32 that receive the control voltage V _C and convert it into a current signal have the same type, the linearity of the exponential function generator can be stably ensured.

In addition, the first and second current sources I31 and I32 may generate the same amount of current and may be configured as a variable current source. By varying the amount of current, the slope of the dB scale curve with respect to the exponential function, that is, the gain variable width, can be adjusted.

For example, the first current source (I31) can be composed of a transistor driven by the first output node (C31) and the ground terminal is connected between the (V _SS) a current control voltage (IO _C). In addition, the second current source (I32) can be configured as a transistor that is driven by the second output node (C32) and the ground terminal is connected between the (V _SS) a current control voltage (IO _C).

As described above, according to the present invention, the log scale linear characteristics of the exponential function generator can be significantly improved by using CMOS transistors having the same operation characteristics and sizes.

6 is a block diagram of a variable gain amplifier according to an embodiment of the present invention.

As illustrated, the variable gain amplifier 10 includes an exponential function generator 110, a gain controller 120, and an output adjuster 130.

Exponential function generator 110 is a circuit that is connected between the power supply terminal (V _DD ) and the ground terminal (V _SS ) to adjust the output voltage so that the control voltage (V _C ) input from the outside has an exponential function, 4 or 5, it is possible to change the amount of current by the current control voltage (IO _C ) applied from the outside.

The gain control unit 120 may be configured as, for example, a differential amplifier. That is, the input voltage Vin + and Vin− are connected by the control voltages C21 and C22 (or C31 and C32) connected between the power supply voltage terminal V _DD and the ground terminal V _SS and output from the exponential generator 110. The output voltage (Vout +, Vout-) is generated by adjusting the gain of.

The output controller 130 may be configured as, for example, a common mode feedback circuit (CMFB) for fixing the DC level of the output voltages Vout + and Vout− output from the gain controller 120. Can be. That is, the output adjusting unit 130 compares the output voltages Vout + and Vout- and the reference voltage Vref generated by the gain control unit 120 to approximate the output voltages Vout + and Vout- to the reference voltage Vref. To generate a feedback voltage (V _FB ).

FIG. 7 is a detailed circuit diagram according to an example embodiment of the gain control unit shown in FIG. 6, and illustrates the gain control unit when the exponential function generator 110 is configured of a P-type transistor.

As shown, the gain controller 120 is connected between the power supply voltage terminal V _DD and the output terminals Vout + and Vout- and driven by the feedback voltage V _FB output from the output adjusting unit 130 to output the same. It is connected between the level holder 1210 and the output terminals Vout + and Vout- and the ground terminal V _SS to fix the DC voltage levels of the terminals Vout + and Vout-, and the input voltages Vin + and Vin- and the regulating voltage. And a gain regulator 1220 driven by C21 and C22 to adjust gains of the input voltages Vin + and Vin−.

More specifically, the level holder 1210 is connected between the power supply voltage terminal V _DD and the first output terminal Vout + and driven by the feedback voltage V _FB and the power supply voltage terminal (F41). V _DD ) and a sixth transistor P42 connected between the second output terminal Vout− and driven by the feedback voltage V _FB .

Here, the fifth and sixth transistors P41 and P42 may be P-type transistors.

Meanwhile, the gain regulator 1220 is connected between the first output terminal Vout + and the first node K71 and driven by the second input voltage Vin−, the seventh transistor N41 and the first node K71. And a ninth transistor connected between the ground terminal V _SS and the diode connected between the eighth transistor N42 and the first output terminal Vout + and the second node K72 driven by the second control voltage C22. N43, a tenth transistor N44, a second output terminal Vout- and a second connected between the second output terminal Vout- and the first node K71 and driven by the first input voltage Vin +. An eleventh transistor N45 diode-connected between the nodes K72 and a twelfth transistor N46 connected between the second node K72 and the ground terminal V _SS and driven by the first regulating voltage C21. do.

The seventh to twelfth transistors N41 to N46 may be configured as N-type transistors.

The voltages output from the first and second output terminals Vout + and Vout− may be fixed to a desired DC level by the feedback voltage V _FB .

FIG. 8 is a detailed circuit diagram according to an embodiment of the output adjuster illustrated in FIG. 6, and illustrates an output adjuster when the exponential function generator 110 is configured of a P-type transistor.

In the present invention, the output control unit 130 may be configured as a CMFB circuit, and includes an equalizer 1310 and a comparator 1320.

The equalizer 1310 is for equalizing the potentials of the feedback voltage output node V _FB and the third node K81, and is connected between the power supply voltage terminal V _DD and the feedback voltage output node V _FB so as to be equal to the third node. A thirteenth transistor P51 driven by a voltage applied to K81 and a fourteenth transistor P52 diode-connected between the power supply voltage terminal V _DD and the third node K81 are included.

The comparator 1320 receives the first and second output voltages Vout + and Vout− and the reference voltage Vref, and outputs a feedback voltage V _FB according to a comparison result. ) Is connected between the fourth node (K82) and the fourth node (N51), the feedback voltage output node (V _FB ) and the fourth node (K82) driven by the first output voltage (Vout +) of the gain control unit 120. The third current source I41 and the feedback voltage output node V _FB connected between the sixteenth transistor N52, the fourth node K82, and the ground terminal V _SS connected to each other and driven by the reference voltage Vref. Is connected between the fifth node K83 and the seventeenth transistor N53, which is driven by the reference voltage Vref, and is connected between the third node K81 and the fifth node K85 to form a second portion of the gain controller 120. including a fourth current source (I42) connected between the eighteenth transistor (N54) and a fifth node (K83) and the ground terminal (V _SS) that is driven by the output voltage (Vout-) .

Here, the thirteenth and fourteenth transistors P51 and P52 may be configured as P-type transistors, and the fifteenth to eighteenth transistors N51 to N54 may be configured as N-type transistors.

The output adjusting unit 130 controls the level stabilizer 1210 of the gain control unit 120 according to a comparison result between the reference voltage Vref and the output voltages Vout + and Vout− of the gain control unit 120. A fixed DC level voltage is output from the controller 120.

FIG. 9 is a detailed circuit diagram according to another embodiment of the gain control unit shown in FIG. 6, and illustrates the gain control unit when the exponential function generator 110 is configured of an N-type transistor as shown in FIG. 5.

As shown, the gain control unit 120-1 is connected between the power supply voltage terminal V _DD and the output terminals Vout + and Vout- and is controlled by the input voltages Vin + and Vin- and the control voltages C31 and C32. It is connected between the gain regulator 1230 and the output terminals (Vout +, Vout-) and the ground terminal (V _SS ) driven to adjust the gains of the input voltages (Vin +, Vin-) and the output regulator (130-1 in FIG. 10). And a level holder 1240 which is driven by the feedback voltage V _FB which is output from the E, and fixes the DC voltage levels of the output terminals Vout + and Vout−.

More specifically, the gain regulator 1230 is connected between the power supply voltage terminal V _DD and the sixth node K91 and driven by the first adjustment voltage C31 to the nineteenth transistor P61 and the sixth node K91. Twenty-first transistor P62 is diode-connected between the first output terminal Vout + and the power supply voltage terminal V _DD and the seventh node K92 and is driven by the second control voltage C32. The twenty-second transistor P64, the sixth node K91, and the second, connected between the transistor P63, the seventh node K92, and the first output terminal Vout + and driven by the second input voltage Vin−. Twenty-third transistor P65 diode-connected between output terminals Vout- and twenty-fourth transistor connected between seventh node K92 and second output terminal Vout-, and driven by a first input voltage Vin +. (P66).

Here, the nineteenth through twenty-fourth transistors P61 to P66 may be configured as P-type transistors.

On the other hand, the level holder 1240 is connected between the first output terminal Vout + and the ground terminal V _SS and driven by the feedback voltage V _FB to the twenty-fifth transistor N61 and the second output terminal Vout−. ) Is connected to the ground terminal (V _SS ) and driven by the feedback voltage (V _FB ).

Here, the 25th and 26th transistors N61 and N62 may be N-type transistors.

The voltages output from the first and second output terminals Vout + and Vout- are fixed to a desired DC level by the feedback voltage V _FB .

FIG. 10 is a detailed circuit diagram according to another embodiment of the output adjuster illustrated in FIG. 6, and illustrates the output adjuster when the exponential function generator 110 is configured of an N-type transistor as shown in FIG. 5.

In this embodiment, the output adjusting unit 130-1 may be configured as a CMFB circuit, and includes a comparator 1330 and an equalizer 1340.

First, the comparator 1330 receives the first and second output voltages Vout + and Vout- and the reference voltage Vref, and outputs a feedback voltage V _FB according to a comparison result. _DD ) the fifth current source I51 connected between the eighth node K101 and the twenty-seventh transistor connected between the eighth node K101 and the ninth node K102 and driven by the first output voltage Vout +. P71, a twenty-eighth transistor P72, a power supply voltage terminal V _DD , and a tenth node K103 connected between an eighth node K101 and a feedback voltage output node V _FB and driven by a reference voltage Vref. ) Is connected between the sixth current source (I52), the tenth node (K103) and the feedback voltage output node (V _FB ) driven by the reference voltage (Vref) and the tenth node (K103). ) And a thirtieth transistor P74 connected between the ninth node K102 and driven by the second output voltage Vout-.

Here, the twenty-seventh to thirtieth transistors P71 to P74 may be configured as P-type transistors.

Meanwhile, the equalizer 1340 is for equalizing the potentials of the feedback voltage output node V _FB and the ninth node K102, and is connected between the feedback voltage output node V _FB and the ground terminal V _SS . A thirty-first transistor N71 driven by a voltage applied to the node K102 and a thirty-second transistor N72 diode-connected between the ninth node K102 and the ground terminal V _SS .

The thirty-first and thirty-second transistors N71 and N72 may be configured as N-type transistors.

The output adjuster 130-1 is the level stabilizer 1240 of the gain controller 120-1 according to a comparison result between the reference voltage Vref and the output voltages Vout + and Vout − of the gain controller 120-1. Is controlled to output a fixed DC level voltage from the gain control unit 12001.

On the other hand, the gain of the variable gain amplifier shown in Fig. 7 is as follows.

[Equation 15]

Here, g _m-input is the transconductance of the seventh and tenth transistors N41 and N44 shown in FIG. 7, and g _m-load is the ninth and eleventh transistors N43 shown in FIG. 7. , N45). In addition, W and L represent the channel width and length of the transistor.

Substituting [Equation 14] into [Equation 15] is as follows.

[Equation 16]

이 되고, V_DD =-V_SS 라 하면, 가변 이득 증폭 장치의 이득은 [수학식 17]과 같이 나타내어 진다.If an exponential generator is implemented using a transistor having the same operating characteristics and size,

If V _DD = -V _SS , the gain of the variable gain amplifier is expressed as shown in [Equation 17].

[Equation 17]

,

,

,

,

라 하면, [수학식 17]은 다음과 같이 나타내어진다.From here,

,

,

,

,

[Equation 17] is expressed as follows.

Equation 18

Since β is a constant, the dB scale curve is shifted left or right without affecting the gain variable width.

11 and 12 are graphs showing a change in gain of the variable gain amplifier according to the threshold voltage characteristic.

More specifically, FIG. 11 is a graph showing a gain change according to a threshold voltage difference when β is not considered in Equation 18, that is, when β = 1, and FIG. 12 is a graph of a transistor used in an exponential function generator. It is a graph showing the change in gain according to the threshold voltage difference when the β value changes according to the shape.

일 때(21),

일 때(22),

일 때(23)의 이득 변화를 나타낸다.Assume that each curve of FIG. 11 is Kp = Kn,

When (21),

When (22),

The gain change when (23) is shown.

이기 때문에

인 경우(21)에 비하여 이득 가변 범위가 상이함을 알 수 있다.

Because

It can be seen that the gain variable range is different compared to the case (21).

일 때(31),

일 때(32),

일 때(33)의 이득 변화를 나타내었다.12 assumes that Kp = Kn,

When (31),

When (32),

The gain change when (33) is shown.

이기 때문에

인 경우(31)에 비하여 이득 가변 범위가 상이함을 알 수 있다.As can be seen in Figure 12,

Because

It can be seen that the gain variable range is different compared to the case (31).

11 and 12, it can be seen that the dB scale curve is shifted to the left or the right as β changes. That is, when β is fixed as shown in FIG. 11 without considering the characteristics of the transistor, the output characteristic of the exponential function generator may be changed.

(도 4의 지수함수 발생기) 또는

(도 5의 지수함수 발생기)이므로, 주변 상황에 따라 트랜지스터의 문턱전압이 변화하여도 고정된 이득 제어 특성을 얻을 수 있다.Therefore, in the exponential function generator of the present invention using a CMOS transistor having the same operating characteristics and size,

(Exponential generator of FIG. 4) or

Since the exponential generator of Fig. 5 is used, fixed gain control characteristics can be obtained even when the threshold voltage of the transistor changes depending on the surrounding conditions.

FIG. 13 is a graph illustrating a gain change of a variable gain amplifier according to process variable variations of an N type transistor and a P type transistor.

인 경우 즉, η=1일 때,

에 대하여 δ=1인 경우(41), δ=1.1인 경우(42) 및 δ=0.9인 경우(43)에 대한 제어 전압에 따른 이득 변화를 나타내었다.

In other words, when η = 1,

The gain change according to the control voltage for the case of δ = 1 (41), δ = 1.1 (42) and δ = 0.9 (43) is shown.

As can be seen in FIG. 13, since the process variables (carrier mobility, gate capacitance), channel length, and width of the N-type transistor and the P-type transistor are not the same, it can be seen that the gain also changes as the value of δ changes. .

On the other hand, when the control voltage is converted to the current signal using the same type of transistor as in the present invention, since the value of δ is fixed to 1, fixed gain control characteristics can be obtained even when the surrounding conditions change.

Variable gain amplifying apparatus according to the present invention comprises a current control voltage to the variable (IO _C) can be varied the gain characteristic of the auto-amplification device, it is possible to control the gain variable range, depending on the type of system used.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

Exponential function generator according to the present invention can be implemented in a CMOS device can be manufactured through a low manufacturing cost and a simple process. Therefore, it can be widely applied to various systems including a variable gain amplifier.

In addition, the variable gain amplifier having the exponential function generator according to the present invention has a gain characteristic linearly proportional to the control voltage, so that the gain variable range is wide, and the gain variable range can also be adjusted by changing the current control voltage. .

110: exponential function generator 120: gain control unit
130: output control unit 1210, 1240: level fixing
1220, 1230: gain adjuster 1310, 1340: equalizer
1320, 1330: Comparators

Claims (10)

An exponential function generator connected between a power supply voltage terminal and a ground terminal to regulate the control voltage so as to have an exponential function and output first and second adjustment voltages;
A gain control unit connected between the power supply voltage terminal and the ground terminal to generate first and second output voltages by adjusting gains of first and second input voltages by the first and second adjustment voltages and a feedback voltage; And
And an output adjuster configured to compare the first and second output voltages with a reference voltage to generate the feedback voltage and provide the feedback voltage to the gain controller.
The exponential function generator includes a first transistor connected between the power supply voltage terminal and a first output node for outputting the first regulated voltage and driven by the control voltage, and a first current source connected in parallel with the first transistor. And a third transistor diode-connected between the first output node and the ground terminal and a second output node connected to the control voltage input terminal and the second output node for outputting the second regulated voltage and driven by a ground voltage. And a second current source connected between the power supply voltage terminal and the second output node and a fourth transistor diode-connected between the second output node and the ground terminal. The method of claim 1,
The first and third transistors are P-type transistors, the body and the source are commonly connected,
The second and fourth transistors are N type transistors,
And the first and second current sources generate the same amount of current. The method of claim 2,
And the first and second current sources are variable current sources. The method of claim 1,
The gain control unit is a differential amplifier, connected between the power supply voltage terminal and the first and second output terminals, driven by the feedback voltage to fix a level of a voltage applied to the first and second output terminals. Routine; And connected between the first and second output terminals and the ground terminal, and driven by the first and second input voltages and the first and second adjustment voltages to adjust gains of the first and second input voltages. A gain regulator for outputting to the first and second output terminals,
The level holder includes: a fifth transistor connected between the power supply voltage terminal and the first output terminal and driven by the feedback voltage; And a sixth transistor connected between the power supply voltage terminal and the second output terminal and driven by the feedback voltage.
The gain regulator includes: a seventh transistor connected between the first output terminal and the first node and driven by the second input voltage; An eighth transistor connected between the first node and the ground terminal and driven by the second control voltage; A ninth transistor diode-connected between the first output terminal and a second node; A tenth transistor connected between the second output terminal and the first node and driven by the first input voltage; An eleventh transistor diode-connected between the second output terminal and the second node; And a twelfth transistor connected between the second node and the ground terminal and driven by the first control voltage.
Variable gain amplification device comprising a. The method of claim 1,
The output adjuster is a common mode feedback circuit, comprising: an equalizer for equalizing a potential of a feedback voltage output node and a third node; And a comparator connected to the equalizer for receiving the first and second output voltages and the reference voltage and outputting the feedback voltages according to a comparison result.
The equalizer includes: a thirteenth transistor connected between the power supply voltage terminal and the feedback voltage output node and driven by a voltage applied to the third node; And a fourteenth transistor diode-connected between the power supply voltage terminal and the third node.
The comparator includes: a fifteenth transistor connected between the third node and a fourth node and driven by the first output voltage; A sixteenth transistor connected between the feedback voltage output node and the fourth node and driven by the reference voltage; A third current source connected between the fourth node and the ground terminal; A seventeenth transistor connected between the feedback voltage output node and a fifth node and driven by the reference voltage; An eighteenth transistor connected between the third node and the fifth node and driven by the second output voltage; And a fourth current source connected between the fifth node and the ground terminal.
Variable gain amplification device comprising a. An exponential function generator connected between a power supply voltage terminal and a ground terminal to regulate the control voltage so as to have an exponential function and output first and second adjustment voltages;
A gain control unit connected between the power supply voltage terminal and the ground terminal to generate first and second output voltages by adjusting gains of first and second input voltages by the first and second adjustment voltages and a feedback voltage; And
And an output adjuster configured to compare the first and second output voltages with a reference voltage to generate the feedback voltage and provide the feedback voltage to the gain controller.
The exponential function generator includes: a first transistor connected between a first output node for outputting the first regulated voltage and the ground terminal and driven by the control voltage; and a first current source connected in parallel with the first transistor; A second transistor diode-connected between the power supply voltage terminal and the first output node, a second output node for outputting the second regulated voltage and the control voltage input terminal and driven by the power supply voltage; And a third transistor, a second current source connected in parallel with said third transistor, and a fourth transistor diode-connected between said power supply voltage terminal and said second output node. The method according to claim 6,
The first and third transistors are N-type transistors,
The second and fourth transistors are P-type transistors,
And the first and second current sources generate the same amount of current. The method of claim 7, wherein
And the first and second current sources are variable current sources. The method according to claim 6,
The gain control unit is a differential amplifier, connected between the power supply voltage terminal and the first and second output terminals, and driven by the first and second input voltages, the first and second regulating voltages, so that the first and second A gain regulator for adjusting the gain of the two input voltages; And a level holder connected between the first and second output terminals and the ground terminal and driven by the feedback voltage to fix the level of the voltage applied to the first and second output terminals.
The gain regulator includes a nineteenth transistor connected between the power supply voltage terminal and a sixth node and driven by the first regulation voltage; A twentieth transistor diode connected between the sixth node and the first output terminal; A twenty-first transistor connected between the power supply voltage terminal and a seventh node and driven by the second control voltage; A twenty-second transistor connected between the seventh node and the first output terminal and driven by the second input voltage; A twentythird transistor diode-connected between the sixth node and the second output terminal; And a twenty-four transistor connected between the seventh node and the second output terminal and driven by the first input voltage.
The level holder includes a twenty-fifth transistor connected between the first output terminal and the ground terminal and driven by the feedback voltage; And a twenty sixth transistor connected between the second output terminal and the ground terminal and driven by the feedback voltage;
Variable gain amplification device comprising a. The method according to claim 6,
The output regulator is a common mode feedback circuit,
A comparator for receiving the first and second output voltages and the reference voltage and outputting the feedback voltages according to a comparison result; And an equalizer connected to the comparator to equalize the potentials of the feedback voltage output node and the ninth node.
The comparator includes: a fifth current source connected between the power supply voltage terminal and an eighth node; A 27th transistor connected between the eighth node and the ninth node and driven by the first output voltage; A twenty eighth transistor connected between the eighth node and the feedback voltage output node and driven by the reference voltage; A sixth current source connected between the power supply voltage terminal and a tenth node; A twentyninth transistor connected between the tenth node and the feedback voltage output node and driven by the reference voltage; And a thirtieth transistor connected between the tenth node and the ninth node and driven by the second output voltage.
The equalizer includes: a thirty first transistor connected between the feedback voltage output node and the ground terminal and driven by a voltage applied to the ninth node; And a thirty-second transistor diode connected between the ninth node and the ground terminal.
Variable gain amplification device comprising a.

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