KR101034333B1 - 스위칭 소자 제조방법 및 이에 의하여 제조된 스위칭 소자 - Google Patents
스위칭 소자 제조방법 및 이에 의하여 제조된 스위칭 소자 Download PDFInfo
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- KR101034333B1 KR101034333B1 KR1020090013423A KR20090013423A KR101034333B1 KR 101034333 B1 KR101034333 B1 KR 101034333B1 KR 1020090013423 A KR1020090013423 A KR 1020090013423A KR 20090013423 A KR20090013423 A KR 20090013423A KR 101034333 B1 KR101034333 B1 KR 101034333B1
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- thin film
- switching device
- multilayer thin
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3241—Materials thereof being conductive materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3244—Layer structure
- H10P14/3251—Layer structure consisting of three or more layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3438—Doping during depositing
- H10P14/3441—Conductivity type
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3451—Structure
- H10P14/3452—Microstructure
- H10P14/3461—Nanoparticles
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/90—Thermal treatments, e.g. annealing or sintering
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Abstract
Description
Claims (10)
- 하부 전극 상에 고분자 박막 및 티타늄 전구체 박막을 반복적으로 적층하여, 다층 박막을 제조하는 단계;상기 다층박막을 열처리하여, 상기 다층박막의 티타늄 전구체 박막을 티타늄 산화물 박막으로 전환시키는 단계; 및상기 다층 박막 상에 상부 전극을 적층하는 단계를 포함하며, 여기에서 상기 다층박막의 열처리는 무산소 조건인 질소 분위기하에서 수행되는 열처리 단계와, 상기 질소 분위기 하에서 수행된 열처리 단계 후 산소 분위기 하에서 수행되는 열처리 단계로 이루어진 것을 특징으로 하는 스위칭 소자 제조방법.
- 제 1항에 있어서,상기 다층박막은 LbL 자기조립법에 의하여 적층되는 것을 특징으로 하는 스위칭 소자 제조방법.
- 제 1항에 있어서,상기 고분자는 폴리(알릴아민 하이드로클로라이드)(PAH)이고, 상기 티타늄 전구체는 티타늄(IV) 비스(암모늄 락테이트)디하이드록사이드(TALH)인 것을 특징으로 하는 스위칭 소자 제조방법.
- 삭제
- 제 1항에 있어서,상기 다층박막은 금속 나노입자를 더 포함하는 것을 특징으로 하는 스위칭 소자 제조방법.
- 제 5항에 있어서,상기 금속 나노입자의 삽입량에 따라 상기 스위칭 소자의 바이폴라 특성을 조절하는 것을 특징으로 하는 스위칭 소자 제조방법.
- 제 1항 내지 제 3항, 제 5항 또는 제 6항 중 어느 한 항에 따른 스위칭 소자 제조방법에 의하여 제조된 것을 특징으로 하는 스위칭 소자.
- 제 7항에 있어서,상기 스위칭 소자는 상, 하부 전극 및 상기 전극 사이에 게재되는 다층박막을 포함하며, 상기 다층박막은 티타늄 산화물 박막 및 고분자 박막을 포함하는 것을 특징으로 하는 스위칭 소자.
- 제 8항에 있어서,상기 티타늄 산화물 박막은 티타늄(IV) 비스(암모늄 락테이트)디하이드록사 이드(TALH)를 열처리함으로써 제조된 것을 특징으로 하는 스위칭 소자.
- 제 8항에 있어서,상기 다층박막은 금속나노입자를 더 포함하며, 상기 스위칭 소자는 상기 다층박막의 층수가 증가할수록 스위칭 소자의 ON/OFF 비율이 증가하는 것을 특징으로 하는 스위칭 소자.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020090013423A KR101034333B1 (ko) | 2009-02-18 | 2009-02-18 | 스위칭 소자 제조방법 및 이에 의하여 제조된 스위칭 소자 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020090013423A KR101034333B1 (ko) | 2009-02-18 | 2009-02-18 | 스위칭 소자 제조방법 및 이에 의하여 제조된 스위칭 소자 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100094136A KR20100094136A (ko) | 2010-08-26 |
| KR101034333B1 true KR101034333B1 (ko) | 2011-05-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020090013423A Expired - Fee Related KR101034333B1 (ko) | 2009-02-18 | 2009-02-18 | 스위칭 소자 제조방법 및 이에 의하여 제조된 스위칭 소자 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR101034333B1 (ko) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102863242B1 (ko) * | 2023-01-17 | 2025-09-23 | 광운대학교 산학협력단 | 포토닉 인메모리 컴퓨팅을 위한 오산화탄탈룸 기반 멤리스터 및 그 제조방법 |
| KR102777866B1 (ko) * | 2023-02-03 | 2025-03-11 | 연세대학교 산학협력단 | TaO2 박막을 포함하는 멤리스터 소자 및 이의 제조 방법 |
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2009
- 2009-02-18 KR KR1020090013423A patent/KR101034333B1/ko not_active Expired - Fee Related
Non-Patent Citations (2)
| Title |
|---|
| 조진한, "Layer-by-Layer 자기조립다층박막의 정량적 분석 연구", 고분자 과학과 기술, 2008. 2. |
| 조진한, 김인표, "Resisitive Swtiching Memory Devices...", 한국고분자학회 2008년도 추계 총회 및 학술대회, 2008. 10. |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20100094136A (ko) | 2010-08-26 |
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