KR101019164B1 - X-ray image sensor and method for reading out the same - Google Patents

Abstract

PURPOSE: An X-ray image sensor and a reading method thereof are provided to read a reading energy of a large amount generated from pixels in high speed. CONSTITUTION: The size of an X-ray, which a plurality of pixels(11) of a pixel array(12) is incidented, is quantized into a pixel data. A low decoder(13) selects one row of pixels in the pixel array. Each row of pixels in the pixel array shares an L number of output buses. To outputs each pixel data from at least one selected pixel, the L numbers of output bus are connected. A register(15) temporarily stores pixel data transmitted through the output bus.

Description

X-ray image sensor and its reading method {X-RAY IMAGE SENSOR AND METHOD FOR READING OUT THE SAME}

The present invention relates to an X-ray image sensor, and more particularly, to a high speed X-ray image sensor having a pixel array.

The X-ray image sensor is a kind of image sensor for detecting X-rays on a pixel-by-pixel basis in a digital X-ray imaging apparatus to make a digital image.

Until now, various X-ray sensors have been developed to detect X-rays using phenomena such as photosensitivity, photoelectron phenomena, scintillation, and radiation fluorescence. Recently, efforts have been made to digitize X-ray images. At the earliest, a method of digitizing an X-ray image photographed on a film with a digital camera or using a scanner has been proposed. X-rays are passed through a scintillation layer to convert them into visible light and then digitally photographed using a digital camera.

Most recently, attempts have been made to acquire digital signals directly from pixels receiving X-rays. X-rays are also one of the high-energy photons, which can generate electron-charge pairs when passing through the semiconductor depletion region of a photo diode (PD). An X-ray image sensor using the same has been proposed.

When the X-ray penetrating the subject tissue reaches the photodiode region of the X-ray sensor, the electrons staying in the valence band receive the photon energy of the X-ray, and surpass the band gap energy gap to conduction band. Excitation).

Initially, there are no electrons or holes in the depletion region of the photodiode, but this excitation causes a large amount of electron-hole pairs to be generated in the depletion region. As the electron-hole pair moves by an electric field, current flows, and when the magnitude of the current is detected, the size data of X-rays passing through the subject and reaching the pixels can be obtained. Can be.

A photon counting mode is widely used as a method of measuring current by incident X-rays. When a photon corresponding to the energy of X-rays is incident, a current generated by the flow of electron-holes is converted into a voltage signal, amplified, and input to a comparator. The comparator compares the amplified voltage signal with a reference voltage and outputs a pulse, and the counter counts the output pulse of the comparator per unit time, thereby measuring the magnitude of the incident X-rays. The effect of noise is small, radiation exposure can be reduced, and data can be obtained in digital form.

A typical visible light image sensor can digitize the current generated by a pixel by sharing one sampling circuit and a digital conversion circuit adjacent to the pixel array, while an X-ray image sensor is very sensitive to noise because the current generated by a pixel by X-rays is very sensitive to noise. It is desirable to digitize the intensity of X-rays incident at each pixel position.

Therefore, there is a need for an architecture that can generate, process, and output read data at pixel speed.

An object of the present invention is to provide an X-ray image sensor and a reading method capable of generating, processing, and outputting read data at high speed for each pixel.

X-ray image sensor according to an aspect of the present invention,

A pixel array including a plurality of pixels in M rows and L columns for quantizing the size of incident X-rays into N bits of pixel data;

L output buses connected to output pixels data shared by pixels belonging to respective columns in the pixel array;

A row decoder for specifying and selecting pixels belonging to one row in the pixel array;

A column decoder for selecting and selecting at least one pixel belonging to a row selected by the row decoder for each column; And

And a register for temporarily storing the pixel data transmitted through the output bus.

According to an embodiment, the output bus may be a parallel output bus having N transmission lines to transmit N bits of pixel data in parallel.

According to one embodiment, further comprising a common output bus commonly connected to the L output bus,

The pixel data is coupled to the register via the common output bus,

The row decoder and the column decoder may be operable to sequentially select pixels corresponding to a specific column in a specific row of the pixel array one by one.

According to one embodiment, the N bit registers are connected one to each of the L output buses,

The row decoder and the column decoder may be operable to simultaneously select pixels corresponding to a particular row of the pixel array.

According to one embodiment, the output bus constitutes a Y group of output buses connected to X columns where X * Y = L,

Connected to each of the Y registers such that X pixel data are simultaneously transmitted from X output buses belonging to each group,

The row decoder and the column decoder may be operable to sequentially select X pixels corresponding to a specific column in a specific row of the pixel array.

According to one embodiment, it may be a serial output bus having one transmission line for serially transmitting N bits of pixel data.

X-ray image sensor reading method according to another aspect of the present invention,

Quantizing the size of X-rays incident on each pixel with N bits of pixel data in a pixel array including a plurality of pixels in M rows and L columns;

Specifying and selecting pixels belonging to one row in the pixel array using a row decoder, and specifying and selecting at least one pixel belonging to the selected row using a column decoder by columns;

Outputting pixel data from at least one pixel selected by the column decoder via L output buses connected such that pixels belonging to each column in the pixel array are shared; And

And temporarily storing the pixel data transmitted via the output bus in a register.

Since the X-ray image sensor and the reading method of the present invention can read a large amount of read energy generated in the pixels at high speed, an X-ray image can be obtained at high speed or in real time, and further, an X-ray video can be obtained.

1 is a block diagram schematically illustrating an X-ray image sensor according to an exemplary embodiment of the present invention.
2 is a detailed block diagram illustrating one pixel included in an X-ray image sensor according to an exemplary embodiment.
3 is a waveform diagram illustrating an operation of a pixel included in an X-ray image sensor according to an exemplary embodiment.
4 is a block diagram illustrating wiring of a pixel array of an X-ray image sensor according to an exemplary embodiment of the present invention.
5 is a block diagram illustrating wiring of a pixel array according to another exemplary embodiment of the present invention.
6 is a timing diagram illustrating an operation of an X-ray image sensor according to an exemplary embodiment of the present invention.

With respect to the embodiments of the present invention disclosed in the text, specific structural to functional descriptions are merely illustrated for the purpose of describing embodiments of the present invention, embodiments of the present invention may be implemented in various forms and It should not be construed as limited to the embodiments described in.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention. The same reference numerals are used for the same constituent elements in the drawings and redundant explanations for the same constituent elements are omitted.

1 is a block diagram schematically illustrating an X-ray image sensor according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the X-ray image sensor 10 includes a pixel array 12 in which a plurality of pixels 11 are arranged in a two-dimensional matrix, a row decoder 13, and a column decoder ( 14), an N bit register 15, a controller 16, and an image processor 17 may be included.

The X-ray image sensor 10 outputs one image data every time frame. One time frame may be composed of an X-ray exposure period and an image data reading period. X-rays are incident on the pixel array 12 during the exposure period, pixel data are sequentially transmitted to the N-bit register 15 in the pixels 11 of the pixel array 12 during the readout period, and the pixel data is transferred to the image processor ( 17) combines and outputs one image data.

Each pixel 11 generates N bits of pixel data in which the intensity of incident X-rays is quantized. The configuration and operation of the pixel 11 will be described in more detail later.

The row decoder 13 and the column decoder 14 are addressing circuits, which output pixel data from the pixels 11 at positions specified as rows (rows) and columns (columns) at a specific point of time under the control of the controller 16. To store in the N bit register 15.

For example, a 256x128 pixel array can consist of 128 columns and 256 rows. In this case, the control unit 16 divides the 15-16 bit address signal into a row address signal of upper 8 bits and a column address signal of lower 7 to 8 bits, and then transmits them to the row decoder 13 and the column decoder 14, respectively. do.

The row decoder 13 exclusively selects one row, for example, with a 256 bit select signal decoded an 8 bit row address signal. The decoded 256-bit select signal has only 1 bit corresponding to the row to be selected and all others are zero. On the other hand, the column decoder 14 decodes, for example, a 7-bit column address signal into a 128-bit select signal, to sequentially select each column in one row previously selected.

According to an embodiment, among the pixels 11 in the pixel array 12, pixel data is output at a pixel at a position corresponding to the selected row address and the selected column address. Then, in the next output period, the column address signal is incremented by one, and pixel data is output to the output bus at the pixel at the position corresponding to the next column address in the corresponding row. Pixel data is output to the output bus at each pixel until the last column address in that row is reached. The output bus is connected so that all pixels belonging to one column are shared.

In this case, according to the exemplary embodiment, every pixel data of N bits may be output in parallel through a parallel output bus having N output lines, or may be output in series through a 1-bit output bus. Accordingly, the N bit register 15 receives the pixel data in parallel or in series by one pixel in every output period.

In some embodiments, among the pixels 11 in the pixel array 12, pixel data may be output in parallel or in series at all pixels in the selected row. Subsequently, in the next output period, pixel data is output at pixels of all columns in the next row. In this case, the N bit register 15 receives pixel data corresponding to the number of columns corresponding to the number of columns in parallel or in series in every output period.

The N bit register 15 outputs the input pixel data to the image processor 17, and the image processor 17 combines the image data based on the pixel data of all the pixels and outputs the image data to the outside.

2 is a detailed block diagram illustrating one pixel included in an X-ray image sensor according to an exemplary embodiment.

Referring to FIG. 2, each pixel 11 may be implemented based on a single photon counting sensor including an X-ray incident region 111, an amplifier 112, a comparator 113, and a counter 114. Can be.

The X-ray incident region 111 includes a photodiode PD and generates an amount of charge Q _IN as the X-ray passes through the depletion region of the photodiode PD.

The amplifier 112 receives the charge amount Q _IN and outputs the voltage output CSAOUT converted and amplified into a voltage signal. The charge amount Q _IN is input to the negative terminal of the operational amplifier of the amplifier 112. The positive terminal of the op amp is grounded. The feedback capacitor CF and the feedback resistor RF are connected between the output terminal of the operational amplifier and the negative terminal.

The feedback capacitor CF accumulates charges Q _IN . Since the negative terminal of the operational amplifier is virtually grounded with the positive terminal, the voltage generated across the feedback capacitor CF is generated by the charge Q _IN accumulated in the feedback capacitor CF. Appears in. The voltage output CSAOUT of the amplifier 112 may be obtained by accumulating charge / capacitance, that is, CSAOUT = QIN / CF. As a result, the intensity of the incident X-rays is converted into and obtained in the form of a voltage signal according to the charge generation amount.

The feedback resistor RF determines a time constant for the feedback capacitor CF. In preparation for the next X-ray photon incident, the feedback resistor RF must exhaust the charge accumulated in the feedback capacitor CF within a time determined by the time constant.

The comparator 113 compares the voltage output CSAOUT of the amplifier 112 with a preset reference voltage VTH and outputs a comparison result as a comparison output COMP.

The comparator 113 includes a comparator. The comparator is applied to the voltage output CSAOUT amplified by the amplifier 112 at the positive terminal. The reference voltage VTH is applied to the negative terminal of the comparator.

The comparator compares the voltage output CSAOUT of the amplifier 112 with the reference voltage VTH, and compares the comparison output COMP having a pulse width until the voltage output CSAOUT becomes higher and lower than the reference voltage VTH. Output

The counter 114 counts the comparison output COMP output from the comparator 113. Since the comparison output COMP is output whenever the photons corresponding to the X-rays are incident, the number of times the X-rays are incident on the pixel area per unit time is substantially the same as the number of pulses of the comparison output COMP.

Since the pixel data output from the pixel 11 corresponds to the amount of X-rays exposed to the photodiode region of the pixel within a unit time, the comparison output COMP counted by the counter unit 114 at the end of the unit time. The pulse count may soon be used as pixel data.

The resolution of the counter section 114 is equal to the number of bits of the pixel data and is N bits. For example, if a 5 bit counter is used, the X-ray image sensor 10 composed of the pixels 11 using the counter unit 114 may generate image data having 32 gray levels. Conversely, if the gray level of the X-ray image is to be obtained in 256 steps, an 8-bit counter should be used.

3 is a waveform diagram illustrating an operation of a pixel included in an X-ray image sensor according to an exemplary embodiment.

Referring to FIG. 3, when X-rays are incident on the photodiode PD of the X-ray incident region 111 of the pixel 11, a strong photon energy of the X-rays collides with the lattice to temporarily generate an electron-hole pair. The electron-hole pairs create a weak flow of charge Q _IN as they move with the other electrons or holes or along the electric field formed by the bias of the photodiode PD over time.

Subsequently, as the feeble charge flow Q _IN is accumulated in the feedback capacitor CF of the amplifier, an amplified voltage output CSAOUT having a voltage level of accumulated charge / capacitance, that is, CSAOUT = QIN / CF is generated. The amplified voltage output decays at a rate determined by the time constant of the feedback resistor RF and feedback capacitor CF after reaching the highest level.

The amplified voltage output CSAOUT is compared to the reference voltage VTH at the comparator 1130. The comparison output pulse COMP is generated while the level of the amplified voltage output CSAOUT is higher than the reference voltage VTH.

Finally, the comparison output pulse COMP is applied to the counter section 114 as a counter trigger signal.

4 is a block diagram illustrating wiring of a pixel array of an X-ray image sensor according to an exemplary embodiment of the present invention.

Referring to Fig. 4, the pixel array 42 is composed of pixels 11 arranged in an M * L two-dimensional matrix (M and L are positive integers respectively). Pixels belonging to one column share an N-bit parallel output bus 421 that outputs N bits of pixel data bits D1, D2, D3, ... DN in parallel (N is a positive integer). N bit parallel output buses 421 are arranged every column.

The pixel array 42 may be addressed with M rows and L columns where 2 ^ K> = M. A K-bit row address signal is applied to the row decoder 13 to select M rows one by one.

According to an embodiment, the other ends of the L N bit parallel output buses 421 are all connected to a common output bus (not shown) and there is one N bit register 15 at the end of the common output bus, whereby the N bit register 15 may receive pixel data one pixel per output period and then output the pixel data to the image processor 17.

In this case, the columns connected to the selected row may be selected one by one according to the decoding of the column address signal applied to the column decoder 14.

In another embodiment, L N bit parallel output buses 421 are each connected to L N bit registers 15 one by one so that L N bit registers 15 are L in one row per output period. The pixel data may be received from the pixels of all the columns, respectively (total L * N bits of data at a time) and output to the image processor 17.

In this case, the columns included in the selected row may be selected all at the same time regardless of the decoding of the column address signal applied to the column decoder 14.

Furthermore, in another embodiment, to reduce the number of N bit registers 15 that must be used, a total of Y N bit registers (one for each Y group of X columns with X * Y = L) 15), where X and Y are each positive integers.

In this case, the method of reading pixel data from pixels in each column group may be variously determined.

First, an output bus 13 is connected to a local common bus (not shown) for each column group, and pixel data belonging to each column group through the local common bus at one pixel exclusively selected for each column group each time. Is passed to the N bit register 15. For example, in a pixel array with 1024 columns, if you group eight (X) columns into 128 (Y) groups, you need 128 (Y) N-bit registers. Each of the eight (X) columns may receive N bits of data output through the N bit parallel output bus.

The Y N-bit registers 15 receive pixel data from pixels of one column sequentially selected among the X columns belonging to each column group in one row every output period, and output them to the image processor 17. can do.

In this case, the column decoder 14 may decode the column address signal so that the columns included in the selected row are selected in total Y columns, one column per column group at a time.

In the second embodiment, an X * N bit register 15 is connected to each column group so that N bit pixel data is simultaneously output on X output buses for each column group, and an X * N bit register 15 )

For example, in a pixel array with 1024 columns, group them into 128 (Y) groups of 8 (X) columns, and 128 N-bit registers are output through the N-bit parallel output bus in 8 columns each. Can receive 8 * N bits of data at the same time.

The Y X * N bit registers 15 respectively receive pixel data from all pixels of the X columns belonging to each column group in one row in one output period, and output the X * N bit pixel data to the image processor 17. ) Can be output sequentially.

In this case, the column decoder 14 may decode the column address signal so that the X columns are sequentially selected by the column groups at once in the columns included in the selected row.

5 is a block diagram illustrating wiring of a pixel array according to another exemplary embodiment of the present invention.

Referring to FIG. 5, the pixel array 52 is composed of pixels 11 arranged in an M * L two-dimensional matrix. The pixels belonging to one column share a one-bit serial output bus 521 that serially outputs N bits of pixel data bits D1, D2, D3, ... DN. Serial output buses 521 are arranged every column.

The pixel array 52 has M rows and L columns, and may be addressed with an address signal of K bits. A K-bit address signal is applied to the row decoder to select M rows one by one.

According to an embodiment, the other ends of the L serial output buses 521 are all connected to a common output bus (not shown) and there is one N bit register 15 at the end of the common output bus, so that the N bit register 15 May receive the pixel data serially by one pixel for each output period and output the pixel data to the image processor 17.

In this case, the columns connected to the selected row may be selected one by one according to the decoding of the column address signal applied to the column decoder 14.

In another embodiment, L serial output buses are each connected to L N bit registers (not shown), so that L N bit registers are pixels from all L columns of pixels in one row per output period. The data may be serially received and output to the image processor 17.

In this case, the columns connected to the selected row may all be selected at the same time regardless of the decoding of the column address signal applied to the column decoder 14.

Furthermore, in another embodiment, a total of Y N bit registers, one for every Y groups of X columns with X * Y = L, to reduce the number of N bit registers 15 that must be used. It may be connected to (15). For example, in a pixel array with 1024 columns, group them into 64 groups of 16 columns, and 64 N-bit registers simultaneously output 16 serial data output from 16 columns through a 1-bit serial output bus. Can be received serially.

As described above, the Y N-bit registers 15 may receive the pixel data in series from the pixels of the X columns in one row for each output period and output them to the image processor 17.

In this case, the column decoder 14 may decode the column address signal so that the columns included in the selected row are selected by X columns in one output period.

6 is a timing diagram illustrating an operation of an X-ray image sensor according to FIG. 4.

Referring to FIG. 6, K bit address signals CS <1>, CS <2>, CS <3>, ..., CS <K> are continuously applied in every output period, and in every output period. Each single pixel is selected, and the selected pixels output pixel data.

Pixel data D <1>, D <2>, ..., D <N> are output in accordance with the rising edge of the clock signal. In the first output period, an address signal for selecting pixel 1 is applied, and pixel data of pixel 1 is loaded on the parallel output bus. In the second output period, an address signal for selecting pixel 2 is applied, and pixel data of pixel 2 is loaded on the parallel output bus. This pixel-by-pixel reading process is repeated until pixel data is output from all pixels.

As described above, although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited to the above-described embodiments, which can be variously modified and modified by those skilled in the art. Modifications are possible. Accordingly, the spirit of the invention should be understood only by the claims set forth below, and all equivalent or equivalent modifications will fall within the scope of the invention.

10 X-ray image sensor 11 pixels
12-pixel array 13-row decoder
14 column decoder 15 registers
16 control unit 17 image processing unit
111 X-ray incident region 112 Amplifier
113 comparison section 114 counter section
421, 521 output buses

Claims (7)

A pixel array including M rows and L columns, each pixel quantizing the size of the incident X-rays into N bits of pixel data, where N, M, and L are each positive integers. ;
A row decoder for specifying and selecting pixels belonging to one row in the pixel array;
L output buses shared by pixels belonging to each column in the pixel array and connected to output respective pixel data from at least one selected pixel; And
And a register to temporarily store pixel data transmitted through the output bus. The X-ray image sensor of claim 1, wherein the output bus is a parallel output bus having N transmission lines to transmit N bits of pixel data in parallel. The register of claim 2, wherein the register is connected to each of the L output buses one by one;
The row decoder is operative to simultaneously select pixels corresponding to a particular row of the pixel array. The system of claim 2, further comprising: a common output bus commonly connected to the L output buses; And
A column decoder for specifying and selecting at least one pixel belonging to a row selected by the row decoder for each column,
The pixel data is coupled to the register via the common output bus,
The row decoder and the column decoder operate to sequentially select pixels corresponding to a specific column in a specific row of the pixel array one by one. The method of claim 2, further comprising: a column decoder for specifying and selecting at least one pixel belonging to a row selected by the row decoder for each column,
The output bus constitutes Y groups of output buses connected to X columns where X * Y = L (where X and Y are each positive integers).
Connected to each of the Y registers such that X pixel data are simultaneously transmitted from X output buses belonging to each group,
And the row decoder and the column decoder operate to sequentially select X pixels corresponding to a specific column in a specific row of the pixel array. The X-ray image sensor of claim 1, wherein the X-ray image sensor is a serial output bus having one transmission line for serially transmitting N bits of pixel data. Quantizing the size of X-rays incident on each pixel with N bits of pixel data in a pixel array including a plurality of pixels in M rows and L columns;
Specifying and selecting pixels belonging to one row in the pixel array using a row decoder, and specifying and selecting at least one pixel belonging to the selected row using a column decoder by columns;
Outputting pixel data from at least one pixel selected by the column decoder via L output buses connected such that pixels belonging to each column in the pixel array are shared; And
And temporarily storing pixel data transmitted through the output bus in a register.

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