KR101013483B1 - Method of manufacturing semiconductor device - Google Patents

Abstract

The present invention relates to a method for manufacturing a semiconductor device using a silica-based insulating film, and to provide a method for manufacturing a semiconductor device capable of recovering an increase in dielectric constant due to damage of dry etching and preventing an increase in dielectric constant due to air standing. The purpose.

Damage to dry etching is formed by forming an insulating film 102 of a silica-based insulating material on the semiconductor substrate 100, processing the insulating film 102 by dry etching, and acting a silane compound on the processed insulating film 102. By reacting the silane compound with the Si-OH bond introduced into the insulating film 102 by hydrophobization, and irradiating the insulating film 102 with light or electron beam irradiation, the Si-OH bond not reacted with the silane compound is condensed.

Description

Manufacturing method of semiconductor device {METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device having a step of processing a silica-based insulating film.

As the integration degree of semiconductor integrated circuits increases and the device density improves, the demand for multilayering of semiconductor devices is increasing. On the other hand, with high integration, wiring intervals become narrow, and the wiring delay by the increase of the capacitance between wirings becomes a problem.

The wiring delay T is affected by the wiring resistance and the capacitance between the wirings, and if the wiring resistance is R and the capacitance between the wirings is C,

T ∝ CR

Expressed as In this equation, when the wiring interval is d, the electrode area (side area of the opposing wiring) is S, the dielectric constant of the insulating material provided between the wirings is represented by ε _r and the vacuum dielectric constant is denoted by ε _O , the capacitance C between the wirings. silver,

C = ε _o ε _r S / d

Expressed as Therefore, in order to reduce wiring delay, the low dielectric constant of an insulating film becomes an effective means.

Conventionally, as the insulating material, it has been the use of an organic polymer, such as silicon dioxide (SiO _2), silicon nitride (SiN), sanyuri phosphorus (PSG) or an inorganic film such as polyimide. However, the dielectric constant of the CVD-SiO ₂ film most commonly used in semiconductor devices is about four. The SiOF film, which has been studied as a low dielectric constant CVD film, has a dielectric constant of about 3.3 to 3.5 but has high hygroscopicity, and the dielectric constant increases with moisture absorption.

Also, recently, a porous insulating film has attracted attention as an insulating material having a lower dielectric constant. The porous insulating film is obtained by adding an organic resin or the like which is evaporated or decomposed by heating to a low dielectric constant film forming material, and by evaporating or decomposing it by heating at the time of film formation to make it porous.

Silica-based insulating films, in particular porous insulating films, sometimes cause processing damage in the process of forming a multi-layered wiring so that the effective dielectric constant may increase. On the other hand, the method of recovering a damaged layer by drying under reduced pressure after surface-treating the surface of the interlayer insulation film after dry etching with a silazane compound is proposed. Moreover, the method of recovering a damage layer is proposed by processing silane compounds, such as a silazane or an alkoxysilane, an acetoxysilane, to an insulating film.

[Patent Document 1] Japanese Patent Publication No. 2004-511896

[Patent Document 2] Japanese Patent Application Laid-Open No. 2005-217143

[Patent Document 3] Japanese Patent Application Laid-Open No. 2005-340288

[Patent Document 4] Japanese Patent Application Laid-Open No. 2006-104418

[Patent Document 5] Japanese Patent Laid-Open No. 2006-203060

[Patent Document 6] Japanese Unexamined Patent Publication No. 2006-073800

[Patent Document 7] Japanese Unexamined Patent Publication No. 2006-190962

[Patent Document 8] Japanese Patent Application Laid-Open No. 2004-277463

[Patent Document 9] Japanese Unexamined Patent Publication No. 2000-188331

[Patent Document 10] Japanese Unexamined Patent Publication No. 2006-049798

[Patent Document 11] Japanese Unexamined Patent Publication No. 2006-086411

However, when the inventors of the present application examined, the dielectric constant of the insulating film after processing was recovered immediately after the surface treatment, but it was found that the dielectric constant rose again for about one week.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device using a silica-based insulating film. It is to provide a manufacturing method.

According to one aspect of the embodiments, a step of forming an insulating film of a silica-based insulating material on a semiconductor substrate, a step of processing the insulating film, a step of hydrophobization by applying a silane compound to the processed insulating film, and the insulating film The manufacturing method of the semiconductor device containing the process of irradiating light or an electron beam to this is provided.

According to another aspect of the embodiment, a step of forming an insulating film of a silica-based insulating material on a semiconductor substrate, a step of forming an opening in the insulating film by dry etching, and on the insulating film on which the opening is formed And a step of forming a conductive film, and a step of forming a wiring including the conductive film embedded in the opening, by removing the conductive film on the insulating film by polishing, and forming the opening and forming the conductive film. Manufacturing a semiconductor device further comprising a step of hydrophobizing by acting a silane compound on the insulating film during at least one of the step of forming the wiring and the step of forming the wiring; A method is provided.

According to the disclosed semiconductor device manufacturing method, an increase in dielectric constant of an insulating film due to processing damage can be restored, and an increase in dielectric constant due to air standing can be prevented. As a result, an insulating film having high reliability at low dielectric constant can be obtained. In addition, by applying the insulating film to, for example, an interlayer insulating film of a multilayer wiring structure, the response speed of the semiconductor device can be increased.

[First Embodiment]

The manufacturing method of the semiconductor device by 1st Embodiment of this invention is demonstrated using FIGS.

1 is a flowchart showing a method for manufacturing a semiconductor device according to the present embodiment, and FIGS. 2 and 3 are process cross-sectional views showing a method for manufacturing a semiconductor device according to the present embodiment.

As shown in FIG. 1, the semiconductor device manufacturing method according to the present embodiment includes the steps of depositing a silica-based insulating film (step S11), patterning the silica-based insulating film (step S12), and sidewalls by plasma treatment. Removing the deposit (step S13), repairing the damage of the dry etching by the silane compound (step S14), and performing condensation treatment of Si-OH by light irradiation or electron beam irradiation (step S15). It includes.

Hereinafter, each step will be described in detail with reference to FIGS. 2 and 3.

First, a silica-based insulating film 102 is formed on the base substrate 100 (step S11). The base substrate 100 includes not only a semiconductor substrate such as a silicon substrate but also a semiconductor substrate on which a MIS transistor, another element, or a wiring layer of one or more layers is formed.

As the silica-based insulating film 102, for example, a plasma CVD film such as a plasma SiO ₂ film, a plasma SiN film, a plasma SiC: H film, a plasma SiC: O: H film, a plasma SiC: H: N film, a plasma SiOC film, Coating type insulating films, such as organic SOG film | membrane and porous silica, etc. are applicable. The SiC: H film is a film containing H (hydrogen) in the SiC film. A SiC: O: H film is a film containing O (oxygen) and H (hydrogen) in a SiC film. A SiC: H: N film is a film containing H (hydrogen) and N (nitrogen) in a SiC film. Among them, a coating type insulating film such as porous silica is preferable from the viewpoint of low dielectric constant of the material alone.

Examples of the porous silica include a template-type in which a thermally decomposable resin or the like is added to organic SOG and thermally decomposed by heating to form pores, silica particles are formed in an alkali, and the pores are formed using a gap between the particles. The non-template type formed can be mentioned. Among these, a non-template-type which can form a fine hole uniformly is suitable.

As a non-template type porous silica material, Catalysts & Chemicals Ind. Co. NCS series manufactured, LKD series manufactured by JSR Corporation, etc. are mentioned.

As the non-template porous silica material, a liquid composition containing an organosilicon compound obtained by hydrolysis in the presence of, for example, tetraalkylammonium hydroxide (TAAOH), is suitable. This material has an elastic modulus of 10 GPa or more and a hardness of 1 GPa or more, so that both low dielectric constant and high strength can be achieved. Examples of the organosilicon compounds include tetraalkoxysilanes, trialkoxysilanes, methyltrialkoxysilanes, ethyltrialkoxysilanes, propyltrialkoxysilanes, phenyltrialkoxysilanes, vinyltrialkoxysilanes, allyltrialkoxysilanes, and glycidyltrialkoxysilanes. , Dialkoxysilane, dimethyl dialkoxysilane, diethyl dialkoxysilane, dipropyl dialkoxysilane, diphenyl dialkoxysilane, divinyl dialkoxysilane, diallyl dialkoxysilane, diglycidyl dialkoxysilane, phenylmethyldi Alkoxysilane, phenylethyl dialkoxysilane, phenylpropyltrialkoxysilane, phenylvinyl dialkoxysilane, phenylallyl dialkoxysilane, phenylglycidyl dialkoxysilane, methylvinyl dialkoxysilane, ethyl vinyl dialkoxysilane, propyl vinyl dialkoxy Silane and the like can be applied.

The coating solvent used in the formation of the coating porous silica film is not particularly limited as long as it can dissolve the siloxane resin of the porous silica silica precursor, and may be methyl alcohol, ethyl alcohol, propyl alcohol, isopropyl alcohol, butyl alcohol, isobutyl alcohol, alcohols such as tert-butyl alcohol, phenols such as phenol, cresol, diethylphenol, triethylphenol, propylphenol, nonylphenol, vinylphenol, allylphenol, cyclohexanone, methyl isobutyl ketone, methyl ethyl ketone, etc. Ketones, methyl cellosolves, cellosolves such as ethyl cellosolves, hydrocarbons such as hexane, octane and decane, glycols such as propylene glycol, propylene glycol monomethyl ether, and propylene glycol mono methyl ether acetate. Applicable

In addition, the insulating film using an application | coating type insulating material is a process of apply | coating the said insulating material on a base substrate, the process of heat-processing a base substrate at the temperature of 80-350 degreeC, and a base substrate of 350-450 degreeC, for example. It can form by the process of hardening at temperature. Moreover, it is preferable that the process of heat-processing a board | substrate at the temperature of 80-350 degreeC, and the process of hardening a board | substrate at the temperature of 350-450 degreeC are performed in inert gas atmosphere whose oxygen concentration is 100 ppm or less. This is because deterioration in moisture resistance due to oxidation of the insulating film is prevented.

Subsequently, for example, a hard mask 104 of SiO ₂ is formed on the insulating film 102 by, for example, CVD (FIG. 2A).

Subsequently, by photolithography, a photoresist film 106 having an opening 108 in a predetermined region is formed on the hard mask 104.

Subsequently, the hard mask 104 is dry-etched using the photoresist film 106 as a mask to transfer the pattern of the opening 108 of the photoresist film 106 to the hard mask 104 (FIG. b)].

Subsequently, the photoresist film 106 is removed, for example, by ashing using oxygen plasma.

Subsequently, the insulating film 102 is dry-etched using the patterned hard mask 104 as a mask to form an opening 110 in the insulating film 102 (step S12). The dry etching of the insulating film 102 is not particularly limited as long as the wiring groove and the via hole can be formed in the silica-based insulating film. For example, a fluorocarbon gas alone or a mixed gas such as CF ₄ , CHF ₃ , C ₂ F ₆ , C ₃ F ₈ , C ₄ F ₁₀ , or argon (Ar), nitrogen (N ₂ ), oxygen (O) ₂ ) and a mixture of hydrogen (H ₂ ) and the like can be carried out in a vacuum chamber, for example, by plasmalizing under a condition of a pressure of 50 mTorr and a power of 200 W.

In this dry etching process, the damage layer 112 is formed in the side wall part of the opening part 110 of the insulating film 102 (x area | region in the figure). The damage layer 112 is an area | region where a bond is cut | disconnected by plasma damage and it becomes a state which adsorbs moisture easily, and the Si-OH bond is produced | generated in the damage layer 112. FIG.

Incidentally, by-products generated during the dry etching process are deposited on the sidewall portions of the openings 110 of the insulating film 102 to form sidewall deposits 114 (FIG. 2C). For example, when a using an etching gas of a fluorine-based dry etching an insulating film of the silica-based has, on the side wall of the opening 110, the side wall deposits 114 of the CF _x polymer is attached.

Subsequently, the insulating film 102 after patterning is processed by the plasma containing oxygen, argon, hydrogen, nitrogen, or some gas among these as needed (step S13). Thereby, the side wall deposit 114 formed in the side wall part of the opening part 110 can be removed (FIG. 3 (a)).

This plasma treatment is for removing the sidewall deposits 114. With the side wall deposit 114 remaining in the side wall portion of the opening part 110, the effect of the damage repair treatment in the subsequent step cannot be sufficiently obtained. For this reason, it is preferable to perform this plasma treatment especially when a fluorine-based etching gas is used for dry etching of the insulating film 102.

In the above process, the insulating film 102 was patterned using the hard mask 104 on which the pattern of the photoresist film 106 was transferred. However, the photoresist film 106 was formed without using the hard mask 104. The insulating film 102 may be patterned directly as a mask. In this case, the photoresist film 106 is removed after the formation of the opening 110, but since the photoresist film 106 is normally removed by ashing with oxygen plasma, the same effect as in step S13 can be expected. In the case where the sidewall deposit 114 is sufficiently removed at the same time as the ashing of the photoresist film 106, the plasma processing of step S13 is not necessarily required. In addition to the ashing by oxygen plasma, the plasma processing in step S13 may be performed.

Alternatively, instead of performing the plasma treatment in step S13, the sidewall deposits 114 may be removed using a chemical solution such as hydrofluoric acid, ammonium fluoride, ammonium phosphate, or the like.

Subsequently, a process of repairing damage introduced by dry etching when the opening 110 is formed in the insulating film 102 is performed using the silane compound (step S14). By this process, the damage of the damage layer 112 of the side wall part of the opening part 110 of the insulating film 102 is repaired (recovery layer 116 in drawing) (FIG. 3B).

Specifically, this treatment is for reacting the silane compound with Si-OH generated by damage during dry etching. If it is the process which can make Si-OH react with a silane compound, it will not specifically limit, Preferably, the spin coat method, the vapor deposition method which performs the said process of a silane compound in normal pressure or a vacuum, etc. are applicable. Among these, the vapor method which is not easily influenced by surface tension is more preferable.

In the vapor deposition method, it is preferable to heat the substrate temperature to 50 to 350 ° C in order to diffuse the silane compound into the insulating film 102 and to further strengthen the repaired portion. In the spin coat method, the spin coater performs the treatment at room temperature. However, in order to further strengthen the repair portion, the bake treatment may be performed after the spin coat. In this case, it is preferable to bake at a single or plural temperatures in the range of 50 to 350 ° C.

It is preferable to select process temperature suitably according to the kind of silane compound, etc. in the temperature range of 50-350 degreeC. The upper limit of the treatment temperature is mainly defined according to the boiling point of the silane compound, and is set to a temperature below the boiling point of the silane compound. The lower limit of the treatment temperature is 50 ° C because the effect of repairing damage by the silane compound is not sufficiently obtained at a temperature below that.

The silane compound applicable to the damage repair treatment is not particularly limited as long as it contains a functional group that reacts with Si-OH generated by damage during dry etching. For example, dimethyldisilazane, tetramethyldisilazane, hexamethyldi Silazane compounds such as silazane, silylamide compounds such as bis (trimethylsilyl) acetamide, bis (triethylsilyl) acetamide, trimethoxysilane, triethoxysilane, methyltrimethoxysilane, methyltriethoxy Silane, dimethylmethoxysilane, dimethylethoxysilane, trimethylmethoxysilane, trimethylethoxysilane, ethyltrimethoxysilane, ethyltriethoxysilane, diethylmethoxysilane, diethylethoxysilane, triethylmethoxy Silane, triethylethoxysilane, propyltrimethoxysilane, propyltriethoxysilane, dipropylmethoxysilane, dipropylethoxysilane, tripropylmethoxysilane, trip Into the ethoxysilane, phenyltrimethoxysilane, phenyltriethoxysilane, diphenylmethoxysilane, diphenylethoxysilane, triphenylmethoxysilane, triphenylethoxysilane, phenylmethylmethoxysilane, phenylmethyl Alkoxysilane compounds such as oxysilane, dimethylphenylmethoxysilane, dimethylphenylethoxysilane, diphenylmethylmethoxysilane, diphenylmethylethoxysilane, triacetoxysilane, triethoxysilane, methyltriethoxysilane, Dimethylacetoxysilane, trimethylacetoxysilane, ethyltriethoxysilane, diethylacetoxysilane, triethylacetoxysilane, dipropylacetoxysilane, tripropylacetoxysilane, phenyltriacetoxysilane, diphenylacetoxy Acetoxysilane compounds, such as silane, triphenyl acetoxysilane, phenylmethyl acetoxysilane, dimethylphenyl acetoxysilane, and diphenylmethyl acetoxysilane, etc. are applicable.

Is damaged by the above-mentioned restoration processing, Si-OH in the damaged layer 112 can be increased hydrophobicity is the Si-CH _3. However, a large molecular mass of the silane compound becomes a steric hindrance, and it is difficult to convert all of Si-OH into Si-CH ₃ . As a result, when the air is left in this state, moisture is gradually adsorbed to Si-OH, causing an increase in the dielectric constant of the insulating film 102.

Therefore, in the method for manufacturing a semiconductor device according to the present embodiment, after damage repair treatment by a silane compound, the remaining Si-OH is condensed (dehydrated condensation) to form Si-O-Si bonds, thereby forming a Si-OH bond. Moisture is prevented from adsorbing (step S15). The condensation treatment of Si-OH can be realized by performing light irradiation or electron beam irradiation treatment while heating the substrate to 30 to 400 ° C. (FIG. 3C).

Condensation treatment by light irradiation is not particularly limited as long as light having a wavelength of 170 to 700 nm can be irradiated, and for example, an excimer lamp, a mercury lamp, a metal halide lamp and the like can be applied. As for the board | substrate temperature at the time of light irradiation, 30-400 degreeC is preferable.

As for the atmosphere, the oxygen concentration is preferably set to 150 ppm or less, and nitrogen, helium (He) or argon, or a plurality of gases or vacuum in these can be applied. When performing in vacuum (decompression), even if nitrogen, helium or argon or a plurality of these gases are introduced while controlling the pressure in the vacuum chamber to be a predetermined pressure by using a mass flow meter or the like good.

In the condensation process by electron beam irradiation, it is preferable to irradiate an electron beam with an acceleration voltage of 1-15 kV in vacuum. This is because if the acceleration voltage is less than 1 kV, a sufficient effect cannot be expected, and if the acceleration voltage is higher than 15 kV, the insulating film may be damaged.

It is preferable to select the processing temperature at the time of light irradiation or electron beam irradiation suitably according to the kind of silica type insulating film, etc. in the temperature range of 30-400 degreeC. The upper limit of the processing temperature is mainly defined by the heat resistant temperature of the silica-based insulating film forming the insulating film, and is set to a temperature below the heat-resistant temperature of the silica-based insulating film. The lower limit of the treatment temperature is 30 ° C. because the condensation reaction does not occur sufficiently at a temperature below that.

In this manner, by performing condensation treatment of Si-OH after the damage repair treatment with the silane compound, the hygroscopicity of the insulating film can be greatly reduced. As a result, the adsorption of moisture due to the air standing is greatly reduced, and it is possible to effectively prevent the dielectric constant from rising due to the adsorption of moisture.

As described above, according to the present embodiment, an increase in dielectric constant of the insulating film due to processing damage during dry etching can be restored, and an increase in dielectric constant due to air standing can be prevented.

Second Embodiment

The manufacturing method of the semiconductor device by 2nd Embodiment of this invention is demonstrated using FIGS. 4-14. In addition, the same code | symbol is attached | subjected to the component same as the manufacturing method of the semiconductor device by 1st Embodiment shown in FIGS. 1-3, and description is abbreviate | omitted or made concise.

4-14 is process sectional drawing which shows the manufacturing method of the semiconductor device by this embodiment.

In this embodiment, an example in which the manufacturing method of the first embodiment is applied to a more specific manufacturing method of a semiconductor device will be described.

First, an element isolation film 12 for defining the element region 14 is formed in the semiconductor substrate 10, which is a silicon substrate, for example, by the LOCOS (LOCAL OXIDATION OF SILICON) method. The element isolation film 12 may be formed by STI (SHALLOW TRENCH ISOLATION) method.

Subsequently, the gate electrode 18 and the gate electrode 18 formed on the semiconductor substrate 10 through the gate insulating film 16 on the semiconductor substrate 10 in the same manner as in the manufacturing method of a normal MOS transistor. The MOS transistor 24 having the source / drain regions 22 formed in the semiconductor substrate 10 on both sides is formed (Fig. 4 (a)).

Subsequently, for example, a silicon oxide film (SiO ₂ ) is formed on the semiconductor substrate 10 on which the MOS transistor 24 is formed, for example, by the CVD method.

Subsequently, the surface of this silicon oxide film is polished and planarized by, for example, CMP (CHEMICAL MECHANICAL POLISHING) method to form an interlayer insulating film 26 made of a silicon oxide film and having a flat surface.

Subsequently, a silicon nitride film (SiN) having a thickness of 50 nm, for example, is deposited on the interlayer insulating film 26 by a plasma CVD method to form a stopper film 28 of the silicon nitride film. The stopper film 28 functions as a polishing stopper when polishing by CMP in a step to be described later, and serves as an etching stopper when the wiring groove 46 is formed in the interlayer insulating film 38 or the like. As the stopper film 28, a SiC: H film, a SiC: O: H film, a SiC: N film, or the like can be used in addition to the silicon nitride film.

Subsequently, contact holes 30 that reach the source / drain regions 22 are formed in the stopper film 28 and the interlayer insulating film 26 by photolithography and dry etching (Fig. 4 (b)).

Subsequently, a titanium nitride (TiN) film having a thickness of 50 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 32 of the TiN film.

Subsequently, a tungsten (W) film 34 having a film thickness of 1 탆, for example, is formed on the barrier metal 32 by, for example, a CVD method.

Subsequently, the tungsten film 34 and the barrier metal 32 are polished until the surface of the stopper film 28 is exposed, for example, by the CMP method, and the barrier metal 32 embedded in the contact hole 30 and A contact plug 35 including a tungsten film 34 is formed (FIG. 4C).

Subsequently, an SiC: O: H film having a thickness of 30 nm, for example, is deposited on the stopper film 28 in which the contact plug 35 is embedded, for example, by plasma CVD to form an insulating film 36 of the SiC: O: H film. ). The insulating film 36 is a highly dense film containing oxygen and hydrogen in the SiC film, and functions as a barrier film for preventing diffusion of moisture and the like.

Subsequently, an interlayer insulating film 38 of porous silica material having a thickness of 160 nm, for example, is formed on the insulating film 36 (FIG. 5A). In forming the interlayer insulating film 38, various porous silica materials and a film forming method used for forming the silica-based insulating film 102 in the method for manufacturing a semiconductor device according to the first embodiment can be applied.

Subsequently, a silicon oxide film (SiO ₂ ) having a thickness of 30 nm, for example, is deposited on the interlayer insulating film 38 by a plasma CVD method to form an insulating film 40 of the silicon oxide film (FIG. 5B). )].

Subsequently, by photolithography, the photoresist film 42 having the opening 44 exposing the region to be formed of the first layer wiring 51 having a wiring width of 100 nm and a space of 100 nm on the insulating film 40 is formed. To form (Fig. 6 (a)).

Subsequently, by dry etching using, for example, CF ₄ gas and CHF ₃ gas, using the photoresist film 42 as a mask and the stopper film 28 as a stopper, the insulating film 40, the interlayer insulating film 38, and the insulating film Subsequently, 36 is etched to form wiring grooves 46 for filling the wirings 51 in the insulating film 40, the interlayer insulating film 38, and the insulating film 36 (Fig. 6 (b)). By this dry etching, the damage layer 112 (x part in drawing) in which Si-OH was produced is formed in the inner wall of the wiring groove 46.

Subsequently, the photoresist film 42 is removed by ashing using, for example, an oxygen plasma. Moreover, in the dry etching at the time of forming the wiring groove 46, when the side wall deposit is formed in the inner wall of the wiring groove 46, it can remove simultaneously in this ashing process.

Subsequently, 3 cc of a silane compound such as hexamethyldisilazane is added dropwise, spin-coated at 1000 rpm for 60 seconds, and then, for example, a baking treatment at 120 ° C. for 60 seconds and a baking treatment at 250 ° C. for 60 seconds with a hot plate. This is done in this order. As a result, the Si-OH in the damage layer introduced by the dry etching when the wiring groove 46 is formed becomes Si-CH ₃ , and the damage layer 112 on the inner wall of the wiring groove 46 is repaired (Fig. The restoring layer 116] (FIG. 7A).

Moreover, the silane compound used for the damage repair process of this embodiment and the processing method using the same are the various silanes used for the repair process of the damage layer 112 of the insulating film 102 in the manufacturing method of the semiconductor device which concerns on 1st Embodiment. The compound and the treatment method using the same can be applied.

Subsequently, in a state where the substrate is heated to 400 ° C. in a nitrogen atmosphere, for example, using a high pressure mercury lamp (eg, UVL-7000H4-N manufactured by Ushio Inc.), ultraviolet rays having a wavelength of 200 to 600 nm, for example, 10 Irradiate for a minute (FIG. 7 (b)). Thereby, Si-OH which remain | survives after the damage repair process by a silane compound becomes condensed, it becomes Si-O-Si bond, and it can prevent that water adsorb | sucks to Si-OH.

Moreover, the various methods and conditions shown to 1st Embodiment can be used for the light irradiation used for the condensation process of Si-OH. In addition, as shown in the first embodiment, electron beam irradiation may be performed instead of light irradiation. Various methods and conditions shown in the first embodiment can be used for electron beam irradiation.

Subsequently, a tantalum nitride (TaN) film having a thickness of 10 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 48 of the TaN film. The barrier metal 48 is for preventing Cu from diffusing into the insulating film from the copper wiring formed in the step described later.

Subsequently, a Cu film having a thickness of 10 nm, for example, is deposited on the barrier metal 48 by, for example, a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 50 whose total film thickness combined with the seed layer is, for example, 600 nm.

Subsequently, by the CMP method, the Cu film 50 and the barrier metal 48 on the insulating film 40 are removed by polishing, and the barrier metal 48 and the Cu film 50 embedded in the wiring groove 46 are polished. To form a wiring 51 including a. In addition, this manufacturing process of the wiring 51 is called single damascene method.

Subsequently, an SiC: O: H film having a thickness of 30 nm, for example, is deposited on the entire surface by, for example, a CVD method to form an insulating film 52 of the SiC: O: H film (Fig. 8 (a)). The insulating film 52 functions as a barrier film for preventing diffusion of moisture and diffusion of Cu from the wiring 51.

Subsequently, an interlayer insulating film 54 of porous silica material is formed on the insulating film 52. As the method for forming the interlayer insulating film 54 of the porous silica material, for example, the same method as the above-described interlayer insulating film 38 can be applied. The film thickness of the interlayer insulating film 54 is, for example, 180 nm.

Subsequently, an SiO ₂ (silicon oxide) film having a thickness of 30 nm, for example, is deposited on the interlayer insulating film 54 by, for example, plasma CVD to form an insulating film 56 of the SiO ₂ film (FIG. 8B). )].

Subsequently, an interlayer insulating film 58 of porous silica material is formed on the insulating film 56. As the method for forming the interlayer insulating film 58 of porous silica material, the same method as that of the above-described interlayer insulating film 38 can be applied. The film thickness of the interlayer insulating film 58 is 160 nm, for example.

Subsequently, an SiO ₂ (silicon oxide) film having a thickness of 30 nm, for example, is deposited on the interlayer insulating film 58 by, for example, plasma CVD to form an insulating film 60 of the SiO ₂ film (FIG. 9).

Subsequently, by photolithography, a photoresist film 62 is formed on the insulating film 60 in which an opening 64 for exposing a region for forming a via hole reaching the wiring 51 is formed.

Subsequently, by dry etching using, for example, CF ₄ gas and CHF ₃ gas, using the photoresist film 62 as a mask, the insulating film 60, the interlayer insulating film 58, the insulating film 56, and the interlayer insulating film 54. And the insulating film 52 is sequentially etched to form the via hole 66 that reaches the wiring 51 in the insulating film 60, the interlayer insulating film 58, the insulating film 56, the interlayer insulating film 54, and the insulating film 52. 10. Moreover, each insulating film can be etched one by one by changing the composition ratio of an etching gas, the pressure at the time of an etching, etc. suitably. By this dry etching, the damage layer 112 (x part in drawing) in which Si-OH was produced | generated is formed in the inner wall of the via hole 66. As shown in FIG.

Subsequently, the photoresist film 62 is removed by, for example, ashing. In the dry etching at the time of forming the via hole 66, when sidewall deposits are formed on the inner wall of the via hole 66, the ashing process can be simultaneously removed.

Subsequently, a photoresist film 68 having an opening 70 exposing the region to be formed of the second layer wiring 77b is formed on the insulating film 60 having the via hole 66 opened by photolithography. do.

Subsequently, by dry etching using, for example, a CF ₄ gas and a CHF ₃ gas, the insulating film 60, the interlayer insulating film 58, and the insulating film 56 are sequentially etched using the photoresist film 68 as a mask. 60, wiring grooves 72 for filling the wiring 77b are formed in the interlayer insulating film 58 and the insulating film 56 (Fig. 11). The wiring groove 72 is connected to the via hole 66. By this dry etching, the damage layer 112 (x part in drawing) in which Si-OH was produced | generated is formed in the inner wall of the wiring groove 72. As shown in FIG.

Subsequently, the photoresist film 68 is removed by, for example, ashing. Moreover, in the dry etching at the time of forming the wiring groove 72, when the side wall deposit is formed in the inner wall of the wiring groove 72, it can remove simultaneously in this ashing process.

Subsequently, 3 cc of a silane compound such as hexamethyldisilazane is added dropwise, spin-coated at 1000 rpm for 60 seconds, and then, for example, a baking treatment at 120 ° C. for 60 seconds and a baking treatment at 250 ° C. for 60 seconds with a hot plate. This is done in this order. As a result, the Si-OH in the damaged layer introduced by the dry etching when the via hole 66 and the wiring groove 72 is formed becomes Si-CH ₃ , and the inner wall of the via hole 66 and the wiring groove 72 is formed. The damage layer 112 is repaired (recovery layer 116 in the figure) [FIG. 12].

Moreover, the silane compound used for the damage repair process of this embodiment and the processing method using the same are the various silane compounds used for the repair process of the damage layer of an insulating film in the manufacturing method of the semiconductor device which concerns on 1st embodiment, and the processing method using the same. Can be applied.

Subsequently, in a state where the substrate is heated to 400 DEG C in a nitrogen atmosphere, for example, using a high pressure mercury lamp (e.g., UVL-7000H4-N manufactured by Ushio Inc.), for example, ultraviolet rays having a wavelength of 200 to 600 nm, for example, Irradiate for 10 minutes [FIG. 13]. Thereby, Si-OH which remain | survives after the damage repair process by a silane compound becomes condensed, it becomes Si-O-Si bond, and it can prevent that water adsorb | sucks to Si-OH.

Moreover, the various methods and conditions shown to 1st Embodiment can be used for the light irradiation used for the condensation process of Si-OH. In addition, as shown in the first embodiment, electron beam irradiation may be performed instead of light irradiation. Various methods and conditions shown in the first embodiment can be used for electron beam irradiation.

Subsequently, a TaN film having a thickness of 10 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 74 of the TaN film. The barrier metal 74 is for preventing Cu from diffusing into the insulating film from the copper wiring formed in the step described later.

Subsequently, a Cu film having a film thickness of 10 nm, for example, is deposited on the barrier metal 74 by a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 76 having a total film thickness combined with the seed layer, for example, 1400 nm.

Subsequently, the Cu film 76 and the barrier metal 74 on the insulating film 60 are removed by polishing by the CMP method to remove the barrier metal 74 and the Cu film 76 embedded in the via hole 66. The contact plug 77a to be included and the wiring 77b including the barrier metal 74 and the Cu film 76 embedded in the wiring groove 72 are integrally formed. In addition, the manufacturing process which collectively forms the contact plug 77a and the wiring 77b is called the dual damascene method.

Subsequently, a SiC: O: H film having a thickness of 30 nm, for example, is deposited on the entire surface by, for example, a CVD method to form an insulating film 78 of the SiC: O: H film (Fig. 14). The insulating film 78 functions as a barrier film for preventing diffusion of moisture and diffusion of Cu from the wiring 77b.

Thereafter, if necessary, the same steps as described above are appropriately repeated to form a third layer wiring (not shown), and the semiconductor device according to the present embodiment is completed.

As described above, according to the present embodiment, an increase in dielectric constant of the insulating film due to processing damage during dry etching can be restored, and an increase in dielectric constant due to air standing can be prevented. As a result, an insulating film having high reliability at low dielectric constant can be obtained. In addition, by applying the insulating film to, for example, an interlayer insulating film of a multilayer wiring structure, the response speed of the semiconductor device can be increased.

[Third Embodiment]

The manufacturing method of the semiconductor device by 3rd Embodiment of this invention is demonstrated using FIGS. 15 and 16 (a)-(d).

15 is a flowchart showing a method of manufacturing a semiconductor device according to the present embodiment, and FIGS. 16A to 16D are cross-sectional views illustrating a method of manufacturing the semiconductor device according to the present embodiment.

As shown in Fig. 15, the semiconductor device manufacturing method according to the present embodiment includes the steps of depositing a silica-based insulating film (step S31), polishing the silica-based insulating film (step S32), and drying the silane compound. It has a step (step S33) of repairing damage of etching, and a step (step S34) of condensation treatment of Si-OH by light irradiation or electron beam irradiation.

Hereinafter, each step will be described in detail with reference to FIGS. 16A to 16D.

First, a silica-based insulating film 202 is formed on the base substrate 200 (step S31) (FIG. 16A). The base substrate 200 includes not only a semiconductor substrate such as a silicon substrate but also a semiconductor substrate on which MIS transistors, other elements, or one or more wiring layers are formed.

As the silica-based insulating film 202, the same material as that of the silica-based insulating film 102 of the first embodiment can be applied. The film formation method is also the same as in the first embodiment.

Subsequently, the surface of the insulating film 202 is polished to a predetermined film thickness by, for example, chemical mechanical polishing (CMP). At this time, the damage layer 204 into which damage resulting from polishing is introduced is formed on the surface of the polished insulating film 202 (Fig. 16 (b)).

In addition, the damage by grinding | polishing is the damage by the chemical liquid of the acid and alkali used mainly at the time of CMP. The damage introduced into the insulating film by the acid and alkali chemicals also generates Si-OH bonds in the same manner as in the dry etching of the first and second embodiments.

Subsequently, using the silane compound, a process of repairing damage introduced when polishing the insulating film 202 is performed (step S33). By this treatment, damage to the damaged layer 204 on the surface of the insulating film 202 is repaired (recovery layer 206 in the figure) (FIG. 16C).

Specifically, this treatment is for reacting the silane compound with Si-OH generated by the damage during polishing. If it is the process which can make Si-OH react with a silane compound, it will not specifically limit, Preferably, the spin coat method, the vapor deposition method which performs the said process of a silane compound in normal pressure or a vacuum, etc. can be applied. Among these, the vapor method which is not easily influenced by surface tension is more preferable.

In the vapor deposition method, it is preferable to heat the substrate temperature to 50 to 350 ° C. for the purpose of diffusing the silane compound into the insulating film 202 and to further strengthen the repaired portion. In the spin coat method, the spin coater is used at room temperature, but may be baked after the spin coat in order to further strengthen the repair portion. In this case, it is preferable to bake at a single or plural temperatures in the range of 50 to 350 ° C.

It is preferable to select process temperature suitably according to the kind of silane compound, etc. in the temperature range of 50-350 degreeC. The upper limit of the treatment temperature is mainly defined by the boiling point of the silane compound, and is set to a temperature below the boiling point of the silane compound. The lower limit of the treatment temperature is 50 ° C because the effect of repairing damage by the silane compound is not sufficiently obtained at a temperature below that.

The silane compound applicable to the damage repair treatment is not particularly limited as long as it contains a functional group that reacts with Si-OH generated by damage during dry etching. For example, dimethyldisilazane, tetramethyldisilazane, hexamethyldi Silazane compounds such as silazane, silylamide compounds such as bis (trimethylsilyl) acetamide, bis (triethylsilyl) acetamide, trimethoxysilane, triethoxysilane, methyltrimethoxysilane, methyltrie Methoxysilane, dimethylmethoxysilane, dimethylethoxysilane, trimethylmethoxysilane, trimethylethoxysilane, ethyltrimethoxysilane, ethyltriethoxysilane, diethylmethoxysilane, diethylethoxysilane, triethylmethoxy Methoxysilane, triethylethoxysilane, propyltrimethoxysilane, propyltriethoxysilane, dipropylmethoxysilane, dipropylethoxysilane, tripropylmethoxysilane, trip Into the ethoxysilane, phenyltrimethoxysilane, phenyltriethoxysilane, diphenylmethoxysilane, diphenylethoxysilane, triphenylmethoxysilane, triphenylethoxysilane, phenylmethylmethoxysilane, phenylmethyl Alkoxysilane compounds such as oxysilane, dimethylphenylmethoxysilane, dimethylphenylethoxysilane, diphenylmethylmethoxysilane, diphenylmethylethoxysilane, triacetoxysilane, triethoxysilane, methyltriethoxysilane, Dimethylacetoxysilane, trimethylacetoxysilane, ethyltriethoxysilane, diethylacetoxysilane, triethylacetoxysilane, dipropylacetoxysilane, tripropylacetoxysilane, phenyltriacetoxysilane, diphenylacetoxy Acetoxysilane compounds, such as silane, triphenyl acetoxysilane, phenylmethyl acetoxysilane, dimethylphenyl acetoxysilane, and diphenylmethyl acetoxysilane, etc. are applicable.

By the restoration processing described above damage, Si-OH in the damaged layer 204 is a Si-CH _3, it is possible to increase the hydrophobicity. However, a large molecular mass of the silane compound becomes a steric hindrance, and it is difficult to convert all of Si-OH into Si-CH ₃ . As a result, when the air is left in this state, moisture is gradually adsorbed to Si-OH, causing an increase in dielectric constant of the insulating film 202.

Therefore, in the method for manufacturing a semiconductor device according to the present embodiment, after damage repair treatment by a silane compound, the remaining Si-OH is condensed (dehydrated condensation) to form Si-O-Si bonds, thereby forming a Si-OH bond. Moisture is prevented from adsorbing (step S15). The condensation treatment of Si-OH can be realized by performing light irradiation or electron beam irradiation treatment while heating the substrate at 30 to 400 ° C. (FIG. 16 (d)).

Condensation treatment by light irradiation is not particularly limited as long as light having a wavelength of 170 to 700 nm can be irradiated, and for example, an excimer lamp, a mercury lamp, a metal halide lamp and the like can be applied. As for the board | substrate temperature at the time of light irradiation, 30-400 degreeC is preferable.

As for the atmosphere, the oxygen concentration is preferably set to 150 ppm or less, and nitrogen, helium (He) or argon, or a plurality of gases or vacuum in these can be applied. When performing in vacuum (decompression), nitrogen, helium or argon, or a plurality of these gases may be introduced while controlling the pressure in the vacuum chamber to be a predetermined pressure using a mass flow meter or the like.

In the condensation process by electron beam irradiation, it is preferable to irradiate an electron beam with an acceleration voltage of 1-15 kV in vacuum. This is because if the acceleration voltage is less than 1 kV, a sufficient effect cannot be expected, and if the acceleration voltage is higher than 15 kV, the insulating film may be damaged.

It is preferable to select the process temperature at the time of light irradiation or electron beam irradiation suitably according to the kind of silica type insulating film, etc. in the temperature range of 30-400 degreeC. The upper limit of the processing temperature is mainly defined by the heat resistant temperature of the silica-based insulating film forming the insulating film, and is set to a temperature below the heat-resistant temperature of the silica-based insulating film. The lower limit of the processing temperature is 30 ° C. because the condensation reaction does not occur sufficiently at a temperature below that.

In this manner, by performing condensation treatment of Si-OH after the damage repair treatment with the silane compound, the hygroscopicity of the insulating film can be greatly reduced. As a result, the adsorption of moisture due to the air standing is greatly reduced, and it is possible to effectively prevent the dielectric constant from rising due to the adsorption of moisture.

As described above, according to the present embodiment, an increase in the dielectric constant of the insulating film due to damage introduced by polishing can be restored, and an increase in the dielectric constant due to air standing can be prevented.

[4th Embodiment]

A manufacturing method of a semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIGS. 17A, 17B, 18A, 18B, and 19-21. It demonstrates using. In addition, the same code | symbol is attached | subjected to the same component as the manufacturing method of the semiconductor device by 1st Embodiment-3rd Embodiment shown in FIGS. 1-16, and description is abbreviate | omitted or concise.

17-21 is process sectional drawing which shows the manufacturing method of the semiconductor device by this embodiment.

In this embodiment, an example in which the manufacturing method of the third embodiment is applied to the manufacturing method of the semiconductor device according to the second embodiment will be described.

First, for example, in the same manner as in the method of manufacturing the semiconductor device according to the second embodiment shown in FIGS. 4A to 5B, the device isolation film 12 and the MOS transistor are formed on the semiconductor substrate 10. (24), the interlayer insulating film 26, the stopper film, the contact plug 35, the insulating film 36, the interlayer insulating film 38, and the insulating film 40 are formed (FIG. 17A).

Subsequently, for example, the wiring 51 is provided on the insulating film 40, the interlayer insulating film and the insulating film 36 in the same manner as in the manufacturing method of the semiconductor device according to the second embodiment shown in FIGS. 6A and 6B. Wiring grooves 46 for filling are formed.

Subsequently, for example, the wiring groove 46 is formed by performing a treatment with a silane compound and irradiating with ultraviolet rays in the same manner as in the method for manufacturing the semiconductor device according to the second embodiment shown in FIGS. 7A and 7B. The damaged layer introduced by dry etching at the time of repair is repaired (recovery layer 116 in the figure) (FIG. 17B).

Subsequently, a titanium nitride (TiN) film having a thickness of 50 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 48 of the TiN film.

Subsequently, a Cu film having a thickness of 10 nm, for example, is deposited on the barrier metal 48 by, for example, a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 50 whose total film thickness combined with the seed layer is, for example, 600 nm.

Subsequently, by the CMP method, the Cu film 50 and the barrier metal 48 on the insulating film 40 are removed by polishing, and the barrier metal 48 and the Cu film 50 embedded in the wiring groove 46 are polished. To form a wiring 51 including a. It is preferable to select the slurry used for CMP suitably according to the material of the wiring 51, the material of the insulating film 40, etc. By this polishing step, a damage layer in which Si-OH is formed is formed in the insulating film 40.

In the step of forming the wiring 51, an acid and alkali chemical used for polishing acts on the insulating film 40 to form a Si-OH bond in the film. In this specification, the process which has a physical and chemical effect | action to an insulating film is expressed as the process of processing an insulating film. That is, the process of processing the insulating film includes a step of patterning the insulating film by dry etching, a step of removing the conductive film on the insulating film by polishing, a step of removing a part of the insulating film by polishing, and the like.

Subsequently, 3 cc of a silane compound such as hexamethyldisilazane is added dropwise, spin-coated at 1000 rpm for 60 seconds, and then, for example, a baking treatment at 120 ° C. for 60 seconds and a baking treatment at 250 ° C. for 60 seconds with a hot plate. This is done in this order. As a result, the Si-OH in the insulating film 40 introduced by the polishing at the time of forming the wiring 51 becomes Si-CH ₃ , and the damage of the insulating film 40 is repaired.

Moreover, the silane compound used for the damage repair process of this embodiment and the processing method using the same are various silanes used for the repair process of the damage layer 204 of the insulating film 202 in the manufacturing method of the semiconductor device which concerns on 3rd embodiment. The compound and the treatment method using the same can be applied.

Subsequently, in a state where the substrate is heated to 400 DEG C in a nitrogen atmosphere, for example, using a high pressure mercury lamp (e.g., UVL-7000H4-N manufactured by Ushio Inc.), for example, ultraviolet rays having a wavelength of 200 to 600 nm, for example, Irradiate for 10 minutes (FIG. 18 (a)). Thereby, Si-OH which remain | survives after the damage repair process by a silane compound becomes condensed, it becomes Si-O-Si bond, and it can prevent that water adsorb | sucks to Si-OH.

Moreover, the various methods and conditions shown in 3rd Embodiment can be used for the light irradiation used for the condensation process of Si-OH. In addition, as shown in the third embodiment, electron beam irradiation may be performed instead of light irradiation. Various methods and conditions shown in the third embodiment can be used for the electron beam irradiation.

Subsequently, on the insulating film 40 in which the wiring 51 is embedded, for example, the insulating film 52, in the same manner as in the manufacturing method of the semiconductor device according to the second embodiment shown in FIGS. An interlayer insulating film 54 and an insulating film 60 are formed (FIG. 18B). In this embodiment, the three-layer structure of the insulating film 60 / interlayer insulating film 54 / insulating film 52 is used, but the insulating film 56 for an etching stopper is included in the same manner as in the second embodiment. It is good also as a structure. In the case of this embodiment, as the interlayer insulating film 54, for example, a porous silica film having a thickness of 180 nm can be used.

Subsequently, in the same manner as in the method of manufacturing the semiconductor device according to the second embodiment shown in FIGS. 10 to 11, the via hole 66 reaching the wiring 51 is formed in the insulating film 52 and the interlayer insulating film 54. In the interlayer insulating film 54 and the insulating film 60, wiring grooves 72 for filling the wiring 77b are formed.

Subsequently, for example, the via hole 66 and the wiring groove 46 are formed by performing a treatment with a silane compound and irradiating with ultraviolet rays in the same manner as in the method for manufacturing the semiconductor device according to the second embodiment shown in FIGS. 12 to 13. The damage layer introduced by the dry etching at the time of repair is repaired (recovery layer 116 in the figure) [FIG. 19].

Subsequently, a TaN film having a thickness of 10 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 74 of the TaN film.

Subsequently, a Cu film having a film thickness of 10 nm, for example, is deposited on the barrier metal 74 by a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 76 having a total film thickness combined with the seed layer, for example, 1400 nm.

Subsequently, the Cu film 76 and the barrier metal 74 on the insulating film 60 are removed by polishing by the CMP method to remove the barrier metal 74 and the Cu film 76 embedded in the via hole 66. The contact plug 77a to be included and the wiring 77b including the barrier metal 74 and the Cu film 76 embedded in the wiring groove 72 are integrally formed. It is preferable to select the slurry used for CMP suitably according to the material of the contact plug 77a and the wiring 77b, the material of the insulating film 60, etc. By this polishing step, a damage layer in which Si-OH is formed is formed in the insulating film 60.

Subsequently, 3 cc of a silane compound such as hexamethyldisilazane is added dropwise, spin-coated at 1000 rpm for 60 seconds, and then, for example, a baking treatment at 120 ° C. for 60 seconds and a baking treatment at 250 ° C. for 60 seconds with a hot plate. This is done in this order. As a result, the Si-OH in the insulating film 60 introduced by polishing at the time of forming the contact plug 77a and the wiring 77b becomes Si-CH ₃ , so that damage to the insulating film 60 is repaired.

Moreover, the silane compound used for the damage repair process of this embodiment and the processing method using the same are various silanes used for the repair process of the damage layer 204 of the insulating film 202 in the manufacturing method of the semiconductor device which concerns on 3rd embodiment. The compound and the treatment method using the same can be applied.

Subsequently, in a state where the substrate is heated to 400 DEG C in a nitrogen atmosphere, for example, using a high pressure mercury lamp (e.g., UVL-7000H4-N manufactured by Ushio Inc.), for example, ultraviolet rays having a wavelength of 200 to 600 nm, for example, Irradiate for 10 minutes [FIG. 20]. Thereby, Si-OH which remain | survives after the damage repair process by a silane compound becomes condensed, it becomes Si-O-Si bond, and it can prevent that water adsorb | sucks to Si-OH.

Moreover, the various methods and conditions shown in 3rd Embodiment can be used for the light irradiation used for the condensation process of Si-OH. In addition, as shown in the third embodiment, electron beam irradiation may be performed instead of light irradiation. Various methods and conditions shown in the third embodiment can be used for the electron beam irradiation.

Subsequently, an SiC: O: H film having a thickness of 30 nm, for example, is deposited on the entire surface by, for example, a CVD method to form an insulating film 78 of the SiC: O: H film (Fig. 21).

Thereafter, if necessary, the same steps as described above are appropriately repeated to form a third layer wiring (not shown), and the semiconductor device according to the present embodiment is completed.

As described above, according to the present embodiment, an increase in dielectric constant of the insulating film due to processing damage when the insulating film is processed can be restored, and an increase in dielectric constant due to air standing can be prevented. As a result, a highly reliable insulating film can be obtained at a low dielectric constant. Therefore, by applying the insulating film to, for example, an interlayer insulating film of a multilayer wiring structure, the response speed of the semiconductor device can be increased.

[Fifth Embodiment]

The manufacturing method of the semiconductor device according to the fifth embodiment of the present invention will be described with reference to FIGS. 22 to 26. In addition, the same code | symbol is attached | subjected to the component same as the manufacturing method of the semiconductor device by 1st Embodiment-4th embodiment shown to FIGS. 1-21, and description is abbreviate | omitted or concise.

22 to 26 are cross-sectional views illustrating the method of manufacturing the semiconductor device according to the present embodiment.

In this embodiment, another example in which the manufacturing method of the third embodiment is applied to the manufacturing method of the semiconductor device according to the second embodiment will be described.

First, for example, in the same manner as in the method of manufacturing the semiconductor device according to the second embodiment shown in FIGS. 4A to 5B, the device isolation film 12 and the MOS transistor are formed on the semiconductor substrate 10. (24), the interlayer insulating film 26, the stopper film, the contact plug 35, the insulating film 36, the interlayer insulating film 38, and the insulating film 40 are formed (FIG. 22A).

Subsequently, for example, in the same manner as in the method of manufacturing the semiconductor device according to the second embodiment shown in FIGS. 6A and 6B, the wiring 51 is connected to the insulating film 40, the interlayer insulating film, and the insulating film 36. A wiring groove 46 for filling the gap is formed.

Subsequently, for example, the wiring groove 46 is formed by performing a treatment with a silane compound and irradiating with ultraviolet rays in the same manner as in the method for manufacturing the semiconductor device according to the second embodiment shown in FIGS. 7A and 7B. The damaged layer introduced by dry etching at the time of repair is repaired (recovery layer 116 in the figure) (Fig. 22 (b)).

Subsequently, a tantalum nitride (TaN) film having a thickness of 10 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 48 of the TaN film.

Subsequently, a Cu film having a thickness of 10 nm, for example, is deposited on the barrier metal 48 by, for example, a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 50 whose total film thickness combined with the seed layer is, for example, 600 nm.

Subsequently, the CMP method removes the Cu film 50, the barrier metal 48, and the insulating film 40 on the interlayer insulating film 38 by polishing, and the barrier metal 48 embedded in the wiring groove 46. And the wiring 51 including the Cu film 50.

In this embodiment, the insulating film 40 is also removed in the polishing process at the time of forming the wiring 51. The insulating film 40 is used as a hard mask when the wiring groove 46 is formed, but is generally formed of a material having a higher dielectric constant than that of the interlayer insulating film 38. Therefore, in this embodiment, from the viewpoint of lowering the dielectric constant of the interlayer insulating film, the insulating film 40 is also removed in the polishing step for forming the wiring 51. When the insulating film 40 is removed by polishing, a damage layer in which Si-OH is formed is formed in the lower interlayer insulating film 38 by this polishing step.

Subsequently, in the same manner as in the method of manufacturing the semiconductor device according to the fourth embodiment shown in FIG. 18A, for example, polishing with a process using a silane compound and ultraviolet irradiation to form the wiring 51 is performed. This repairs the damage introduced into the interlayer insulating film 38 (Fig. 23 (a)).

In the case where the insulating film 40 is removed by polishing, damage may be introduced into the lower interlayer insulating film 38 to increase the dielectric constant of the interlayer insulating film 38. However, the damage introduced into the interlayer insulating film 38 is repaired by performing the above-described damage repairing process, and it is possible to prevent the dielectric constant of the interlayer insulating film 38 from increasing. By removing the insulating film 40, the interlayer insulating film can be further reduced in dielectric constant.

Subsequently, the insulating film 52 and the interlayer insulating film are formed on the interlayer insulating film 38 in which the wiring 51 is embedded, for example, in the same manner as in the manufacturing method of the semiconductor device according to the third embodiment shown in FIG. 18B. 54 and an insulating film 60 are formed (FIG. 23B). In this embodiment, the three-layer structure of the insulating film 60 / interlayer insulating film 54 / insulating film 52 is used, but the insulating film 56 for an etching stopper is included in the same manner as in the second embodiment. It is good also as a structure.

Subsequently, in the same manner as in the method of manufacturing the semiconductor device according to the second embodiment shown in FIGS. 10 to 11, the via hole 66 reaching the wiring 51 is formed in the insulating film 52 and the interlayer insulating film 54. In the interlayer insulating film 54 and the insulating film 60, wiring grooves 72 for filling the wiring 77b are formed.

Subsequently, for example, the via hole 66 and the wiring groove 46 are formed by performing a treatment with a silane compound and irradiating with ultraviolet rays in the same manner as the method for manufacturing the semiconductor device according to the second embodiment shown in FIGS. 12 to 13. The damaged layer introduced by the dry etching at the time of repair is repaired (recovery layer 116 in the figure) [FIG. 24].

Subsequently, a TaN film having a thickness of 10 nm, for example, is deposited on the entire surface by, for example, a sputtering method to form a barrier metal 74 of the TaN film.

Subsequently, a Cu film having a film thickness of 10 nm, for example, is deposited on the barrier metal 74 by a sputtering method to form a seed film (not shown) of the Cu film.

Subsequently, for example, by electroplating, a Cu film is deposited using the seed film as a seed to form a Cu film 76 having a total film thickness combined with the seed layer, for example, 1400 nm.

Subsequently, the Cu film 76 and the barrier metal 74 on the insulating film 60 are removed by polishing by the CMP method to remove the barrier metal 74 and the Cu film 76 embedded in the via hole 66. The contact plug 77a to be included and the wiring 77b including the barrier metal 74 and the Cu film 76 embedded in the wiring groove 72 are integrally formed.

In this embodiment, the insulating film 60 is also removed in the polishing process at the time of forming the contact plug 77a and the wiring 77b. The insulating film 60 is used as a hard mask for forming the via hole 66 and the wiring groove 46, but is generally formed of a material having a higher dielectric constant than that of the interlayer insulating film 54. Therefore, in the present embodiment, from the viewpoint of lowering the dielectric constant of the interlayer insulating film, the insulating film 60 is also removed in the polishing step for forming the contact plug 77a and the wiring 77b. When the insulating film 60 is removed by polishing, a damage layer in which Si-OH is formed is formed in the lower interlayer insulating film 54 by this polishing step.

Subsequently, for example, in the same manner as in the manufacturing method of the semiconductor device according to the fourth embodiment shown in FIG. 19, the treatment with the silane compound and the ultraviolet irradiation are performed to form the contact plug 77a and the wiring 77b. The damage introduced into the interlayer insulating film 54 by polishing is repaired (Fig. 25).

In the case of removing the insulating film 60 by polishing, damage may be introduced into the lower interlayer insulating film 54 and the dielectric constant of the interlayer insulating film 54 may increase. However, the damage introduced into the interlayer insulating film 54 is repaired by performing the above-described damage repairing process, and it is possible to prevent the dielectric constant of the interlayer insulating film 54 from increasing. By removing the insulating film 60, the interlayer insulating film can be further reduced in dielectric constant.

Subsequently, an SiC: O: H film having a thickness of 30 nm, for example, is deposited on the entire surface by, for example, a CVD method to form an insulating film 78 of the SiC: O: H film (Fig. 26).

Thereafter, if necessary, the same steps as described above are appropriately repeated to form a third layer wiring (not shown), and the semiconductor device according to the present embodiment is completed.

As described above, according to the present embodiment, an increase in dielectric constant of the insulating film due to processing damage when the insulating film is processed can be restored, and an increase in dielectric constant due to air standing can be prevented. As a result, a highly reliable insulating film can be obtained at a low dielectric constant. Therefore, by applying the insulating film to, for example, an interlayer insulating film of a multilayer wiring structure, the response speed of the semiconductor device can be increased.

Modified Embodiment

This invention is not limited to the structure of the semiconductor device disclosed in the said embodiment, and its manufacturing method, It can apply widely to manufacture of the semiconductor device which has a silica type insulating film. The film thickness and the constituent material of each layer forming the semiconductor device can also be appropriately changed.

Example 1

200 ml of reaction vessel of 20.8 g (0.1 mol) of tetraethoxysilane, 17.8 g (0.1 mol) of methyltriethoxysilane, 23.6 g (0.1 mol) of glycidoxypropyltrimethoxysilane, and 39.6 g of methyl isobutyl ketone 16.2 g (0.9 mol) of a 1% tetramethylammonium hydroxide aqueous solution was added dropwise for 10 minutes, and the aging reaction was performed for 2 hours after the completion of dropping.

Next, 5 g of magnesium sulfate was added to remove excess water, and then, by rotary evaporator, ethanol produced in the aging reaction was removed until the reaction solution became 50 ml. 20 ml of methyl isobutyl ketones were added to the obtained reaction solution, and the porous silica precursor coating solution was produced.

The prepared porous silica precursor coating solution was spin-coated on a low resistance substrate, prebaked at 250 ° C. for 3 minutes, and then calculated from the absorption strength of Si-OH around 950 cm ⁻¹ using FT-IR. , Crosslinking rate was 75%.

Subsequently, the porous silica precursor coating solution thus prepared was applied onto the silicon substrate 300 by the spin coating method so that the film thickness was 400 nm.

Subsequently, the porous silica precursor coating solution applied onto the silicon substrate 200 was prebaked at 250 ° C. for 3 minutes.

Subsequently, the prebaked porous silica precursor coating solution was cured under conditions of 400 ° C. for 30 minutes in an electric furnace in a nitrogen atmosphere to form a silica-based porous insulating film 302 (FIG. 27A).

Next, a silica-based porous insulation film 302 formed in this manner, a RIE etcher (etcher), a mixed gas of CHF ₃ / CF ₄ as the etching gas to CHF ₃ Flow rate 50 sccm, CF ₄ Dry etching was carried out so that the flow rate was 100 sccm, the chamber pressure was 50 mTorr, the power was 200 W, and the film thickness was 200 nm. As a result, the thickness of the silica-based porous insulating film 302 is reduced, and the damage layer 304 is formed on the surface thereof (Fig. 27 (b)).

Then, 3 cc of hexamethyldisilazane was dripped on the damage layer 304, and spin-coating was performed on 1000 rpm and 60 second conditions.

Then, the baking process of 120 degreeC and 60 second and the baking process of 250 degreeC and 60 second were performed in this order with a hotplate. As a result, the damage layer 304 is repaired, and the repair layer 306 is formed on the surface of the silica-based porous insulating film 302 (Fig. 27 (c)).

Subsequently, in the state which heated the board | substrate to 400 degreeC in nitrogen atmosphere, the silica porous insulating film was irradiated with the ultraviolet-ray of wavelength 200-600 nm for 10 minutes by the high pressure mercury lamp (Ushio Inc. make, UVL-7000H4-N). [FIG. 27 (d)].

Table 1 summarizes the results obtained by calculating the dielectric constant of the silica-based porous insulating film 302 after each step and one week of atmospheric standing with a mercury prober.

As shown in Table 1, the dielectric constant immediately after the deposition of the silica-based porous insulating film 302 was 2.24. By dry-etching this film, the damage layer 304 was formed and the dielectric constant rose to 2.86. Thereafter, the dielectric constant was recovered to 2.36 by performing the recovery treatment with the silane compound, but did not return to the value immediately after the film formation. However, by further performing ultraviolet irradiation after the recovery treatment with the silane compound, the dielectric constant was recovered to 2.26, which is close to the value immediately after film formation. In addition, even after waiting for one week, the dielectric constant was 2.25, which maintained a low value immediately after film formation.

[Example 2]

An evaluation sample was produced in the same manner as in Example 1 except that electron beam irradiation was used instead of light irradiation in the step of FIG. 27D. Electron beam irradiation was performed by heating a board | substrate at 400 degreeC in a vacuum, and irradiating for 1 minute, making acceleration voltage 10 kV.

Table 1 summarizes the result of calculating the dielectric constant of the silica-based porous insulating film after each step and after waiting for one week from the capacity measured by the mercury prober.

As shown in Table 1, the dielectric constant immediately after the deposition of the silica-based porous insulating film was 2.24. By performing dry etching on this film, a damage layer was formed and the dielectric constant rose to 2.86. Thereafter, the dielectric constant was recovered to 2.36 by performing the recovery treatment with the silane compound, but did not return to the value immediately after the film formation. However, by further performing electron beam irradiation after the recovery treatment with the silane compound, the dielectric constant was recovered to 2.28, which is close to the value immediately after film formation. In addition, even after waiting for one week, the dielectric constant was 2.26, which maintained a low value immediately after film formation.

Comparative Example 1

An evaluation sample was produced in the same manner as in Example 1 and Example 2 except that light irradiation and electron beam irradiation were not performed in the step of FIG. 27D.

Table 1 summarizes the result of calculating the dielectric constant of the silica-based porous insulating film after each step and after waiting for one week from the capacity measured by the mercury prober.

As shown in Table 1, the dielectric constant immediately after the deposition of the silica-based porous insulating film was 2.24. By performing dry etching on this film, a damage layer was formed and the dielectric constant rose to 2.86. Thereafter, the dielectric constant was recovered to 2.36 by performing the recovery treatment with the silane compound, but did not return to the value immediately after the film formation. Then, when it was left to stand for one week without performing light irradiation and electron beam irradiation, dielectric constant increased to 2.52.

Example 3

By the manufacturing method of the semiconductor device by the said 2nd Embodiment, even the 3rd layer wiring layer was formed. Moreover, the 3rd layer wiring layer was formed on the same process conditions as a 2nd layer wiring layer.

It was 91% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.60 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 4

The semiconductor device was manufactured by the same process as Example 3 except having performed the ultraviolet irradiation after the damage repair process by a silane compound in helium atmosphere. Specifically, in the state of heating the substrate to 400 ° C. in the ultraviolet irradiation after the damage repair treatment in a helium atmosphere, using a high-pressure mercury lamp (manufactured by Ushio Inc., UVL-7000H4-N), the wavelength is 200 to 600 nm. It carried out by irradiating an ultraviolet-ray for 10 minutes.

It was 94% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.58 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 5

The semiconductor device was manufactured by the same process as Example 3 except having performed the ultraviolet irradiation after the damage repair process by a silane compound in argon atmosphere. Specifically, in a state where the substrate is heated to 400 ° C in an argon atmosphere in the ultraviolet irradiation after the damage repair treatment, the wavelength is 200-600 nm using a high-pressure mercury lamp (UVL-7000H4-N manufactured by Ushio Inc.). It carried out by irradiating an ultraviolet-ray for 10 minutes.

It was 93% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. In addition, the effective dielectric constant of the interlayer insulating film was measured by the interlayer capacitance, and found to be 2.61. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 6

The semiconductor device was manufactured by the same process as Example 3 except having performed the ultraviolet irradiation after the damage repair process by a silane compound in a vacuum. Specifically, ultraviolet rays having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N, manufactured by Ushio Inc.) in a state where the substrate is heated to 400 ° C. in a vacuum in the ultraviolet irradiation after the damage repair treatment. Was carried out by irradiating for 10 minutes.

It was 96% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.52 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 7

After the damage repair treatment with the silane compound, a semiconductor device was manufactured by the same process as in Example 3 except that electron beam irradiation was used instead of ultraviolet irradiation. Electron beam irradiation was performed by irradiating for 1 minute with the acceleration voltage of 10 kV, in the state which heated the board | substrate at 400 degreeC in vacuum.

It was 90% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.63 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Comparative Example 2

In the process of Example 3, the semiconductor device was manufactured without performing the damage repair process, light irradiation, and electron beam irradiation process by a silane compound.

It was 72% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.96 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, a resistance increase was found at 45% of the number of vias.

Comparative Example 3

In the process of Example 3, the semiconductor device was manufactured without performing only the damage repair process by a silane compound, and performing light irradiation and an electron beam irradiation process.

It was 81% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.82 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wire resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, an increase in resistance was found at 18% of the number of vias.

Example 8

200 ml of reaction vessel of 20.8 g (0.1 mol) of tetraethoxysilane, 17.8 g (0.1 mol) of methyltriethoxysilane, 23.6 g (0.1 mol) of glycidoxypropyltrimethoxysilane, and 39.6 g of methyl isobutyl ketone 16.2 g (0.9 mol) of a 1% tetramethylammonium hydroxide aqueous solution was added dropwise for 10 minutes, and the aging reaction was performed for 2 hours after the completion of dropping.

Next, 5 g of magnesium sulfate was added to remove excess water, and then, by rotary evaporator, ethanol produced in the aging reaction was removed until the reaction solution became 50 ml. 20 ml of methyl isobutyl ketones were added to the obtained reaction solution, and the porous silica precursor coating solution for wiring isolation layers was produced.

The prepared porous silica precursor coating solution was spin-coated on a low resistance substrate, prebaked at 250 ° C. for 3 minutes, and then calculated from the absorption strength of Si-OH around 950 cm ⁻¹ using FT-IR. , Crosslinking rate was 75%.

Subsequently, the porous silica precursor coating solution thus prepared was applied onto the silicon substrate as the base substrate 200 by the spin coating method such that the film thickness was 400 nm.

Subsequently, the porous silica precursor coating solution applied onto the base substrate 200 was prebaked at 250 ° C. for 3 minutes.

Subsequently, the prebaked porous silica precursor coating solution was cured under conditions of 400 ° C. for 30 minutes in an electric furnace in a nitrogen atmosphere to form a silica-based porous insulating film 202 (see FIG. 16A).

Subsequently, the silica-based porous insulating film 202 thus formed was polished with a chemical mechanical polishing (CMP) device. As a result, the thickness of the silica-based porous insulating film 202 decreases, and the damage layer 204 is formed on the surface thereof (see FIG. 16B).

Subsequently, the surface of the polished silica-based porous insulating film 202 was washed with 0.5% aqueous hydrofluoric acid solution.

Then, 3 cc of hexamethyldisilazane was dripped on the polished silica porous insulating film 202, and spin-coating was performed on 1000 rpm and 60 second conditions.

Subsequently, the baking process of 120 degreeC and 60 second and the baking process of 250 degreeC and 60 second were performed in this order with a hotplate. As a result, the damage layer 204 is repaired, and a repair layer 206 is formed on the surface of the silica-based porous insulating film 202 (see FIG. 16C).

Subsequently, in the state which heated the board | substrate to 400 degreeC in nitrogen atmosphere, the silica porous insulating film was irradiated with the ultraviolet-ray of wavelength 200-600 nm for 10 minutes by the high pressure mercury lamp (Ushio Inc. make, UVL-7000H4-N). [FIG. 15 (d)].

Table 2 summarizes the results obtained by calculating the dielectric constant of the silica-based porous insulating film 202 after each step and after one week of atmospheric standing with a mercury prober.

As shown in Table 2, the dielectric constant immediately after the deposition of the silica-based porous insulating film 202 was 2.24. By polishing this film, the damage layer 204 was formed, and the dielectric constant rose to 3.12. Thereafter, the dielectric constant was recovered to 2.39 by performing a recovery treatment with the silane compound, but did not return to the value immediately after the film formation. However, by further performing ultraviolet irradiation after the recovery treatment with the silane compound, the dielectric constant was recovered to 2.25, which is close to the value immediately after film formation. In addition, even after waiting for one week, the dielectric constant was 2.25, which maintained a low value immediately after film formation.

Example 9

Except for performing electron beam irradiation instead of light irradiation in the process of FIG. 16 (d), it carried out similarly to the case of Example 8, and produced the evaluation sample. Electron beam irradiation was performed by heating a board | substrate at 400 degreeC in a vacuum, and irradiating for 1 minute, making acceleration voltage 10 kV.

Table 2 summarizes the results obtained by calculating the dielectric constant of the silica-based porous insulating film after each step and after one week of atmospheric standing with a mercury prober.

As shown in Table 2, the dielectric constant immediately after the deposition of the silica-based porous insulating film 202 was 2.24. By polishing this film, the damage layer 204 was formed, and the dielectric constant rose to 3.12. Thereafter, the dielectric constant was recovered to 2.39 by performing a recovery treatment with the silane compound, but did not return to the value immediately after the film formation. However, by further performing electron beam irradiation after the recovery treatment with the silane compound, the dielectric constant was recovered to 2.25, which is close to the value immediately after film formation. In addition, even after waiting for one week, the dielectric constant was 2.26, which maintained a low value immediately after film formation.

[Comparative Example 4]

Except not performing light irradiation and electron beam irradiation in the process of FIG.16 (d), it carried out similarly to the case of Example 1 and Example 2, and produced the evaluation sample.

Table 2 summarizes the results obtained by calculating the dielectric constant of the silica-based porous insulating film after each step and after one week of atmospheric standing with a mercury prober.

As shown in Table 2, the dielectric constant immediately after the deposition of the silica-based porous insulating film was 2.24. By polishing this film, the damage layer 204 was formed, and the dielectric constant rose to 3.12. Thereafter, the dielectric constant was recovered to 2.39 by performing a recovery treatment with the silane compound, but did not return to the value immediately after the film formation. Then, when it was left to stand for one week without performing light irradiation and electron beam irradiation, dielectric constant increased to 2.55.

Example 10

Except having changed the heat treatment temperature at the time of light irradiation in the process of FIG.16 (d), it carried out similarly to the case of Example 8, and produced the evaluation sample. The heat processing temperature at the time of light irradiation was 30 degreeC, 60 degreeC, 100 degreeC, 150 degreeC, 200 degreeC, 250 degreeC, 300 degreeC, 350 degreeC, and 400 degreeC, and the evaluation sample about each was produced.

Table 3 summarizes the result of calculating the dielectric constant of the silica-based porous insulating film immediately after preparation of the evaluation sample and after waiting for one week from the capacity measured by the mercury prober.

As shown in Table 3, the dielectric constant of the silica-based porous insulating film 202 immediately after preparation of each evaluation sample was almost constant at 2.24 to 2.26. The dielectric constant was 2.24 to 2.26 even after the air was left for one week, maintaining a low value equivalent to that immediately after preparation of the evaluation sample.

Example 11

Except having changed the heat processing temperature at the time of electron beam irradiation in the process of FIG.16 (d), it carried out similarly to the case of Example 9, and produced the evaluation sample. The heat processing temperature at the time of electron beam irradiation was made into 30 degreeC, 60 degreeC, 100 degreeC, 150 degreeC, 200 degreeC, 250 degreeC, 300 degreeC, 350 degreeC, and 400 degreeC, and the evaluation sample about each was produced.

Table 3 summarizes the result of calculating the dielectric constant of the silica-based porous insulating film immediately after preparation of the evaluation sample and after waiting for one week from the capacity measured by the mercury prober.

As shown in Table 3, the dielectric constant of the silica-based porous insulating film 202 immediately after preparation of each evaluation sample was almost constant at 2.24 to 2.26. The dielectric constant was 2.24 to 2.26 even after the air was left for one week, maintaining a low value equivalent to that immediately after preparation of the evaluation sample.

[Comparative Example 5]

Except that light irradiation and electron beam irradiation were not performed in the process of FIG.16 (d), it carried out similarly to the case of Example 10 and Example 11, and produced the evaluation sample.

Table 3 summarizes the result of calculating the dielectric constant of the silica-based porous insulating film immediately after preparation of the evaluation sample and after waiting for one week from the capacity measured by the mercury prober.

As shown in Table 3, the dielectric constants of the silica-based porous insulating film 202 immediately after preparation of each evaluation sample were 2.34 to 2.39, which were higher than those of Examples 10 and 11 that were subjected to light irradiation or electron beam irradiation. In addition, the dielectric constant increased from 2.52 to 2.56 when left for one week.

Example 12

By the manufacturing method of the semiconductor device which concerns on said 4th embodiment, it formed even to 3rd layer wiring layer. The ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and grinding | polishing was performed in nitrogen atmosphere. Moreover, the 3rd layer wiring layer was formed on the same process conditions as a 2nd layer wiring layer.

It was 91% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.60 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 13

The semiconductor device was manufactured by the same process as Example 12 except the ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and grinding in a helium atmosphere. Specifically, the ultraviolet irradiation after the damage repair process, the ultraviolet ray having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N, manufactured by Ushio Inc.) while heating the substrate at 400 ° C in a helium atmosphere. Was carried out by irradiating for 10 minutes.

It was 94% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.58 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 14

The semiconductor device was manufactured by the same process as Example 12 except the ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and polishing in argon atmosphere. Specifically, the ultraviolet irradiation after the damage repair process, the ultraviolet ray having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N, manufactured by Ushio Inc.) while heating the substrate to 400 ° C in an argon atmosphere. Was carried out by irradiating for 10 minutes.

It was 93% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. In addition, the effective dielectric constant of the interlayer insulating film was measured by the interlayer capacitance, and found to be 2.61. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 15

A semiconductor device was manufactured in the same manner as in Example 12, except that ultraviolet irradiation after the damage repair treatment with the silane compound performed after the dry etching and polishing was performed in a vacuum. Specifically, in the state of heating the substrate at 400 ° C. in a vacuum in the ultraviolet irradiation after the damage repair treatment, ultraviolet rays having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N manufactured by Ushio Inc.). It carried out by irradiating for 10 minutes.

It was 96% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.52 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 16

After the damage repair treatment with the silane compound, a semiconductor device was manufactured in the same process as in Example 12 except that the electron beam irradiation was carried out instead of the ultraviolet irradiation. Electron beam irradiation was performed by irradiating for 1 minute with the acceleration voltage of 10 kV, in the state which heated the board | substrate at 400 degreeC in vacuum.

It was 90% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.63 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

[Comparative Example 6]

In the process of Example 12, the semiconductor device was manufactured without performing the damage repair process, light irradiation, and electron beam irradiation process by a silane compound.

It was 72% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.82 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, a resistance increase was found at 45% of the number of vias.

Comparative Example 7

In the process of Example 12, the semiconductor device was manufactured without performing only the damage repair process by a silane compound, and performing light irradiation and an electron beam irradiation process.

It was 81% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.82 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wire resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, an increase in resistance was found at 18% of the number of vias.

Example 17

By the manufacturing method of the semiconductor device which concerns on the said 5th Embodiment, it formed even to the 3rd layer wiring layer. Ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and polishing was performed in nitrogen atmosphere. Moreover, the 3rd layer wiring layer was formed on the same process conditions as a 2nd layer wiring layer.

It was 94% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.49 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 18

The semiconductor device was manufactured by the same process as Example 17 except the ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and grinding in a helium atmosphere. Specifically, the ultraviolet irradiation after the damage repair process, the ultraviolet ray having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N, manufactured by Ushio Inc.) while heating the substrate at 400 ° C in a helium atmosphere. Was carried out by irradiating for 10 minutes.

It was 96% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.47 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 19

The semiconductor device was manufactured by the same process as Example 17 except performing ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and polishing in argon atmosphere. Specifically, the ultraviolet irradiation after the damage repair process, the ultraviolet ray having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N, manufactured by Ushio Inc.) while heating the substrate to 400 ° C in an argon atmosphere. Was carried out by irradiating for 10 minutes.

It was 97% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.47 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 20

The semiconductor device was manufactured by the same process as Example 17 except the ultraviolet irradiation after the damage repair process by the silane compound performed after dry etching and polishing in vacuum. Specifically, in the state of heating the substrate at 400 ° C. in a vacuum in the ultraviolet irradiation after the damage repair treatment, ultraviolet rays having a wavelength of 200 to 600 nm using a high-pressure mercury lamp (UVL-7000H4-N manufactured by Ushio Inc.). It carried out by irradiating for 10 minutes.

It was 95% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.46 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Example 21

After the damage repair treatment with the silane compound, a semiconductor device was manufactured in the same process as in Example 17 except that the electron beam irradiation was performed instead of the ultraviolet irradiation. Electron beam irradiation was performed by irradiating for 1 minute with the acceleration voltage of 10 kV, in the state which heated the board | substrate at 400 degreeC in vacuum.

It was 93% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.47 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at a high temperature, no increase in resistance was found.

Comparative Example 8

In the process of Example 17, the semiconductor device was manufactured without performing the damage repair process, light irradiation, and electron beam irradiation process by a silane compound.

It was 65% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.76 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, a resistance increase was found at 58% of the number of vias.

[Comparative Example 9]

In the process of Example 17, the semiconductor device was manufactured without performing only the damage repair process by a silane compound, and performing light irradiation and an electron beam irradiation process.

It was 67% when the yield of 1 million continuous vias was measured using the multilayer wiring of the test fabricated semiconductor device. Moreover, it was 2.75 when the effective dielectric constant of the interlayer insulation film was measured by the interlayer capacitance. In addition, when the wiring resistance was measured after being left at 200 ° C. for 1000 hours at high temperature, a resistance increase was found in 26% of the number of vias.

Regarding the above embodiment, the following bookkeeping is further disclosed.

(Book 1)

Forming an insulating film of a silica-based insulating material on the semiconductor substrate;

Processing the insulating film;

Hydrophobizing by acting a silane compound on the processed insulating film,

And a step of irradiating light or electron beam to the insulating film.

(Book 2)

In the method for manufacturing a semiconductor device described in Appendix 1,

In the step of processing the insulating film, the insulating film is processed by dry etching.

(Supplementary Note 3)

In the method for manufacturing a semiconductor device described in Appendix 1,

In the step of processing the insulating film, the insulating film is processed by polishing.

(Appendix 4)

In the method for manufacturing a semiconductor device described in Appendix 1,

After the step of processing the insulating film, and before the step of hydrophobizing by acting the silane compound on the processed insulating film, the insulating film is mixed with oxygen, argon, hydrogen or nitrogen, or a mixture of a plurality of gases selected from these. A method of manufacturing a semiconductor device, further comprising the step of treating with plasma.

(Note 5)

In the method for manufacturing a semiconductor device described in Appendix 4,

The step of treating the insulating film with a plasma of a mixed gas of oxygen, argon, hydrogen or nitrogen, or a plurality of gases selected from these, removes by-products generated in the step of processing the insulating film and adhered to the insulating film. The manufacturing method of the semiconductor device characterized by the above-mentioned.

(Note 6)

In the method for manufacturing a semiconductor device described in Appendix 1,

And after the step of processing the insulating film, before the step of applying the silane compound to the insulating film, removing the by-products generated in the step of processing the insulating film and attached to the insulating film with a chemical liquid. A manufacturing method of a semiconductor device.

(Appendix 7)

In the method for manufacturing a semiconductor device described in Appendix 1,

The process of irradiating light or an electron beam to the said insulating film is performed in the temperature range of 30-400 degreeC, The manufacturing method of the semiconductor device characterized by the above-mentioned.

(Appendix 8)

In the method for manufacturing a semiconductor device described in Appendix 1,

The process of irradiating light or an electron beam to the said insulating film is performed in the atmosphere whose oxygen concentration is 150 ppm or less, The manufacturing method of the semiconductor device characterized by the above-mentioned.

(Appendix 9)

In the method for manufacturing a semiconductor device described in Appendix 8,

The atmosphere is an atmosphere of nitrogen, helium or argon, or a mixed gas of a plurality of gases selected from these.

(Book 10)

In the method for manufacturing a semiconductor device described in Appendix 8,

The atmosphere is a vacuum method for producing a semiconductor device.

(Note 11)

In the method for manufacturing a semiconductor device described in Appendix 1,

The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is performed in the temperature range of 20-350 degreeC, The manufacturing method of the semiconductor device characterized by the above-mentioned.

(Appendix 12)

In the method for manufacturing a semiconductor device described in Appendix 1,

The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is a manufacturing method of the semiconductor device characterized by irradiating the said insulating film with the vapor containing the said silane compound.

(Appendix 13)

In the method for manufacturing a semiconductor device described in Appendix 1,

The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is a manufacturing method of the semiconductor device characterized by the above-mentioned.

(Book 14)

In the method for manufacturing a semiconductor device according to Appendix 13,

The said silane compound is apply | coated on the said insulating film, Then, it heats in the temperature range of 50-350 degreeC, The manufacturing method of the semiconductor device characterized by the above-mentioned.

(Supplementary Note 15)

In the method for manufacturing a semiconductor device described in Appendix 1,

The silane compound is a silazane silane compound, an amide silane compound, an alkoxy silane compound, or an acetoxy silane compound.

(Appendix 16)

In the method for manufacturing a semiconductor device described in Appendix 1,

And the insulating film is a laminated film including a porous silica-based insulating film.

(Appendix 17)

In the method for manufacturing a semiconductor device described in Appendix 1,

And the insulating film is a laminated film including an SiOC film formed by plasma CVD.

(Note 18)

Forming an insulating film of a silica-based insulating material on the semiconductor substrate;

Forming an opening in the insulating film by dry etching;

Forming a conductive film on the openings and the insulating film;

Removing the conductive film on the insulating film by polishing to form a wiring including the conductive film embedded in the opening;

Between the step of forming the opening in the insulating film by the dry etching, the step of forming the conductive film on the opening and the insulating film, and the conductive film on the insulating film by polishing to remove the conductive film. At least one of the steps of forming the wiring including the embedded conductive film, followed by hydrophobization by acting a silane compound on the insulating film, and performing light irradiation or electron beam irradiation on the insulating film. A manufacturing method of a semiconductor device.

(Note 19)

In the method for manufacturing a semiconductor device according to Appendix 18,

In the step of forming the insulating film of silica-based insulating material on the semiconductor substrate, a first insulating film and the second insulating film formed on the first insulating film are formed,

The process of forming the wiring including the conductive film embedded in the opening by removing the conductive film on the insulating film by polishing removes the conductive film and the second insulating film. Way.

(Note 20)

In the method for manufacturing a semiconductor device described in Appendix 19,

And the second insulating film is a hard mask during the step of removing the conductive film on the insulating film by polishing to form the wiring including the conductive film embedded in the opening.

1 is a flowchart showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention.

2 is a cross-sectional view (first step cross-sectional view) showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

Fig. 3 is a cross sectional view of the manufacturing method of the semiconductor device according to the first embodiment of the present invention (second cross sectional view).

Fig. 4 is a cross sectional view of the manufacturing method of the semiconductor device according to the second embodiment of the present invention (first cross-sectional view).

Fig. 5 is a cross sectional view (second step cross sectional view) showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.

Fig. 6 is a cross sectional view (third step cross sectional view) showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.

Fig. 7 is a cross sectional view illustrating the method of manufacturing the semiconductor device according to the second embodiment of the present invention (fourth cross sectional view).

8 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention (fifth cross-sectional view).

Fig. 9 is a cross sectional view (sixth step sectional view) showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.

Fig. 10 is a cross sectional view of the manufacturing method of the semiconductor device according to the second embodiment of the present invention (seventh step cross sectional view).

Fig. 11 is a cross sectional view (eighth cross sectional view) showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.

12 is a cross sectional view of a manufacturing method of a semiconductor device according to a second embodiment of the present invention (ninth step cross sectional view).

Fig. 13 is a cross sectional view of the manufacturing method of the semiconductor device according to the second embodiment of the present invention (a tenth cross sectional view).

Fig. 14 is a cross sectional view of the manufacturing method of the semiconductor device according to the second embodiment of the present invention (eleventh step sectional view).

15 is a flowchart showing a method of manufacturing a semiconductor device according to the third embodiment of the present invention.

16 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the third embodiment of the present invention.

Fig. 17 is a cross sectional view of the manufacturing method of the semiconductor device according to the fourth embodiment of the present invention (first cross-sectional view).

18 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention (second cross-sectional view).

19 is a cross sectional view (third step cross sectional view) showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.

20 is a cross sectional view illustrating the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention (fourth cross-sectional view).

Fig. 21 is a cross sectional view showing the manufacturing method of the semiconductor device according to the fourth embodiment of the invention (fifth step sectional view).

Fig. 22 is a cross sectional view of the manufacturing method of the semiconductor device of the fifth embodiment of the present invention (first cross-sectional view).

FIG. 23 is a cross sectional view of the manufacturing method of the semiconductor device according to the fifth embodiment of the present invention (second cross sectional view). FIG.

Fig. 24 is a cross sectional view (third step cross sectional view) showing a method for manufacturing a semiconductor device according to the fifth embodiment of the present invention.

25 is a cross sectional view illustrating the method of manufacturing the semiconductor device according to the fifth embodiment of the present invention (fourth cross-sectional view).

Fig. 26 is a cross sectional view showing the manufacturing method of the semiconductor device according to the fifth embodiment of the invention (fifth step sectional view).

Fig. 27 is a cross sectional view showing the manufacturing method of the evaluation sample used for verifying the effect of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: semiconductor substrate 12: device isolation film

14: device region 16: gate insulating film

18: gate electrode 22: source / drain region

24: MOS transistor 26: interlayer insulating film

28: stopper film 30: contact hole

32, 48, 74: barrier metal 34: tungsten film

35, 77a: contact plugs 36, 40, 52, 56, 60, 78: insulating film

38, 54, 58: porous interlayer insulating film 42, 62, 68: photoresist film

44, 64, 70: opening 46, 72: wiring groove

50, 76: Cu film 51, 77b: wiring

52, 78: insulating film for preventing Cu diffusion 66: via hole

100: base substrate 102: insulating film

104: hard mask 106: photoresist film

108, 110: opening 112: damage layer

114: sidewall deposit 116: repair layer

200: base substrate 202: insulating film

204: damaged layer 206: repair layer

300: silicon substrate 302: silica porous insulating film

304: damage layer 306: repair layer

Claims (11)

Forming an insulating film of a silica-based insulating material on the semiconductor substrate; Processing the insulating film; Hydrophobizing the insulating film by applying a silane compound to Si-OH produced on the processed insulating film, Light irradiation or electron beam irradiation on the hydrophobized insulating film Method for manufacturing a semiconductor device comprising a. The method of claim 1, After the step of processing the insulating film, and before the step of hydrophobizing by acting the silane compound on the processed insulating film, the insulating film is mixed with oxygen, argon, hydrogen or nitrogen, or a mixture of a plurality of gases selected from these. A method of manufacturing a semiconductor device, further comprising the step of treating with plasma. The method of claim 1, The process of irradiating light or an electron beam to the said insulating film is performed in the temperature range of 30-400 degreeC, The manufacturing method of the semiconductor device characterized by the above-mentioned. The method of claim 1, The process of irradiating light or an electron beam to the said insulating film is performed in the atmosphere whose oxygen concentration is 150 ppm or less, The manufacturing method of the semiconductor device characterized by the above-mentioned. The method of claim 4, wherein The atmosphere is an atmosphere of nitrogen, helium or argon, or a mixed gas of a plurality of gases selected from these. delete The method of claim 1, The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is performed in the temperature range of 50-350 degreeC, The manufacturing method of the semiconductor device characterized by the above-mentioned. The method of claim 1, The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is a manufacturing method of the semiconductor device characterized by irradiating the said insulating film with the vapor containing the said silane compound. The method of claim 1, The said step of hydrophobizing by acting the said silane compound on the processed said insulating film is a manufacturing method of the semiconductor device characterized by the above-mentioned. Forming an insulating film of a silica-based insulating material on the semiconductor substrate; Forming an opening in the insulating film by dry etching; Forming a conductive film on the openings and the insulating film; Removing a conductive film on the insulating film by polishing to form a wiring including the conductive film embedded in the opening; Including, Between the step of forming the opening in the insulating film by the dry etching, the step of forming the conductive film on the opening and the insulating film, and the conductive film on the insulating film by polishing to remove the conductive film. Hydrophobizing the insulating film by applying a silane compound to Si-OH formed on the processed insulating film at least after the step of forming the wiring including the embedded conductive film; The method of manufacturing a semiconductor device, further comprising the step of performing light irradiation or electron beam irradiation. Forming an insulating film of a silica-based insulating material on the semiconductor substrate; Processing the insulating film; Hydrophobizing the insulating film by applying a silane compound to Si-OH produced on the processed insulating film, Irradiating an electron beam with an acceleration voltage of 1 to 15 kV in a vacuum to the hydrophobized insulating film Method for manufacturing a semiconductor device comprising a.

Images