KR101003909B1 - Potential well barrier transistor - Google Patents

Abstract

The present invention relates to a potential well barrier transistor, and more particularly, to a potential well barrier transistor using a barrier layer having a potential well formed by a wide band gap and a narrow band gap.

A transistor having a heterojunction layer structure of the present invention, comprising: a substrate and a buffer layer on the substrate; A first barrier layer on the buffer layer; A channel layer on the first barrier layer; A second barrier layer on the channel layer, the second barrier layer having a potential well; And a cap layer located on the second barrier layer.

Potential Wells, Heterojunctions, Barrier Layers, Transistors

Description

Potential well barrier transistor

The present invention relates to a potential well barrier transistor, and more particularly, to a potential well barrier transistor using a barrier layer having a potential well formed by a wide band gap and a narrow band gap.

High Electron Mobility Transistors (HEMTs) or Metal Epitaxial Semiconductor Field Effect Transistors (MESFETs) with Schottky contacts as gates are N-channel elements that provide voltage across the gate. Increasing increases the drain current I _DS . The gate Schottky junction of the devices is in a conducting state as a current flows when a forward voltage is applied.

However, the Schottky gate turn-on voltage (Schottky turn-on voltage, V G. ON) can not make more than thereby also limit the drain current (I _DS). As a result, the heterojunction layer structure to increase the Schottky turn-on voltage (V _{G. ON)} for increasing the drain current (I _DS) have been developed.

1 is a first embodiment of a GaAs-based high electron mobility device according to the prior art.

1, the conventional general GaAs-based high electron mobility device (HEMT) includes a substrate and a buffer layer (100) on the Al _{0 .22 0 .78} Ga As first barrier layer 200, has a high electron mobility is composed of in _0.22 Ga _0.78 as channel layer 300, the electron supply layer is an Al _{0 .22} GaAs second barrier layer 400 and the n ⁺ GaAs cap layer 500.

The GaAs n ⁺ cap layer 500 is a heavily doped n-type layer disposed between the source and drain regions, and a source and drain contact layer is formed on the source and drain regions of the GaAs n ⁺ cap layer 500, respectively. The gate electrode is formed on the portion of the second barrier layer 400 from which the GaAs n ⁺ cap layer 500 between the source and drain regions is removed.

In such a structure, the gate turn-on voltage Schottky (Schottky turn-on voltage, V G. ON) can not make more than thereby also limit the drain current (I _DS).

2 is a wide band gap to increase _(ON V _G.) High electron mobility of the second embodiment, the road there is shown than the gate Schottky turn-on voltage when the first reference to Figure 2 of a device according to the prior art (wide band second barrier layer (410), Al _{0 .22} on a substrate and a buffer layer (100) _{0 .78} Ga as first barrier layer including a first semiconductor layer 411 is made of a material or a high conduction material having a gap) ( 200), is composed of in _{0 .22} Ga _{0 .78} as channel layer 300 and the n ⁺ GaAs cap layer 500 having a high resistance.

As shown in FIG. 2, the material (Al _{0 .45} GaAs), the first semiconductor layer 411, second barrier layer 410, a Schottky gate turn-on voltage (V _{G. ON)} Using including made with wide bandgap Can increase. However, materials with wide band gaps generally degrade the device's source drain ohmic contact.

That is, the second, but the thicker the thickness of the barrier layer 410, the gate Schottky turn-on voltage (V _{G. ON)} is increased, the degradation of the resistance contact also because up with the ion implantation (ion-implantation) in order to improve this, Although it is used for ohmic process, there is a problem of increasing process steps and cost.

3 is a third embodiment of a high electron mobility device according to the prior art.

Referring to FIG. 3, the second barrier layer 420 may include a first semiconductor layer 421 made of a material having a wide band gap or a high conduction band and a second material made of a material having a narrow band gap or a material having a low conduction band. It is a super lattice formed by alternately stacking the semiconductor layer 422 in several layers. Super lattice structure serves as a quantum-mechanical mirror and to increase the second barrier layer 420 in electrons _(ON V _G.) Makes a Schottky gate turn-on voltage to be introduced.

The second barrier layer 420 is a material having a first semiconductor layer 421 and made of a narrow bandgap material (Al _{0 .45} GaAs) having a wide bandgap second semiconductor layer made of the (In GaAs _{0 .22)} Since 422 is a superlattice structure repeatedly stacked in several layers, the source-drain resistance contact is lowered, so that the ion implantation method is used in the ohmic process, but the process step is increased and the cost is increased.

In addition, since the thickness of the second barrier layer 420 is large, the distance between the gate and the channel electrons increases, resulting in poor transconductance. In particular, the enhancement mode high-electron mobility device (Enhancement-mode HEMT) requires a thin barrier layer for the positive threshold voltage (super-lattice structure is not suitable for this.

The present invention devised to solve the above problems of the prior art increases the gate Schottky turn-on voltage of a transistor having a heterojunction layer structure by using a barrier layer having a potential well formed by a wide band gap and a narrow band gap. It is an object of the present invention to provide a potential well barrier transistor capable of applying a large voltage to a gate to increase a drain current.

The object of the present invention is a transistor having a heterojunction layer structure, comprising: a substrate and a buffer layer located on the substrate; A first barrier layer on the buffer layer; A channel layer on the first barrier layer; A second barrier layer on the channel layer, the second barrier layer having a potential well; And a cap layer positioned on the second barrier layer.

In addition, the second barrier layer of the present invention, the third semiconductor layer having a wide band gap; A second semiconductor layer having a narrow band gap present on the third semiconductor layer; And a wide band gap first semiconductor layer present on the second semiconductor layer.

Moreover, it is preferable that the thickness of the said 2nd semiconductor layer of this invention is 10-50 GPa.

The first semiconductor layer and the third semiconductor layer of the present invention are Al _X GaAs, and x is preferably 0.2 or more and 1 or less.

In addition, the first semiconductor layer and the third semiconductor layer of the present invention is In _{1 - X} Al _X As, wherein x is preferably 0.2 or more and less than 1.0.

In addition, the first semiconductor layer and the third semiconductor layer of the present invention is Al _X GaN, wherein x is preferably 0.1 or more and 1.0 or less.

In addition, the second semiconductor layer of the present invention is In _X GaAs, x is preferably more than 0.0 and less than 1.0.

In addition, the second semiconductor layer of the present invention is preferably GaN.

Accordingly, the potential well barrier transistor of the present invention can increase the gate schottky turn-on voltage by applying a barrier layer having a potential well formed by a wide band gap and a narrow band gap, thereby applying a large voltage to the gate, thereby increasing the drain current. There is an increased advantage and there is a significant and advantageous effect of providing a thin barrier layer, reducing the process steps and reducing the cost.

The terms or words used in this specification and claims are not to be construed as being limited to their ordinary or dictionary meanings, and the inventors may appropriately define the concept of terms in order to best describe their invention. It should be interpreted as meaning and concept corresponding to the technical idea of the present invention based on the principle that the present invention.

Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiment of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is a layer structure of a high electron mobility device according to the present invention.

Referring to Figure 4, Al _{0 .22} on a substrate and a buffer layer (600) _{0 .78} Ga As first barrier layer (700), In _{0 0 .22} Ga _.78 As channel layer 800 having high electron mobility, And a second barrier layer 900 having a potential well and a GaAs n ⁺ cap layer 1000.

Al _{0 .22} on a substrate and a buffer layer (600) _{0 .78} Ga As first barrier layer (700), In _{0 0 .22} Ga _.78 As channel layer 800 and n ⁺ GaAs cap layer having a higher electron mobility Reference numeral 1000 is the same as the high electron mobility device of FIG. 1.

The second barrier layer 900 having the potential well is a first semiconductor layer 910 made of a material having a wide band gap or a high conduction band, a second semiconductor layer made of a material having a narrow band gap or a material having a low conduction band. 920 and a third semiconductor layer 930 made of a material having a wide band gap or a high conduction band (see FIG. 5).

Unlike the superlattice structure, the second barrier layer 900 uses a second semiconductor layer 920 made of a material having a narrow band gap of one layer. Above and below the second semiconductor layer 920 is a first semiconductor layer 910 and a third semiconductor layer 930 made of a material having a wide band gap so that the second semiconductor layer 920 becomes a potential well.

If the thickness of the second semiconductor layer 920 is less than 10 GPa, uniformity is not guaranteed. If the thickness of the second semiconductor layer 920 is less than 50 GPa, the second semiconductor layer 920 acts as a channel of electrons rather than a barrier. It is preferable that the thickness of 920 be 10-50 microseconds.

The first is located between the first semiconductor layer 910 and the third semiconductor layer 930 is Al _{0 .45} GaAs, Al _{0 .22} is composed of GaAs first semiconductor layer 910 and the third semiconductor layer 930 The second semiconductor layer 920 is composed of In _0.22 GaAs.

The material constituting the substrate and the buffer layer 600, the first barrier layer 700, the channel layer 800, the second barrier layer 900, and the cap layer 1000 of FIG. 4 may include AlGaAs, InGaAs, It can be replaced with various materials such as GaAs, InP, GaN, AlGaAs, and the composition of the material (mole fraction) can also be changed.

In particular, the materials constituting the first semiconductor layer 910 and the third semiconductor layer 930 are Al _X GaAs, In _1-X Al _X As, Al _X GaN, or the like, and have a wider band gap than the second semiconductor layer 920. It is possible to replace with a material having, In the case of Al _X GaAs, In _{1 - X} Al _X As, x is 0.2 or more and less than 1.0.

In addition, the material constituting the second semiconductor layer 920 may be replaced with a material having a narrower band gap than the first semiconductor layer 910 and the third semiconductor layer 930 by In _x GaAs, GaN, or the like. In the case of In _x GaAs, x is greater than 0.0 and greater than 1.0.

2 and 4, the first semiconductor layer 411 of FIG. 2 and the first semiconductor layer 910 of FIG. 4 are different from each other. That is, FIG. 2, a first semiconductor layer 411. On the other hand, in the Al _{0 .22} GaAs below, Figure 4, the first material of In _{0 .22} GaAs with a narrow band gap under the semiconductor layer 910 .

This Figure 4 is a structure gatneunde greater Schottky gate turn-on voltage (V _{G, ON)} than the structure of the second reason is that the first material having a narrow bandgap second semiconductor layer made of the (In _{0 .22} GaAs) 920 first because it increases the conduction band (E _c) of the semiconductor layer 910 made of a material (Al _{0 .45} GaAs) having a wide band gap that is formed on.

When the first semiconductor layer 910 made of a material having a wide band gap and the second semiconductor layer 920 made of a material having a narrow band gap are in contact with each other, the first semiconductor layer 910 made of a material having a wide band gap is formed. Some of the electrons in the electrons move to the second semiconductor layer 920 made of a material having a narrow band gap. This occurs because the conduction band of the second semiconductor layer 920 made of a material having a narrow band gap is lower than the conduction band of the first semiconductor layer 910 made of a material having a wide band gap.

When some of the electrons of the first semiconductor layer 910 made of a material having a wide band gap are moved to the second semiconductor layer 920 made of a material having a narrow band gap, the first semiconductor made of a material having a wide band gap is present. Depletion occurs in the layer 910 so that the electron concentration of the first semiconductor layer 910 made of a material having a wide band gap is lowered and the conduction band increases as the electrons are depleted.

Elevated conduction bands interfere with thermionic emission of electrons and reduce Schottky currents.

6 is a conduction band diagram below the gate at V _GS = 1.1V.

Referring to FIG. 6, V _GS = 1.1V is a gate Schottky turn-on voltage (V _{G , ON} ) of the high electron mobility device of FIG. 2, and the layer structure of the high electron mobility device according to the present invention of FIG. FIG high electron mobility of the second degree of the conduction band of the first semiconductor layer 910 made of a material (Al _{0 .45} GaAs) has a large band gap compared to the second embodiment structure of the device rose 0.04eV. That is, the layer structure of the high electron mobility device according to the present invention of FIG. 4 may be expected to flow less gate current at the same gate bias than that of the high electron mobility device of FIG. 2.

A second semiconductor layer made of a high-electron mobility according to the present invention of FIG. 4 layer structure of the device is the channel layer 800 material _{(0 .22} In GaAs), a part of electrons traveling in the gate with a narrow band gap in the ( Go to 920. The electron of the second semiconductor layer 920 is a large conduction band discontinuity band between the second semiconductor layer 920 made of a material having a narrow band gap and the first semiconductor layer 910 made of a material having a wide band gap. discontinuity) to get to the gate.

On the other hand, consisting of a material having a narrow bandgap second case of the device is also high electron mobility of the second does not use the semiconductor layer 920, a first semiconductor consisting of a material (Al _{0 .45} GaAs) having a wide band gap layer is 411 and Al _{0 .22,} so's above the conduction band discontinuity between the GaAs layer 412, the smaller the gate current to the device is also high electron mobility according to the invention is caused to flow.

7 is a gate Schottky current graph of a high electron mobility device having a 0.15 micron gate according to the present invention.

Referring to FIG. 7, when the gate schottky turn-on voltage V _{G and ON} is defined as a gate bias through which a gate current of 1 g = 1 mA / mm flows, V _{G and ON} = 1.1 in the structure of FIG. 2. In contrast, in the case of the structure of FIG. 4, it can be seen that the gate Schottky turn-on voltage (V _{G , ON} ) is increased to V _{G and ON} = 1.4 V. That is, in the layer structure of the high electron mobility device of FIG. 4, the gate current decreases and the gate schottky turn-on voltage V _{G and ON} increase, so that more drain current can flow.

Further, in the case of the conventional high electron mobility device, when the gate schottky turn-on voltage (V _{G , ON} ) is increased, the performance of the resistance contact occurs, whereas in the present invention, the second semiconductor layer is made of a material having a narrow band gap. The addition of 920 increases the gate Schottky turn-on voltage (V _{G , ON} ) but does not cause deterioration of the resistance of the resistance contact.

The first semiconductor layer 910, the second semiconductor layer 920, and the third semiconductor layer 930 are not only high electron mobility devices but also a metal semiconductor field effect device having a heterojunction layer structure and a heterojunction schottky diode ( Heterojunction schottky diodes can also be used to increase the gate Schottky turn-on voltage (V _{G , ON} ) without degrading the resistance of the ohmic contact.

Although the present invention has been shown and described with reference to the preferred embodiments as described above, it is not limited to the above embodiments and those skilled in the art without departing from the spirit of the present invention. Various changes and modifications will be possible.

1 is a first embodiment of a GaAs-based high electron mobility device according to the prior art,

Figure 2 is a second embodiment of a high electron mobility device according to the prior art,

3 is a third embodiment of a high electron mobility device according to the prior art,

4 is a layer structure of a high electron mobility device according to the present invention,

5 is a second barrier layer structure according to the present invention,

6 is a conduction band diagram under the gate at V _GS = 1 V,

7 is a gate Schottky current graph of a high electron mobility device having a 0.15 micron gate according to the present invention.

           <Explanation of symbols for the main parts of the drawings>

100, 600: substrate and buffer layer 200, 700: first barrier layer

300, 800: channel layer 400, 410, 420, 900: second barrier layer

500, 1000: cap layer 411, 421, 910: first semiconductor layer

422, 920: second semiconductor layer 930: third semiconductor layer

Claims (8)

In a transistor having a heterojunction layer structure, A substrate and a buffer layer on the substrate; A first barrier layer on the buffer layer; A channel layer on the first barrier layer; A second barrier layer on the channel layer, the second barrier layer having a potential well; And Cap layer located on the second barrier layer Potential well barrier transistor comprising a. The method of claim 1, wherein the second barrier layer, A third semiconductor layer of a band gap, a second semiconductor layer of a band gap existing on the third semiconductor layer, and a first semiconductor layer of a band gap existing on the second semiconductor layer, And a band gap of the second semiconductor layer is narrower than the band gap of the first semiconductor layer and the third semiconductor layer. 3. The method of claim 2, A potential well barrier transistor having a thickness of the second semiconductor layer of 10 to 50 kV. 3. The method of claim 2, And the first semiconductor layer and the third semiconductor layer are Al _X GaAs, and x is 0.2 or more and 1 or less. 3. The method of claim 2, And the first semiconductor layer and the third semiconductor layer are In _{1 - X} Al _X As, and x is 0.2 or more and less than 1.0. 3. The method of claim 2, And the first semiconductor layer and the third semiconductor layer are Al _X GaN, and x is 0.1 or more and 1.0 or less. 3. The method of claim 2, And the second semiconductor layer is In _X GaAs, and x is greater than 0.0 and less than 1.0. 3. The method of claim 2, And the second semiconductor layer is GaN.

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