KR100973815B1 - Driving device of light source for display device and inverter - Google Patents

Abstract

The present invention relates to an inverter device for generating an output voltage varying in n steps, wherein the inverter device performs one turn on / off operation for 2 (n-1) times according to at least one driving signal applied from the outside. A switching unit including a plurality of switching elements, the switching unit generating an output voltage changing in n steps according to the turn-on / off operation of the switching element, and generating a different carrier signal for each step of the output voltage, And a carrier signal generator configured to generate a driving signal applied to each of the switch elements. In the present invention, the switching unit is an n-stage flying capacitor inverter. In this way, a sinusoidal output voltage that varies in multiple stages can be obtained, so that operation control of the load connected to the inverter device is stable.

LCD, LCD, Backlight, Inverter, Carrier Signal, Flying Capacitor Inverter, Multi-Level

Description

Drive device and inverter device of light source for display device {DRIVING DEVICE OF LIGHT SOURCE FOR DISPLAY DEVICE AND INVERTER}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an exploded perspective view of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a circuit diagram of a switching unit according to an embodiment of the present invention.

5 is a pulse width modulation pattern for generating a carrier signal for a four-level output voltage in accordance with an embodiment of the invention.

6A to 6C, 7A to 7C, and 8A to 8C are applied to a plurality of carrier signals and respective switching elements obtained according to an effective voltage in order to obtain a four-level output voltage according to an embodiment of the present invention. It is a waveform indicating a drive signal to be generated.

9 is a pulse width modulation pattern for generating a carrier signal for an n-level output voltage according to an embodiment of the invention.

10 is a waveform showing a carrier signal applied to each switching element according to an effective voltage in order to obtain an n-level output voltage according to an embodiment of the present invention.

11A and 11B are waveform diagrams of an output voltage and an output current according to an embodiment of the present invention.

The present invention relates to a drive device and an inverter device of a light source for a display device.

Display devices used in monitors and TVs of computers include light emitting diodes (LEDs), electroluminescence (EL), vacuum fluorescent displays (VFDs), and electroluminescent devices (fields). emission display (FED), plasma display panel (PDP), and the like, a liquid crystal display (LCD) that does not emit light by itself and requires a light source.

A general liquid crystal display device includes two display panels provided with a field generating electrode and a liquid crystal layer having dielectric anisotropy interposed therebetween. A voltage is applied to the field generating electrode to generate an electric field in the liquid crystal layer, and the voltage is changed to adjust the intensity of the electric field, thereby adjusting the transmittance of light passing through the liquid crystal layer to obtain a desired image.

In this case, the light may be a separate artificial light source or natural light.

A light source for a liquid crystal display, that is, a backlight device, typically uses several fluorescent lamps as a light source and includes an inverter for driving the lamp. The inverter converts the DC power input into AC power according to the brightness control voltage input from the outside and then boosts it to apply it to the lamp to light it, adjust the brightness of the lamp, detect the voltage related to the current flowing through the lamp, and detect the detected voltage. The feedback is controlled based on the voltage applied to the lamp.

At this time, a high voltage of an AC component is applied to both terminals of the lamp, and a driving current of a sine wave flows into the lamp to perform a lighting operation of the lamp. Therefore, in order to generate the driving voltage applied to the lamp, the inverter includes a switching unit for converting the applied DC power to AC power. However, the level of the signal converted through the switching unit is typically divided into two stages based on which the driving current of the lamp is made. Therefore, the driving current applied to the actual lamp is closer to the triangular wave rather than the sine wave of the perfect form, and thus the driving efficiency of the lamp is not precisely reduced, resulting in low operating efficiency. In addition, the backlight driving efficiency of the display device is reduced, which causes unnecessary power consumption and adversely affects image quality.

Therefore, the technical problem to be achieved by the present invention is to finely control the operation of the lamp to improve the operation efficiency of the lamp.

Another object of the present invention is to improve the image quality of a display device.

Inverter device for achieving the technical problem is an inverter device for generating an output voltage that is changed in n steps, a turn-on / off operation for 2 (n-1) Ts time in accordance with at least one drive signal applied from the outside A switching unit for generating an output voltage that is changed in n steps according to a turn-on / off operation of the switching element, and generating a different carrier signal for each step of the output voltage, the carrier signal And a carrier signal generator for generating a drive signal applied to each of the switch elements, wherein the switch is an n-stage flying capacitor inverter.

 In the present invention, the switching unit may be a four-stage flying capacitor inverter. In this case, the four-stage flying capacitor inverter is a plurality of switching element pairs connected in series, a plurality of diodes respectively connected between the input terminal and the output terminal of each switching element, are connected in series across the first pair of switching elements It is preferable to include a plurality of first capacitors, a plurality of second capacitors connected in series across the second switching element pair, and a third capacitor connected across the third switching element pair.

The carrier signal may vary depending on the output level of the effective voltage and the turn on / off state and the switch state of the switching element.

In the present invention, the carrier signal for each switching element can be shifted by 2Ts time.

In order to achieve the above technical problem, a driving device of a light source for a display device is a driving device of a light source for a display device including at least one light source, and includes an inverter unit for outputting a driving voltage changing in n steps to the light source. The inverter unit may include a plurality of switching elements configured to perform one turn on / off operation for 2 (n-1) times according to at least one driving signal applied from the outside, and turn on / off operation of the switching elements. A switching unit for generating an output voltage that varies in n steps according to the step, and a carrier signal generation for generating a different carrier signal for each step of the output voltage, and for generating a driving signal applied to each switch element based on the carrier signal. Section, wherein the switching section is an n-stage flying capacitor inverter.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A driving device and an inverter device of a light source for a display device according to an embodiment of the present invention will now be described in detail with reference to the drawings.

1 is a block diagram of a liquid crystal display according to an embodiment of the present invention, FIG. 2 is an exploded perspective view of a liquid crystal display according to an embodiment of the present invention, and FIG. 3 is a liquid crystal according to an embodiment of the present invention. It is an equivalent circuit diagram of one pixel of a display device.                     

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 connected to the 500, the lamp unit 940 for irradiating light to the liquid crystal panel assembly 300, the inverter unit 920 connected thereto, and a signal controller 600 for controlling them. It includes.

Meanwhile, as shown in FIG. 2, when the LCD according to the exemplary embodiment of the present invention is structurally shown, the liquid crystal module 350 and the liquid crystal module 350 including the display unit 330 and the backlight unit 340 are shown. Front and rear cases 361 and 362, a chassis 363, and a mold frame 364 to receive and fix the same.

The display unit 330 includes a liquid crystal panel assembly 300, a gate flexible printed circuit (FPC) substrate 410 and a data FPC substrate 510 attached thereto, and a gate PCB attached to the corresponding FPC substrates 410 and 510. printed circuit board 450 and data PCB 550.

The liquid crystal panel assembly 300 includes a lower panel 100 and an upper panel 200 and a liquid crystal layer 3 interposed therebetween, as shown in FIGS. 2 and 3. And a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , as shown in FIG. 3, arranged in a substantially matrix form. do.

The display signal lines G ₁ -G _n and D ₁ -D _m are provided on the lower panel 100 and transmit a plurality of gate lines G ₁ -G _n to transfer a gate signal (also called a “scan signal”). And a data signal line or data line D ₁ -D _m for transmitting a data signal. The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 3, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage V _com is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, to implement color display, each pixel uniquely displays one of the three primary colors (spatial division) or each pixel alternately displays the three primary colors over time (time division) so that the desired color can be obtained by spatial and temporal sum of these three primary colors. To be recognized. 3 illustrates that each pixel includes a red, green, or blue color filter 230 in an area of the upper panel 200 corresponding to the pixel electrode 190. Unlike FIG. 3, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

In FIG. 2, the backlight unit 340 is positioned between the plurality of lamps 341 and the assembly 300 and the lamp 341 which are mounted under the liquid crystal panel assembly 300, and assembles light from the lamps 341. A light guide plate 342 and a plurality of optical sheets 343, which guide and diffuse to 300, and a reflector plate 344 positioned below the lamp 341 and reflecting light from the lamp 341 toward the assembly 300. It includes.

In this embodiment, a fluorescent lamp such as a cold cathode fluorescent lamp (CCFL) and an external electrode fluorescent lamp (EEFL) is used as the lamp 341. However, light emitting diodes (LEDs) and the like can also be used as lamps.

Although only four lamps are shown in FIG. 2, the present invention is not limited to this number, and the number of lamps may be added or subtracted as necessary.

Referring back to FIG. 1, the inverter unit 920 may include a carrier signal generator 921, a switching unit 922 connected to the carrier signal generator 921, and a switch unit 922 and the lamp unit 940. Connected transformer 923.

The inverter unit 920 may be provided in a separately mounted inverter PCB (not shown) or may be provided in the gate PCB 450 or the data PCB 550.

Polarizers (not shown) for polarizing light emitted from the lamp 341 are attached to outer surfaces of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

1 and 2, the gray voltage generator 800 is provided in the data PCB 550 and generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is mounted on each gate FPC substrate 410 in the form of an integrated circuit (IC) chip, and is connected to the gate line G ₁ -G _n of the liquid crystal panel assembly 300 to externally. The gate signal consisting of a combination of the gate on voltage V _on and the gate off voltage V _off from the gate line G ₁ -G _n is applied.

The data driver 500 is mounted on each data FPC substrate 510 in the form of an IC chip, and is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 so that the data driver 500 may be separated from the gray voltage generator 800. The data voltage selected from among the gray scale voltages is applied to the data lines D ₁ -D _m .

According to another exemplary embodiment of the present invention, the gate driver 400 and / or the data driver 500 are mounted on the lower panel 100 in the form of an IC chip, and according to another exemplary embodiment, other elements on the lower panel 100 are provided. Are integrated with them. In both cases, the gate PCB 450 and / or the gate FPC substrate 410 may be omitted.

The signal controller 600 for controlling operations of the gate driver 400 and the data driver 500 is provided in the data PCB 550 or the gate PCB 450.

The display operation of such a liquid crystal display device will now be described in detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to

The gate control signal (CONT1) is the gate-on start vertical sync indicating the start of output of a voltage (V _on) signal (STV), a gate-on voltage gated clock signal that controls the output timing of the (V _on) (CPV) and the gate An output enable signal OE or the like that defines the duration of the on voltage V _on .

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of a horizontal period, a load signal LOAD for applying a corresponding data voltage to the data lines D ₁ -D _m , and a common voltage V _com . And the inversion signal RVS and the data clock signal HCLK for inverting the polarity of the data voltage with respect to (hereinafter, referred to as "polarity of the data voltage" by reducing "polarity of the data voltage with respect to the common voltage").

The data driver 500 sequentially receives and shifts the image data DAT corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and the gray scale from the gray voltage generator 800. By selecting a gray scale voltage corresponding to each image data DAT among the voltages, the image data DAT is converted into a corresponding data voltage and applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. When the switching element Q connected to the () is turned on, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage.

The inverter unit 920 converts and transforms a DC voltage applied from the outside into an AC voltage and applies the voltage to the lamp unit 940. The lamp unit 940 flashes according to the voltage, and the brightness of the lamp unit 940 is controlled. do. In an embodiment of the present invention, the inverter unit 920 converts the applied DC voltage into a multi-level AC voltage and applies it to the lamp unit 940. The operation of the inverter unit 920 will be described in detail below.

According to the operation of the inverter unit 920, the light emitted from the lamp unit 940 passes through the liquid crystal layer 3, and its polarization changes according to the arrangement of the liquid crystal molecules. This change in polarization is represented by a change in the transmittance of light by the polarizer.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) or the polarity of the data voltage applied to one pixel row may be different depending on the characteristics of the inversion signal RVS within one frame. ("Dot reversal").

Then, the operation of the inverter unit 920 according to an embodiment of the present invention will be described in detail with reference to FIGS. 4 to 8.

5 illustrates a pulse width modulation pattern for generating a carrier signal for a four-level output voltage according to an embodiment of the present invention, and FIGS. 6A-6C, 7A-7C and 8A-8C illustrate the present invention. According to the embodiment of the present invention, in order to obtain a four-level output voltage, the carrier signals CS11, CS12, and CS13 obtained according to the effective voltages, and the driving signals Ga1, Ga2, and Ga3 applied to the switching elements Q1, Q2, and Q3. ) Is a waveform.

As shown in FIG. 4, the switching unit 922 includes a flying capacitor inverter, and the flying capacitor inverter shown in FIG. 4 is a flying capacitor inverter having a four-level output voltage. As shown in FIG. 4, the switching unit 922 for realizing a four-level output voltage includes a switching element Q1, Q1 ', Q2, Q2', Q3, and Q3 'connected in series. And diodes D1, D1 ', D2, D2', D3, and D3 'respectively connected between an input terminal and an output terminal of Q1, Q1', Q2, Q2 ', Q3, and Q3'. In addition, capacitors C11, C12, and C13 are connected in series across the switching elements Q1 and Q1 ', and capacitors C21 and C22 are connected in series between the switching elements Q2 and Q2'. Capacitors C31 are connected across the elements Q3 and Q3 '. Drive signals Sa1, Sa1 ', Sa2, Sa2', Sa3, Sa3 'are respectively applied to the input terminals of the switching elements Q1, Q1', Q2, Q2 ', Q3, and Q3'.

The output voltage of each level and the turn on / off states of the switching elements Q1, Q1 ', Q2, Q2', Q3, and Q3 'in the four-level flying capacitor inverter having the above configuration are as follows.

1) When the output voltage (Van) is Vdc,

   Q1, Q2, Q3 turn on and other switching elements turn off

2) When the output voltage is (2Vdc) / 3

  (a) Q2, Q3, Q1 'turn on, and other switching elements turn off

  (b) Turns Q1, Q3, and Q2 'on and other switching elements off.

  (c) Q1, Q2, Q3 'turn on, and other switching elements turn off

(3) when the output voltage is Vdc / 3,

  (a) Q2, Q1 'and Q3' turn on, and other switching elements turn off

  (b) Turns Q3, Q1 'and Q2' on and other switching elements turn off.

  (c) Turns Q1, Q2 'and Q3' on and other switching elements turn off.

(4) when the output voltage is 0,

   Q1 ', Q2', and Q3 'turn on, and other switching elements turn off

The above results are shown in Table 1 below.

Output voltage (Van) Switch status  Switch sequence Sa1 Sa2 Sa3 Vdc 3 One One One (2Vdc) / 3 2 in ₁ 0 One One 2 ₂ One 0 One 2 ₃ One One 0 Vdc / 3 1 ₁ 0 One 0 1 ₂ 0 0 One 1 ₃ One 0 0 0 0 0 0 0

In Table 1, the relationship between a pair of signals (Sa1 and Sa1 ', Sa2 and Sa2', Sa3 and Sa3 ') input to each switch Q1, Q1', Q2, Q2 ', Q3, and Q3' is mutually different. It is a reversed relationship. That is, when the signal state of Sa1 is high level, since the signal state of Sa1 'is low level, Q1 is turned on and Q1' is turned off.

As can be seen from [Table 1], each switching element (Q1, Q1 ', Q2, Q2', Q3, according to the size of each output output voltage [Vdc, (2Vdc) / 3, Vdc / 3, 0] The turn on / off state of Q3 ') changes. Also can be obtained through the one, from the switching state of the 8 ^{(= 2 3), (2Vdc} ) / the output voltage of the three are both switch sequence of three if the state as shown in [Table 1], Vdc / 3 In one case, it can be obtained through the switch sequence state of three cases. However, in the case of Vdc and 0, each can be obtained through only one switch sequence. Therefore, when the output voltage is (2Vdc) / 3 and Vdc / 3, the switching redundancy is "2", so the switching margin of other output voltages (Vdc and 0) with the switching margin "0". Higher than

Expanding to n-level based on [Table 1], the n-level flying capacitor inverter includes (n-1) switching groups, and the switching states obtained here are all 2 ^(n-1) states. Able to know. In addition, in the 2 ^(n-1) switching states, the magnitude of the output voltage is divided according to the number of " 1 " That is, the n output voltages are divided into the case where the number of "1" s is (n-1), the number of "1" s is (n-2), and the number of "1" s is 0.

Next, when the n-level flying capacitor inverter is configured and the turn-on / off state of the switching elements of each switching group is adjusted to generate an n-level AC voltage, a carrier signal is generated to generate driving signals for each switching element. The operation of the unit 921 will be described with reference to the drawings.

First, a method of generating a carrier signal in the case of a four-level flying capacitor inverter will be described with reference to FIGS. 5 to 8.

The new carrier signal generation method according to the present invention must satisfy the following two conditions.

The first condition is that at the n-level, all switching devices must turn on and off once during 2 (n-1) Ts. Another condition is that the switching state must be placed with all available switching margins that satisfy the first condition. Therefore, the pulse width modulation pattern shown in FIG. 5 is for obtaining a four-level output voltage, and the three switching elements Q1, Q2, and Q3 are turned on once during 6Ts [= 2 (n-1) Ts]. Since there is a need for turn-off and turn-off operation, all six switching operations occur, and on average, one switching operation occurs during the Ts time. In addition, since all switching states must be listed for a predetermined period of 6Ts, as shown in FIG. 5, each switch state that can be shown based on [Table 1] is sequentially written. In Fig. 5, 51 is a triangular wave signal having a 2Ts period, which is a typical carrier signal, and Vxs is an effective voltage.

In this manner, a pulse width modulation pattern for generating a new carrier signal is formed based on the basic triangle wave signal 51, the effective voltage Vxs, and each switching state.

Next, by using the state of the effective voltage 52 and the switching state of each switching element Q1, Q2, Q3 shown in [Table 1], the driving signal applied to each switching element Q1, Q2, Q3 is The generation process will be described.

First, when the effective voltage Vxs is Vdc <Vxs <(2Vdc) / 3, the switching state is 3-2 ₁ -3-2 ₂ -3-2 ₃ -3, as shown in FIG. The state of the drive signal Sa1 applied to the switching element Q1 in the switching state is 1-0-1-1-1-1. Accordingly, since the operating state of the switching element Q1 is changed to 3-2 ₁ and 2 _{1 to} 3, a carrier signal CS11 as shown in Fig. 6A is generated and based on this carrier signal CS11. Thus, the drive signal Sa1 of the pulse width modulated switching element Q1 is obtained.

Next, when the effective voltage Vxs is (2Vdc) / 3 <Vxs <Vdc / 3, the switching state is 2 ₃ -1 ₁ -2 ₁ -1 ₂ -2 ₂ -1 ₃ as shown in FIG. 5. -2 _3, wherein the drive signal (Sa1) state is applied to a switching element (Q1) is 1-0-0-0-1-1-1. Therefore, the switching element (Q1) is _23-11 and _12-2 when the carrier signal (CS12), such as that shown in Figure 6b, so that the operation state change After ₂ days, is obtained, based on the carrier signal (CS12) The pulse width modulated signal Sa1 is obtained and applied to the gate terminal of the switching element Q1.

In addition, when the effective voltage Vxs is Vdc / 3 <Vxs <0, the switching state is 1 ₃ -0-1 ₁ -0-1 ₂ -0-1 ₃ , where the drive signal for the switching element Q1 ( The state of Sa1) changes to 1-0-0-0-0-0-1. Therefore, the state of the switching element Q1 changes when it is 1 ₃ -0 and 0-1 ₃ , so that the carrier signal CS13 and the pulse width modulated signal Sa1 as shown in FIG. 6C are obtained.

In this way, the carrier signal for obtaining the drive signal Sa1 of the switching element Q1 is determined according to the magnitude of the effective voltage Vxs. The drive signals Sa2 and Sa3 applied to the other switching elements Q2 and Q3 also calculate the corresponding carrier signals by using the above-described method, and then use the pulse width modulated signal as the drive signal as the drive signal Q2. , Q3). In this case, as shown in FIGS. 7A to 7C and 8A to 8C, the carrier signals for the switching elements Q2 and Q3 are shifted by 2Ts and 4Ts, respectively, based on the carrier signals for the switch element Q1. It can be seen that the waveform.

Next, referring to FIGS. 9 and 10, in the case of an n-level flying capacitor inverter extended to obtain an n-level output voltage, a pulse width modulation pattern for generating a carrier signal and a carrier signal generated at that time are described. Look at.

9 shows a pulse width modulation pattern for generating a carrier signal for obtaining an n-level output voltage in accordance with an embodiment of the invention, and FIG. 10 shows an n-level output voltage in accordance with an embodiment of the invention. In order to achieve this, the waveforms represent carrier signals applied to the switching elements according to the effective voltage.

9 represents the time of 2 (n-1) Ts, and the vertical axis represents the n-level output voltage, for example, an output voltage having a value from 0 to Vdc.

As shown in Fig. 9, a triangle wave signal having a period of 2Ts is arranged for each level of the output voltage, and all switchable states that can be expressed are described sequentially from 0 to (n-1). Then, a corresponding carrier signal is made based on the magnitude of each effective voltage according to the method already described with reference to FIGS. 5 to 8, and a drive signal applied to each switching element is made based on this carrier signal. Fig. 10 shows a carrier signal for switching element Q1 in a flying capacitor inverter extended to n-level. The carrier signals for the other switching elements Q2, ..., Q (n-1) are waveforms shifted by 2Ts, 4Ts, ... (n-1) Ts, respectively, in the carrier signal shown in FIG.

In this manner, in the carrier signal generation unit 921 of the inverter unit 920, a new carrier signal is generated based on the triangular wave signal, the switching state, and the value of the switch sequence, and each of the flying capacitor inverters is generated based on the carrier signal. Since the driving signal applied to the switching element is generated, the voltage output from the inverter unit 920 becomes an AC voltage whose output level changes in multiple stages.

When generating a carrier signal in this manner to drive the flying capacitor inverter, the output voltage output to the inverter unit 920 and the current waveform applied to the load terminal will be described.                     

11A and 11B are waveform diagrams of an output voltage and an output current according to an embodiment of the present invention.

As shown in Fig. 11A, voltages that sequentially change the output voltage in four steps in the (+) direction and the (-) direction are output. The waveform of the drive current applied to the lamp unit 940 based on this output voltage becomes a sine wave of a stable form as shown in FIG. 11B. Although an embodiment of the present invention has been described with respect to a flying capacitor inverter, it is obvious that the present invention can be applied to any inverter capable of generating a multi-step output voltage.

According to the exemplary embodiment of the present invention, the voltage output from the inverter unit is a waveform of a waveform in which the voltage is changed in multiple stages. Therefore, a high voltage rating can be realized by synthesizing a large number of DC voltage sources, and the voltage distribution problem that can occur when the devices are connected in series at each turn of the devices can be solved without additional circuits. Moreover, as the voltage level increases, the distortion of the output voltage at the same switching frequency decreases, resulting in the rate of voltage change (dv / dt) and surge voltage occurring during the switching transient, resulting in electro-magnetic interference (EMI). Decreases. In addition, when driving the lamp unit of the liquid crystal display using the output voltage of the sinusoidal output waveform, the driving current applied to the lamp unit also has a signal waveform close to the sine wave. Therefore, the driving operation of the lamp unit is stable and the operation efficiency of the lamp unit is improved because the influence by the noise component is eliminated. Furthermore, since the operation of the lamp unit is stably applied, the image quality of the liquid crystal display device is also improved.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (6)

An inverter device for generating an output voltage that varies in n steps, A switching unit including a plurality of switching elements, the switching unit generating an output voltage varying in the n step according to a turn on / off operation of each of the plurality of switching elements, and A carrier signal generation unit generates a carrier signal for each step of the output voltage, and generates a driving signal applied to each of the plurality of switching elements based on the carrier signal. Including, The carrier signal is generated based on a triangular wave signal having a period of 2Ts, According to the driving signal, each of the plurality of switching elements is once turned on / off for 2 (n-1) Ts times, The switching unit is an n-stage flying capacitor inverter Inverter device. In claim 1, And said switching unit is a four-stage flying capacitor inverter. In claim 2, The four-stage flying capacitor inverter, 6 switching elements in series (Q1, Q2, Q3, Q1 ', Q2', Q3 '), A plurality of diodes D1, D2, D3, D1 ', D2', and D3 'respectively connected between the input terminal and the output terminal of the six switching elements Q1, Q2, Q3, Q1', Q2 ', and Q3'. , The six switching elements Q1, Q2, Q3, Q1 ', Q2', and Q3 'include a first switching element pair Q1 and Q1', a second switching element pair Q2 and Q2 ', and a third switching element. Including the pairs Q3, Q3 ', A plurality of first capacitors C11, C12, and C13 connected in series across the first pair of switching elements Q1 and Q1 '; A plurality of second capacitors C21 and C22 connected in series across the second pair of switching elements Q2 and Q2 ', and Inverter device including a third capacitor (C31) connected across the third switching element pair (Q3, Q3 '). In claim 1, And the carrier signal changes according to the triangular wave signal, an output level of an effective voltage, and a turn on / off state of each of the plurality of switching elements. In claim 4, And the carrier signal is shifted by a different specific time for each of the plurality of switching elements, and the specific time is an integer multiple of 2Ts. A driving device of a light source for display device including at least one light source, an inverter unit for outputting a driving voltage changing in n steps and applying the light to the light source, The inverter unit includes a plurality of switching elements, the switching unit for generating an output voltage that is changed in n steps according to the turn on / off operation of each of the plurality of switching elements, and generates a carrier signal for each step of the output voltage A carrier signal generator configured to generate a driving signal applied to each of the plurality of switching elements based on the carrier signal, The carrier signal is generated based on a triangular wave signal having a period of 2Ts, According to the driving signal, each of the plurality of switching elements is once turned on / off for 2 (n-1) Ts times, The switching unit is an n-stage flying capacitor inverter A drive device of a light source for a display device.

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