KR100972121B1 - The circuit for inputing and outputing discrete signal - Google Patents

Abstract

PURPOSE: An IO(Input Output) circuit of the discrete signal is provided to reduce the additional manufacturing cost for inspection and simulation function while enhancing convenience of a user through inspection. CONSTITUTION: A second transistor(130) amplifies the command signal from the outside, and outputs to a fifth port(1-5) of a relay(110). An optocoupler(140) amplifies a signal from a sixth port(1-6) of the relay. A first transistor(120) applies the loop-back signal in the coil of the relay.

Description

Discrete signal input / output circuit {THE CIRCUIT FOR INPUTING AND OUTPUTING DISCRETE SIGNAL}

The present invention relates to an input / output circuit, and more particularly, to a circuit for inputting and outputting discrete signals.

Discrete signals are signals obtained by sampling a continuous signal. Therefore, while the continuous signal is a continuous function, the discrete signal can be referred to as a sequence.

In general, I / O boards that have discrete signal and communication functions are often separated from their functions. For example, there is a function to apply discrete signals to the outside, but since there is no self-checking function of the board, a test board that can be checked in hardware must be implemented separately.

Similarly, the conventional discrete signal input / output board often implements only necessary functions for interface with the outside, which causes inconvenience in that a separate board must be manufactured separately when manufacturing a simulator or the like.

The present invention provides a discrete signal input and output circuit that can control both the input and output of the discrete signal in order to solve the above problems, as well as self-checking.

According to the present invention for achieving the above object, the input and output circuit of a discrete signal, the relay unit for performing a switch to receive a signal from the outside or to output a signal to the outside; A loopback signal generator including a transistor and generating a loopback signal to generate a loop in the relay unit and outputting the loopback signal to the switching unit; A first signal processing unit including at least one of a transistor and a relay, the first signal processing unit outputting a signal to the relay unit by operating at least one of the transistor and the relay; And a second signal processor including at least one of an optocoupler and a relay, and outputting a signal applied from the relay unit by operating at least one of the optocoupler and the relay.

The relay unit is a two-pole relay, and the coil in the relay unit is connected to a transistor in the loopback signal generation unit, and the first common port in the relay unit is connected to a transistor in the first signal processing unit. The second common port that is connected and in the relay unit is preferably connected to an optocoupler in the second signal processing unit.

In addition, the input / output circuit preferably inputs and outputs a ground signal or checks the ground signal itself.

The relay unit is a two-pole relay, and a coil in the relay unit is connected to a transistor in the loopback signal generator, and the first signal processing unit is connected to a common port of the one-pole relay and the one-pole relay. And a first common port in the relay unit is connected to an off port of the one-pole relay, and a second common port of the relay unit is connected to the optocoupler.

In addition, it is preferable that the input / output circuit inputs / outputs a power signal or checks the power signal itself.

The relay unit is a four-pole relay, and a coil in the relay unit is connected to a transistor in the loopback signal generation unit, and the first signal processing unit is common to the first pole relay and the first pole relay. And a transistor connected to the port, wherein the first common port of the relay unit is connected to an off port of the first pole relay, and the second common port of the relay unit is connected to a common port of the first pole relay. And the second signal processing section includes an optocoupler connected to one end of the coil in the second first pole relay and a common port, and the third common port of the relay section is connected to the coil in the second first pole relay. It is preferably connected to the other end and the fourth common port of the relay unit is connected to the off port of the second first pole relay.

The input / output circuit preferably inputs or outputs a short signal or checks the short signal itself.

According to the present invention, not only can control both the input and output for the discrete signal, but also the self-inspection can reduce the additional manufacturing cost for the inspection and simulation function and can increase the user's convenience through the regular check.

Hereinafter, with reference to the drawings will be described the present invention in more detail.

1 is a diagram illustrating a first input / output circuit of a GND / OPEN signal (ground signal) capable of self-check and simulation according to an embodiment of the present invention. Here, the OPEN / GND signal refers to a signal for activating the ground state in the open state.

As shown in FIG. 1, the first input / output circuit includes a first relay 110, a first transistor 120, a second transistor 130, an optocoupler 140, a first buffer 150, and a second buffer ( 160, a third buffer 170, and a controller 180.

The first relay 110 corresponds to an electronic switch that is turned on or off, and is preferably a two-pole relay. Specifically, the first relay 110 is a first port (1-1) and a second port (1-2) which is a closed port (hereinafter referred to as an on-port) in a state in which the first relay 110 does not operate. ), The third port (1-3) and the fourth port (1-4), which are open ports (hereinafter, referred to as "off ports") when the first relay 110 is not in operation, and the fifth port, which is two common ports. Ports 1-5 and sixth port 1-6.

Thus, in the state where the first relay 110 is not operated, each of the first port 1-1 and the second port 1-2 is the fifth port 1-5 and the sixth port 1-6. Is connected to the first relay 110, the third port 1-3 and the fourth port 1-4 are respectively the fifth port 1-5 and the sixth port 1-6. )

The optocoupler 140 isolates an input signal from an external signal, blocks noise, and includes a light emitting device and a photosensitive device optically connected to the light emitting device. In particular, it is preferable that the light emitting element is a photodiode and the photosensitive element is a darlington transistor array.

Specifically, the anode of the photodiode is connected to the power supply (Vdc) through the pull-up resistor, the cathode is connected to the first relay (110). The output of the Darlington array transistor is connected to the relay 110 and Vdc through a pull-up resistor to drive the relay 110.

The first buffer 150 outputs to the first transistor 120 that the loopback control signal received from the controller 180 is temporarily stored, and the second buffer 160 outputs a signal received from the controller 180 or externally. The signal is temporarily stored and output to the second transistor 130, and the third buffer 170 performs a function of temporarily storing the signal input from the optocoupler 140.

The first transistor 120 and the second transistor 130 are preferably Darlington array transistors, and amplify and output the input signal.

The following describes the circuit operation according to the input and output of the ground signal.

First, when the ground signal is input to the second port 1-2 of the first relay 110, the Vdc power is introduced into the optocoupler 140 through the pull-up resistor. Then, current flows through the light emitting device of the optocoupler 140 to operate the optocoupler 140, and the signal amplified by the operation of the optocoupler 140 is temporarily stored in the third buffer 170. Passed to external circuit.

On the other hand, when a command for a ground output signal from an external circuit is applied to the input / output circuit, the controller 180 enables the corresponding bit of the second buffer 160. Then, the activated signal is output from the second buffer 160 to be applied to the second transistor 130, and the second transistor 130 amplifies the input signal to form the fifth port (1-1) of the first relay 110. 5) is applied to output the ground signal.

As described above, since both input and output of the ground signal can be performed by one circuit, it is not necessary to provide a separate circuit when implementing the simulator.

In addition, even during self-check, the controller 180 generates a loopback control signal to activate a corresponding bit of the first buffer 150. Then, the activated signal is output from the first buffer 150 to be applied to the first transistor 120, and the first transistor 120 amplifies the signal so that the first relay 110 operates. When the first relay 110 operates, each of the third port 1-3 and the fourth port 1-4 is connected to the fifth port 1-5 and the sixth port 1-6, and the first port 110 is connected to the fifth port 1-5. 1 Relay 110 is formed to be a loop. Then, a command for the ground output signal is applied to the input / output circuit, and self-checking is enabled by reading the value from the sixth port 1-6, which is the ground input port.

2 is a diagram illustrating an input / output circuit of a PWR / OPEN signal (power signal) capable of self-check and simulation according to an embodiment of the present invention. Here, the PWR / OPEN signal means a signal for activating a power-on state in an open state.

As illustrated in FIG. 2, the second input / output circuit includes a first relay 210, a first transistor 220, a second transistor 230, a second relay 240, an optocoupler 250, and a first buffer ( 260, a second buffer 270, a third buffer 280, and a controller 290.

The first relay 210, the first transistor 220, the second transistor 230, the optocoupler 250, the first buffer 260, the second buffer 270, and the third buffer 280 of FIG. 2. The controller 290 may include the first relay 110, the first transistor 120, the second transistor 130, the optocoupler 140, the first buffer 150, the second buffer 160, and the like. The same function as the third buffer 170 and the controller 180 is performed, and the configuration is different.

The fifth port 2-5 of the first relay 210 is connected to the second relay 240, and the sixth port 2-6 is connected to the optocoupler 250. The anode of the photodiode in the optocoupler 250 is connected to the sixth port 2-6 of the first relay 210 and the cathode is grounded.

In addition, it is preferable that the second relay 240 is a single pole relay. In the state in which the second relay 240 is not in operation, the on ports 2-7 are connected to the common port 2-9. When the two relays 240 operate, the off ports 2-8 are connected to the common ports 2-9.

The following describes the circuit operation according to the input and output of the power signal.

First, when a power signal is input to the second port of the first relay 210, the power signal is introduced into the optocoupler 250. Then, current flows through the light emitting device of the optocoupler 250 to operate the optocoupler 250, and the signal amplified by the operation of the optocoupler 250 is temporarily stored in the first buffer 260. Is passed to the external circuit.

On the other hand, when a command for a power output signal from an external circuit is applied to the input / output circuit, the controller 290 enables the corresponding bit of the second buffer 270. Then, the activated signal is output from the second buffer 270 to be applied to the second transistor 230, and the second transistor 230 amplifies the signal so that the second relay 240 operates. Since the second relay 240 is connected to the Vdc, when the second relay 240 operates, the Vdc outputs to the outside through the second relay 240 and the second transistor 230.

As such, since both power inputs and outputs are possible with one circuit, it is not necessary to provide a separate circuit when implementing a simulator.

In addition, during the self-check, the controller 290 generates a loopback control signal to activate the corresponding bit of the first buffer 260. Then, the activated signal is output from the first buffer 260 to be applied to the first transistor 220, and the first transistor 220 amplifies the signal so that the first relay 210 operates. When the first relay 210 operates, each of the third and second ports 2-3 and 2-4 is connected to the fifth and second ports 2-5 and 6-6, respectively. 1 Relay 210 is formed to be a loop.

On the other hand, when the controller 290 applies the command for the power output signal to the input / output circuit through the second buffer 270, the second relay 240 applies the power signal to the first relay 210, Since a loop is formed in the first relay 210, the power signal is formed in the first relay 210 to be applied to the optocoupler 250 and output to the outside through the second buffer 270. Thus, self-check is possible by applying a power output command and reading the power signal from the power input port.

3 is a diagram illustrating a third input / output circuit of a SHORT / OPEN signal (short signal) capable of self-check and simulation according to an embodiment of the present invention. Here, the SHORT / OPEN signal means a signal for activating the short state in the open state.

As shown in FIG. 3, the third input / output circuit includes a third relay 310, a second relay 340, a fourth relay 350, a first transistor 320, a second transistor 330, and an optocoupler ( 360, a first buffer 370, a second buffer 35, a third buffer 380, and a controller 390.

Unlike the first relay 110 of FIG. 1, the third relay 310 of FIG. 3 may be a four-pole relay. That is, the third relay 310 includes four on ports: first to fourth ports 3-1, 3-2, 3-3, and 3-4, and four off ports, fifth to eighth ports. Ports 3-5, 3-6, 3-7, 3-8 and four common ports, ninth through twelfth ports (3-9, 3-10, 3-11, 3-12) do.

Thus, each of the first to fourth ports 3-1, 3-2, 3-3, and 3-4 is connected to the fifth to eighth ports 3-3 while the third relay 310 is not operated. 5, 3-6, 3-7, 3-8, and when the third relay 310 operates, the ninth to twelfth ports 3-9, 3-10, 3-11, 3 -12) each is connected to a fifth to eighth port (3-5, 3-6, 3-7, 3-8).

In addition, the ninth port 3-9 and the tenth port 3-10 of the third relay 310 are connected to the second relay 340, and the eleventh port 3 of the first relay 310 is connected. -11) and the twelfth ports 3-12 are connected to the fourth relay 350.

One end of the coil in the second relay 340 is connected to the Vdc and the other end is connected to the second transistor 330, and the off ports 3-14 of the second relay 340 are connected to the third relay 310. The ninth port 3-9 is connected to the common port 3-15 of the third relay 310 is connected to the tenth port (3-10).

In the fourth relay 350, one end of the coil is connected to the ninth port 3-9 of the first relay 310 and the other end is connected to an anode of a diode in the power supply and the optocoupler 360. have. The off ports 3-17 of the fourth relay 350 are connected to the third relay 310 and the ground terminal, and the common ports 3-18 are connected to the optocoupler 360.

The following describes the circuit operation according to the input and output of the short signal.

When a short signal is input from the outside while one pole of the third relay 310 is grounded, the fourth relay 350 operates. Then, the off port 3-17 and the common port 3-18 of the fourth relay 350 are connected to operate the optocoupler 360, and the short signal is generated by the operation of the opto coupler 360. It is transmitted to the control unit 390 through 380.

On the contrary, when the short output signal command is applied from the controller 390, the second transistor 330 and the second relay 240 operate to output the SHORT signal. In other words, short circuit input / output is possible in one circuit.

Meanwhile, when the controller 390 generates the loopback control signal to operate the first transistor 320 to perform self-check, the first transistor 320 operates the third relay 310. Thus, since the fifth port 3-5 and the seventh port 3-6 are connected to the ninth port 3-9 and the eleventh port 3-11, the fifth port 3-5 is connected. ) And the seventh port (3-7) are connected to form a short output loop. The sixth port 3-6 and the eighth port 3-8 are connected to the tenth port 3-10 and the twelfth port 3-12, respectively, so that the sixth port 3-6 and the eighth port are connected. Since ports 3-8 are connected, a short input loop is formed.

As a result, each of the off ports of the third relay 310 is connected to the corresponding common port to form a loop. When the short output command is applied to the first transistor 320 in this state, the short output signal is output to the short input port, thereby enabling self-check.

This input / output circuit is useful because you do not need to create a separate board for simulation and self-check.

1 to 3, but the first buffer to the third buffer, but the first buffer to the third buffer temporarily stores the signal and outputs the function, so it does not need to exist separately, even if a single buffer It's okay.

Based on Figures 1 to 3, one input and output for simulation and self-check can be implemented as the block diagram as follows.

4 is a block diagram of an input / output circuit according to an embodiment of the present invention.

As shown in FIG. 4, the input / output circuit includes a relay unit 410, a loopback signal generator 420, a first signal processor 430, a second signal processor 440, and a controller 450.

The relay unit 410 performs a function of switching to receive a signal from the outside or to output a signal to the outside, and the first relay of FIGS. 1 and 2 and the third relay of FIG. 3 correspond to this.

The loopback signal generator 420 generates a loopback signal corresponding to the control signal of the controller 450 and outputs the loopback signal to the switching unit so that the switching unit forms a loop. The first transistor of FIGS. 1 to 3 corresponds to this.

The first signal processor 430 includes at least one of a transistor and a relay, and when receiving an output control signal from the controller 450 or the outside, operates the at least one of the transistor and the relay to output a specific signal to the switching unit. . In FIG. 1, the first transistor and the second buffer, and in FIGS. 2 and 3, the first transistor, the second relay, and the second buffer correspond to the first signal processor 430.

The second signal processor 440 includes at least one of an optocoupler, a buffer, and a relay, and performs a function of operating at least one of the optocoupler, the buffer, and the relay to the outside. The optocoupler and the third buffer in FIGS. 1 and 2, and the fourth relay, the optocoupler and the third buffer in FIG. 3 correspond to the second signal processor 440.

In addition, although the preferred embodiment of the present invention has been shown and described above, the present invention is not limited to the specific embodiments described above, but the technical field to which the invention belongs without departing from the spirit of the invention claimed in the claims. Of course, various modifications can be made by those skilled in the art, and these modifications should not be individually understood from the technical spirit or the prospect of the present invention.

1 is a diagram illustrating a first input / output circuit of a GND / OPEN signal capable of self-check and simulation according to an embodiment of the present invention;

2 illustrates an input / output circuit of a PWR / OPEN signal capable of self-check and simulation according to an embodiment of the present invention;

3 illustrates a third input / output circuit of a SHORT / OPEN signal capable of self-check and simulation according to an embodiment of the present invention.

4 is a block diagram of an input / output circuit according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

410: relay unit 420: loopback signal generation unit

430: first signal processor 440: second signal processor

450: control unit

Claims (7)

First and second ports (1-1, 1-2), third and fourth ports (1-3, 1-4), fifth and sixth ports (1-5, 1-6) and coils Relay 110 comprising: wherein the first and second ports (1-1, 1-2) are ports for signal output and signal input, respectively, and the fifth and sixth ports (1-5, 1). -6) are respectively connected to the first and second ports 1-1 and 1-2 in a state in which the relay 110 is not operated, and the relay 110 is connected to a signal by applying a signal to the coil. Are connected to the third and fourth ports 1-3 and 1-4 in an operational state, and the third and fourth ports 1-3 and 1-4 are connected to each other; A second transistor (130) for amplifying a command signal from the outside and outputting the command signal to the fifth port (1-5) of the relay (110); An optocoupler (140) for amplifying and outputting the signal from the sixth port (1-6) of the relay (110); And Loop through the second transistor 130 and the fifth, three, four, six ports (1-5, 1-3, 1-4, 1-6) of the relay 110 and the optocoupler 140 A first transistor (120) for applying a loopback signal to the coil of the relay (110) to generate a signal; Input and output circuit of a discrete signal comprising a. The method of claim 1, Discrete characterized in that the input and output circuit of the discrete signal, the ground signal is output and input through the first and second ports (1-1, 1-2), and the ground signal is self-checked through the loop. I / O circuit of signal. First and second ports 2-1 and 2-2, third and fourth ports 2-3 and 2-4, fifth and sixth ports 2-5 and 2-6, and coils. First relay 210 comprising, wherein the first and second ports 2-1 and 2-2 are ports for signal output and signal input, respectively, and the fifth and sixth ports 2-5. , 2-6 are respectively connected to the first and second ports 2-1 and 2-2 in a state where the first relay 210 is not operated, and the first relay 210 is connected to the coil by applying a signal to the coil. The relay 210 is connected to the third and fourth ports 2-3 and 2-4, and the third and fourth ports 2-3 and 2-4 are connected to each other. ; A second transistor 230 for amplifying a command signal from the outside; A second relay 240 comprising an on port 2-7, an off port 2-8, a common port 2-9 and a coil, wherein the common port 2-9 is the second port; In the state in which the relay 240 is connected to the on-port (2-7) in the non-operation state, and the second relay 240 operates by applying a signal to the coil of the second relay 240 Connected to the off port (2-8), the coil of the second relay (240) is connected to the output of the second transistor (230), and the common port (2-9) is connected to Vdc; An opto coupler (250) for amplifying and outputting the signal from the sixth port (1-6) of the first relay (210) to the outside; And The off ports 2-8 of the second relay 240 and the fifth, third, fourth, and sixth ports 2-5, 2-3, 2-4, and 2-6 of the first relay 210. A first transistor (220) for applying a loopback signal to the coil of the first relay (210) to generate a loop passing through the optocoupler (250); Input and output circuit of a discrete signal comprising a. The method of claim 3, wherein Discrete characterized in that the input and output circuit of the discrete signal, the power signal is output and input through the first and second ports (2-1, 2-2), and the self-check the power signal through the loop. I / O circuit of signal. 1st to 4th ports 3-1, 3-2, 3-3, 3-4, 5th to 8th ports 3-5, 3-6, 3-7. 3-8, 9th A third relay 310 comprising a through twelfth port (3-9, 3-10, 3-11, 3-11) and a coil, wherein the first and second ports (3-1, 3-2) ) Are ports for signal output, the third and fourth ports 3-3 and 3-4 are ports for signal input, and the ninth through twelfth ports 3-9, 3-10, 3. -3. 3-12 are respectively connected to the first to fourth ports 3-1, 3-2, 3-3. 3-4 in a state where the third relay 310 is not operated, and And are connected to the fifth to eighth ports 3-5, 3-6, 3-7. 3-8 in a state where the third relay 310 operates by applying a signal to the coil. The fifth port 3-5 and the seventh port 3-7 are connected to each other, and the sixth port 3-6 and the eighth port 3-8 are connected to each other; A second transistor 330 for amplifying a command signal from the outside; A second relay 340 comprising an on port 3-13, an off port 3-14, a common port 3-15 and a coil, wherein the common port 3-15 is the second port; In a state in which the relay 340 is connected to the on port 3-13 in a non-operation state and the second relay 340 operates by applying a signal to the coil of the second relay 340. The coil of the second relay 240 is connected to the output of the second transistor 330, and the common port 2-9 is connected to the off port 3-14. Connected to the tenth port 3-10 of 310 and the off port 3-14 is connected to the ninth port 3-9 of the third relay 310; A fourth relay 350 including an on port 3-16, an off port 3-17, a common port 3-18, and a coil; An optocoupler 360 for amplifying and outputting the signal from the twelfth port 3-12 of the third relay 310 to the outside, wherein one end of the coil of the fourth relay 340 is the first 1 is connected to the eleventh port 3-11 of the relay 310 and the other end is connected to the anode of the diode in the optocoupler 360, and the off port 3-17 is connected to the third relay 310. Is connected to the twelfth port (3-12) and the ground terminal, and the common port (3-18) is connected to the cathode of the diode in the optocoupler (360); And A first loop and the tenth, sixth, eighth, and twelve passes through the ninth, fifth, seventh, and eleventh ports of the third relay 310; A first transistor 320 for applying a loopback signal to the coil of the third relay 310 such that a second loop through the ports 3-10, 3-6, 3-8, 3-12 is created; Discrete signal input and output circuit comprising a. The method of claim 5, In the input / output circuit of the discrete signal, a short signal is input through the third and fourth ports 3-3 and 3-4 and through the first and second ports 3-1 and 3-2. A short signal is output, and the input / output circuit of the discrete signal is characterized in that the self-check of the short signal through the first loop and the second loop. delete

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