KR100970571B1 - Semiconductor device test contactor and manufacturing method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contactor for testing semiconductor devices, wherein a copper clad laminate (CCL) film having copper thin films formed on both surfaces of a polyimide or prepreg material corresponds to a ball lead of a semiconductor device. A middle plate having a first plated film formed on an inner wall surface of the central hole and having a first plated plate extending from the first plated film to upper and lower surfaces of the central hole; As the CCL film formed on the upper surface of the middle plate, an upper hole corresponding to the center hole is formed, a second plating film is formed on the inner wall surface of the upper hole, and a second plating plate is formed extending from the second plating film to the upper and lower surfaces of the upper hole. A top plate; As the CCL film formed on the lower surface of the middle plate, a lower hole corresponding to the center hole is formed, a third plating film is formed on the inner wall surface of the lower hole, and a third plating plate extending from the third plating film to the upper and lower surfaces of the lower hole. Lower plate; And a conductive silicon compound injected into the central hole, the upper hole, and the lower hole. As a result, a contactor for testing a semiconductor device having improved durability, abrasion resistance, recoverability, flatness, processability, cleaning power, productivity, impact absorption power, and the like, can be obtained.

BGA Devices, Test Sockets, Silicon Contactors, Flexible Circuit Boards (FPCs), Copper Clad Laminates (CCL)

Description

Contactor for semiconductor device test and its manufacturing method {SEMICONDUCTOR DEVICE TEST CONTACTOR AND MANUFACTURING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used to test electrical performance of a semiconductor device, and relates to a contactor interposed between the semiconductor device and a test socket board to secure an electrical connection state therebetween and a method of manufacturing the same.

The conventional semiconductor device test contactor is interposed between the semiconductor device and the test socket board and has a problem in that it is frequently replaced due to its short life due to repeated pressurization, friction, and the like.

Recently proposed for a semiconductor device tester, Patent Registration No. 10-0448414 "Integrated silicon contactor and its manufacturing apparatus and manufacturing method", Utility Model Registration No. 20-0278989 "Ring type of integrated silicon contactor Contactor pads "and the like.

However, there is still a need for extending the service life of a product for almost all of the contactors used to date, including the techniques disclosed in the above-registered patents and utility models.

An object of the present invention is to provide a contactor for testing a semiconductor device having an extended service life compared to the prior art and a method of manufacturing the same.

In order to achieve the above object, the present invention, in the contactor for semiconductor device test, a ball of the semiconductor device as a CCL (Copper Clad Laminate) film in which a copper thin film is formed on both sides of polyimide or prepreg material A plurality of central holes are formed corresponding to the leads, and a first plating film containing a conductive metal is formed on the inner wall surface of each central hole, and the first plating film extends from the first plating film to a predetermined width around the upper and lower surfaces of each central hole. 1 the middle plate in which the plated plate was formed; A CCL film formed by stacking the upper surface of the middle plate and having a copper thin film formed on both sides of a polyimide or prepreg material. A plurality of top holes are formed to correspond to the plurality of center holes, A top plate having a second plated film containing a conductive metal on a wall surface thereof, and having a second plated plate extending from the second plated film around a top surface and a bottom surface of each top hole by a predetermined width; A CCL film laminated on the lower surface of the middle plate and having a copper thin film formed on both sides of a polyimide or prepreg material. A plurality of lower holes are formed to coincide with the plurality of central holes. A lower plate on which a third plating film containing a conductive metal is formed, and a third plating plate extending from the third plating film to a predetermined width around at least an upper surface of each lower hole; And a conductive silicon compound formed in the center hole, the upper hole, and the lower hole, to provide a contactor for testing a semiconductor device.

Here, the upper plate and the lower plate may be laminated on the upper and lower surfaces of the middle plate via a silicon layer.

In this case, a gap may be formed between the first plated plate and the second plated plate and between the first plated plate and the third plated plate due to the thickness of the silicon layer.

In addition, the silicon layer may be an insulating silicon layer or a heat dissipating silicon layer.

The upper and lower holes have the same size, and the central hole has a smaller size than the upper and lower holes, between the first plate and the second plate, and between the first plate and the first plate. The three plating plates may be formed in contact with each other.

In this case, the lower plate may be formed in the third plate is extended to a predetermined width around the lower surface of each lower hole from the third plated film.

In addition, the second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate are each formed to protrude to a predetermined thickness, each hole is formed in the center of the one end of the conductive silicon compound through the hole It may be exposed to the outside.

Meanwhile, the plating film may be formed by sequentially stacking copper, nickel, and gold through an electroless plating process.

The lower plate may have the third plated plate extending from the third plated film to a predetermined width around the lower surface of each lower hole.

In this case, the second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate are each formed to protrude to a predetermined thickness, each of which is formed with a hole in the center one end of the conductive silicon compound through the hole It may be exposed to the outside.

Meanwhile, in order to achieve the above object, the present invention provides a CCL (Copper Clad Laminate) film in which a copper thin film is formed on both surfaces of a polyimide or prepreg material in a method of manufacturing a contactor for testing semiconductor devices. A plurality of central holes corresponding to the ball leads of the semiconductor element are formed in the middle plate, and a first plating film containing a conductive metal is formed on the inner wall surface of each central hole, and the upper and lower circumferences of each central hole are formed from the first plating film. Forming a first plated plate extending in a predetermined width on the substrate; A plurality of top holes corresponding to the plurality of center holes are formed on the top plate, which is a CCL film having a copper thin film formed on both sides of polyimide or prepreg material, and a conductive metal is contained on the inner wall of each top hole. Forming a second plated film, the second plated plate extending from the second plated film around a top surface and a bottom surface of each upper hole by a predetermined width; A plurality of lower holes corresponding to the plurality of center holes are formed on the lower plate, which is a CCL film having a copper thin film formed on both sides of a polyimide or prepreg material, and a conductive metal is contained on the inner wall of each lower hole. Forming a third plated film, the third plated plate extending from the third plated film to a predetermined width around at least an upper surface of each lower hole; Implanting conductive silicon compound into the central hole, the upper hole and the lower hole; And stacking and adhering the upper plate, the middle plate, and the lower plate to provide a method of manufacturing a contactor for testing a semiconductor device.

Here, the upper and lower surfaces of the middle plate, the lower surface of the upper plate and the upper surface of the lower plate, respectively, a silicon layer having a predetermined thickness may be formed, and the upper plate, the middle plate and the lower plate may be laminated to each other through adhesion between the respective silicon layers. .

In this case, the thickness of the silicon layer of the upper plate, the middle plate and the lower plate may be adjusted so that a gap is formed between the first plated plate and the second plated plate and between the first plated plate and the third plated plate, respectively.

In addition, the upper hole and the lower hole is the same size, the central hole is smaller than the upper hole and the lower hole, between the first plate and the second plate, and the first plate and the first plate The three plating plates may be formed in contact with each other.

In addition, the lower plate may be formed in the third plate is extended to a predetermined width around the lower surface of each lower hole from the third plated film.

In addition, the second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate are each formed to protrude to a predetermined thickness, each hole is formed in the center of the one end of the conductive silicon compound through the hole It may be exposed to the outside.

Meanwhile, the plating film may be formed by sequentially stacking copper, nickel, and gold through an electroless plating process.

The lower plate may have the third plated plate extending from the third plated film to a predetermined width around the lower surface of each lower hole.

In this case, the second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate are each formed to protrude to a predetermined thickness, each of which is formed with a hole in the center one end of the conductive silicon compound through the hole It may be exposed to the outside.

According to the semiconductor device test contactor and the manufacturing method according to the present invention as described above, by forming the entire structure by laminated formed CCL (Copper Clad Laminate) film, compared to the conventional contactor structure of silicon components, wear resistance, friction resistance It is possible to obtain an improved contactor for testing semiconductor devices in terms of the service life and the like.

In addition, according to the semiconductor device test contactor and the manufacturing method thereof according to the present invention, the upper plate and the middle plate, and the middle plate and the lower plate are laminated to each other through a silicon layer, it is possible to improve the buffer function during contact pressure of the upper and lower surfaces.

In addition, by forming a clearance between the plate between the upper plate and the middle plate and the plate between the middle plate and the lower plate by controlling the thickness of the silicon layer to be in contact with each other only when the upper and lower sides of the contactor is pressurized to make the up and down energization. It may be. As a result, damage during repeated use of the contactor can be minimized, and the service life of the contactor can be extended.

In addition, according to the semiconductor device test contactor and the manufacturing method according to the present invention, by providing a silicon layer on the upper and lower surfaces of the middle plate, the lower surface of the upper plate and the upper surface of the lower plate to easily control the overall thickness of the contactor by controlling the thickness thereof In addition, especially in the case of a heat-dissipating silicon layer, the heat accumulated in the contactor can be smoothly dissipated, thereby improving product life.

In addition, according to the semiconductor device test contactor according to the present invention and a manufacturing method thereof, the entire contactor by adjusting the thickness of copper, nickel, gold, etc. to be plated as a plate formed on the upper and lower surfaces of each of the upper, middle and lower plates The thickness can also be easily adjusted.

In addition, as described above, since the desired thickness of the contactor and the degree of protrusion of the plated plate may be controlled by adjusting the thicknesses of the silicon layer and the plated plate, productivity in the shape required for the contactor may be improved.

In addition, according to the contactor for a semiconductor device test according to the present invention and a method for manufacturing the same, the conductive silicon is formed by protruding a plated plate with a predetermined thickness on the surface of the upper or lower plate of the contactor on which the conductive silicone compound is formed. The compound can be kept in a constant shape and the contactor's contact performance can be improved.

In addition, according to the semiconductor device test contactor according to the present invention and a method for manufacturing the same, the center width of the conductive silicon compound that is commonly injected in each hole by making the size of the upper and lower holes the same and smaller than the center hole This narrow oblong shape is formed, and thus the central portion having a narrow width when contacting the upper and lower surfaces is improved in density due to compression, thereby improving conductivity in the vertical direction.

A semiconductor device test contactor (hereinafter, referred to simply as a "contactor" 100) according to an embodiment of the present invention is provided between the semiconductor device 10 and the test socket board 20, as shown in FIG. 1. Used to secure up and down electrical connections.

In detail, a ball lead 11 constituting a ball grid array (BGA) is formed on the bottom surface of the semiconductor device 10, and correspondingly, a lower test socket board 20 may be formed. A plurality of contact pads 21 protrude from the upper surface. The semiconductor device test contactor 100 is responsible for securing an electrical connection between the ball lead 11 and the contact pad 21.

The contactor 100 includes an upper plate 110, a middle plate 120, and a lower plate 130, and holes 111, 121, and 131 are formed at positions corresponding to each other in the plates 110, 120, and 130, respectively.

Each of the holes 111, 121, and 131 has plated films 112, 122, and 132 formed on an inner side thereof, and extends to the plated films 112, 122, and 132 to form upper surfaces of the plates 110, 120, and 130. And plated plates 113, 123, and 133 are formed in a predetermined width.

The upper plate 110, the middle plate 120 and the lower plate 130 are all used to process a CCL (Copper Clad Laminate) film.

CCL film is a type of film applied to FPC (Flexible Printed Circuit) as a copper thin film is adhered to the upper and lower surfaces of a film made of polyimide, prepreg and the like.

Each plate 110, 120, 130 forms holes 111, 121, 131 in such a CCL film, and is then formed on the copper thin film and an inner wall surface of the holes 111, 131 through an electroless copper plating process. An additional thin copper film is formed. Then, after the photosensitive film is coated on the surface of the CCL film, exposure, development, and corrosion processes are performed to form a desired circuit shape on the surface (see FIG. 5), and then the copper-plated circuits and holes 111, 121, and 131. ) It can be obtained by sequentially laminating nickel and gold on the inner wall surface through an electroless plating process.

The plated plates 113, 123, and 133 extending from the plated films 112, 122, and 132 to the top and bottom surfaces of the plates 110, 120, and 130 have a predetermined width in the radial direction on the top and bottom surfaces of the plate. Is formed.

Therefore, the plating plates 113, 123, and 133 may be formed in a circular shape as shown in FIG. 5, but are not limited thereto and may be formed in a polygonal shape as necessary.

As an embodiment of the present invention, the CCL film may have a thickness of 80 μm, and the copper thin film to be plated may have a thickness of 35 μm to 70 μm, and nickel and gold may have a thickness of 5 μm and 0.03 μm, respectively. Can be.

Thus, by using the material used for manufacture of conventional FPC as a main material of the contactor 100, the wear resistance and durability of the contactor 100 can be improved compared with the case with the conventional insulating silicone.

Meanwhile, the insulating silicon layers 140 and 150 are formed between the upper plate 110 and the middle plate 120, and between the middle plate 120 and the lower plate 130, respectively, to form the upper plate 110 and the upper plate 110 on the upper and lower surfaces of the middle plate 120. In addition to improving the adhesiveness when the lower plate 130 is laminated, it is possible to have an elastic restoring force to the upper and lower pressure contact when the contactor 100 is completed.

Here, for example, the upper insulating silicon layer 140 is formed by dividing the thickness by half and the other half on the upper plate 110 and the other half on the middle plate 120, respectively, and then the upper plate 110 and the middle plate 120. It is possible to form the completed insulating silicon layer 140 only by applying and heating a silicone primer to each silicon layer facing each other when the adhesion of the.

In this case, the insulating silicon layer formed on the upper plate 110 or the middle plate 120 is usually interposed between the upper plate 110 or the middle plate 120 between the upper and lower molds, and then injected silicon between the molds. It can obtain by hardening.

The lower insulating silicon layer 150 may also be formed in the same manner as the upper insulating silicon layer 140 described above.

The insulating silicon layers 140 and 150 may further include a heat dissipation function. For this, the insulating silicon layers 140 and 150 may be evenly dispersed by adding aluminum oxide (Al ₂ O ₃ ) powder to conventional silicon. In the case of a contactor applied to a test socket for a high frequency integrated circuit, since a lot of heat is generated from the test socket, it is necessary to smoothly release it to the outside through the heat dissipating silicon layer.

In addition, the insulating silicon layers 140 and 150 may be disposed between the plated plate 113 of the upper plate 110 and the plated plate 123 of the middle plate and the plated plate 123 and the lower plate 130 of the middle plate 120 by adjusting the thickness thereof. The clearance of the distance d may be formed between the plated plates 133 of the pads 133).

Accordingly, the contactor 100 normally maintains the plated plates between the upper, middle, and lower plates 110, 120, and 130 while being spaced apart from each other, and is pressed upward and downward by the semiconductor device 10 and the test socket board 20. At this time, the plate is spaced apart from each other, and the conductive silicon compound to be described later is in contact with each other until the vertical conduction.

As such, the gap between the upper and lower plated plates and the conductive silicon compound may be formed by controlling the thickness of the insulating silicon layers 140 and 150, thereby minimizing damage due to repeated use of the contactor 100.

In the holes 111, 121, and 131 of the plates 110, 120, and 130, conductive silicon compounds 114, 124, and 134 are formed on the inner surfaces of the plating films 112, 122, and 132. Injection is formed.

The conductive silicon compounds 114, 124, and 134 have a form in which fine balls made of a conductive metal material such as gold (Au) and silver (Ag) are dispersed in a silicon substrate, and each plate 110, 120, 130. ) May be injected into the corresponding holes (111, 121, 131) by screen printing or vacuum injection method, and then solidified by a curing process.

The conductive metal balls in the conductive silicon compounds 114, 124, and 134 may have a vertically aligned contact by forming a magnetic field up and down, or may simply take a uniformly distributed contact form.

Thus, when the contactor 100 is pressed by the upper semiconductor element 10 and the lower test socket board 20, the conductive silicon compounds 114, 124, and 134 may be formed of the plating films 112, 122, and the like. Along with the 132, the ball lead 11 and the contact pad 21 are electrically energized up and down.

Meanwhile, the plating films 112, 122, and 132 formed on the inner wall surfaces of the holes 111, 121, and 131 of the plates 110, 120, and 130 each contain a conductive metal, and particularly, as described above, copper (Cu), Nickel (Ni) and gold (Au) may have a multi-layered structure in which the layers are sequentially stacked.

Wherein the formation of the copper (Cu) layer can be achieved by the above-described electroless copper plating process and the exposure, development, and corrosion process after the application of the photosensitive film, the laminated formation of nickel and gold are respectively electroless to the copper layer It can be achieved by a plating process. Plating of the nickel is necessary as a process for mediating the performance of the gold plating because gold cannot be plated directly on the copper thin film.

FIG. 5 is a plan view of the semiconductor device test contactor 100 illustrated in FIG. 1, in which a middle plate (not shown) and an upper plate 110 are sequentially stacked on the lower plate 130.

A plurality of plated plates 113 are formed inside the upper plate 110, and conductive silicon compounds 114 are formed inside the inner holes 111 of the plate 113.

Meanwhile, the holes 111, 121, 131 and the plate plates 113, 123, and 133 of the upper, middle, and lower plates 110, 120, and 130 of the semiconductor device test contactor 100 may have circular cross sections, respectively. However, the present invention is not limited thereto and may have a cross-sectional shape of a square cross section or other polygon.

On the other hand, the contactor 100 for semiconductor device test has the most wear on the upper surface portion to which the ball lead 11 contacts, and some wear on the lower surface portion to which the contact pad 21 comes into contact. 2, the plated plate 113 ′ formed on the upper surface of the upper plate 110 ′ and the plated plate 133 ′ formed on the lower surface of the lower plate 130 ′ may be further formed to have a predetermined thickness. It may be.

Further formation of the plated plates 113 ′ and 133 ′ may be achieved by forming a thick thickness of the gold plated in the gold plating process, which is the last step of the electroless plating process.

The contactor 100 'is provided with such thick plated plates 113' and 133 'to minimize damage due to contact friction with the ball lead (11 in FIG. 1) and the contact pad (21 in FIG. 1). Can be.

The plated plates 113 ′ and 133 ′ may each have holes h1 and h2 in the inner center thereof to directly expose a portion of the end portions of the conductive silicon compounds 114 ′ and 134 ′ to the outside.

The size of the holes (h1, h2) in the center of the plated plates 113 'and 133' can be adjusted broadly (when the thickness of the gold to be plated is thin) or narrow (when the thickness of the gold to be plated is thick). Can be.

In addition, the plating plates 113 ′ and 133 ′ may be formed on the upper and lower surfaces of the contactor 100 ′ as shown in FIG. 2, and may be formed on only one portion of the upper or lower surface as necessary. .

The thickness of the plated plates 113 ′ and 133 ′ may also be formed thicker or thinner according to demand.

3 is another modified example of the semiconductor device test contactor 100 according to the embodiment of the present invention, wherein the center hole 121 "is formed narrower than the upper hole 111" and the lower hole 131 ". The clearance gaps (refer to d in FIG. 1) between the upper and lower neighboring plated plates 113 " and 123 ", 123 " and 133 " are formed in contact with each other.

As a result, the conductive silicon compound injected into each of the holes 111 ″, 121 ″, and 131 ″ is formed to be in contact with each other up and down to form an elongated shape having a narrow central width. When the lower surface is contact and pressurized, the narrow central part can improve the conductivity in the vertical direction as the density is improved due to the compression.

FIG. 4 is a further modified example of the semiconductor device test contactor according to the embodiment of the present invention. The plate 113 '' 'formed on the upper surface of the upper plate and the plate 133' '' formed on the lower surface of the lower plate are shown in FIG. ) Is formed to a predetermined thickness, and the conductive silicon compound 114 '' ', 134' '' is formed by forming holes h3 and h4 in the inner center of each plate 113 '' 'and 133' ''. It is also possible for some of the ends of the to be directly exposed to the outside.

Meanwhile, for each of the semiconductor device test contactors 100, 100 ′, 100 ″, 100 ′ ″ shown in FIGS. 1 to 4, the plated plate extending from the hole of the lower plate to the lower surface of the lower plate is removed. You may.

That is, in the case of the lower plate, the plated plate may be formed only on the upper surface thereof, and in the case of the lower plate, the conductive silicon compound may be exposed to match the end surface of the lower plate without forming the plated plate.

This is because, in the case of the lower plate, not only the contact pad (21 in FIG. 1) of the test socket board in contact with the lower surface can be brought into close contact with each other but also the damage caused by the contact pad is relatively less.

A method of manufacturing a semiconductor device test contactor according to an embodiment of the present invention relates to a method of manufacturing the contactor 100 as described above with reference to FIGS. 6 and 7.

In the method for manufacturing a semiconductor device test contactor according to an embodiment of the present invention, the upper, middle, and lower plates 110, 120, and 130 are manufactured separately, and then proceed in the order of coupling with each other.

First, looking at the manufacturing process of the middle plate 120, as shown in Figure 6, to prepare a CCL film 120, the copper thin film is formed on the upper and lower surfaces of the polyimide film or prepreg film (a).

Then, the CCL film 120 is formed with a process of forming a plurality of holes 121 having an arrangement corresponding to the ball leads (11 in FIG. 1) of the semiconductor device (10 in FIG. 1) (b). The hole 121 may be formed by, for example, UV exposure and etching through a photoresist.

Next, by performing an electroless copper plating process on the CCL film 120 as a whole, the copper plating film 122-1 on the inner wall surface of each hole 121 and the copper plating plate 123-1 on the upper and lower surfaces of the film are formed. (C).

Next, in order to form a circuit to be implemented on the intermediate plate 120 (see FIG. 5), the copper plating plate 123 is formed by coating a photoresist on the CCL film 120 and then performing ultraviolet exposure, development, and etching processes. The unnecessary part is removed with respect to -1) to obtain a copper plated plate 123-2 in which a circuit is formed (d).

Then, the electroplating process is sequentially performed on the copper plating film 122-1 and the copper plating plate 123-2 on which the circuit is formed to sequentially form nickel and gold to form a plating film of a completed form. (122) and the plated plate 123 are formed (e).

At this time, in the case of gold plating, the thickness of the plating film 122 and the plate 123 may be formed to be thick or thin as necessary.

Next, insulating silicon layers 140-1 and 150-1 are formed on the upper and lower surfaces of the CCL film 120, respectively (f). Formation of the insulating silicon layers 140-1 and 150-1 is typically achieved by interposing a CCL film 120 between upper and lower molds, and then injecting insulating silicone between the molds and curing.

In this case, the insulating silicon layers 140-1 and 150-1 are formed to be thicker than the thickness of the plate 123. Specifically, the insulating silicon layers 140-1 and 150-1 are formed to be thicker than the plated plate 123 by 1/2 of the clearance between the plated up and down neighboring plates (see d in FIG. 1). Accordingly, the insulating silicon layers 140-2 and 150-2 having the same thickness as the insulating silicon layers 140-1 and 150-1 are formed to correspond to the upper plate 110 and the lower plate 130. If there is a gap between the plated plate (d) can be formed.

However, the thicknesses of the insulating silicon layers 140-1 and 150-1 are not limited thereto, and the upper and lower sides of the insulating silicon layers 140-1 and 150-1 are combined with the insulating silicon layers 140-2 and 150-2 formed on the upper and lower plates 110 and 130, respectively. It may be slightly changed under the premise of forming the above-described clearance d between neighboring plated plates.

Finally, each of the holes 121 of the CCL film 120 having the insulating silicon layers 140-1 and 150-1 formed on top and bottom thereof is injected with the conductive silicon compound 124 containing the conductive metal fine balls dispersed therein. And hardening to obtain the finished midplate 120 (g).

The injection and curing of the conductive silicon compound 124 may be performed by first injecting or vacuum-injecting the conductive silicon compound 124 into the upper surface of the CCL film 120 and then curing the same. .

Meanwhile, when the manufacturing process of the upper plate 110 is described with reference to FIG. 7, first, a CCL film 110 having a copper thin film formed on upper and lower surfaces of a polyimide film or a prepreg film is prepared (a ).

Then, the CCL film 110 performs a process of forming a plurality of holes 111 corresponding to the position of the central hole 121 and having the same diameter as the central hole 121 (b).

Next, by performing an electroless copper plating process on the CCL film 110 as a whole, the copper plated film 112-1 on the inner wall surface of each hole 111 and the copper plated plate 113-1 on the upper and lower surfaces of the film. (C).

Next, in order to form a circuit to be implemented on the upper plate 110 (see FIG. 5), the copper plated plate 113 may be formed by coating a photoresist on the CCL film 110 and then performing ultraviolet exposure, development, and etching processes. The unnecessary part is removed with respect to -1) to obtain a molded copper plated plate 113-2 (d).

Then, the electroplating process is sequentially performed on the copper plated film 112-1 and the molded copper plated plate 113-2 to sequentially form nickel and gold to sequentially form a plated film 112. ) And the plated plate 113 is formed (e).

Next, an insulating silicon layer 140-2 is formed on the bottom surface of the CCL film 110 (f). The insulating silicon layer 140-2 is formed by interposing a CCL film 110 between upper and lower molds as in the case of the middle plate 120, and then injecting insulating silicone between the molds and curing the insulating silicon layer 140-2. Is achieved.

At this time, the insulating silicon layer 140-2 is formed to be somewhat thicker than the thickness of the plate 113. Specifically, the insulating silicon layer 140-2 is formed to be thicker than the plated plate 113 by half of the gap between the plated plates adjacent to each other (see d in FIG. 1). Accordingly, as described above, when the insulating silicon layer 140-1 corresponding to the middle plate 120 is bonded to each other, the gap d between the plated plates may be formed.

However, even in this case, the thickness of the insulating silicon layer 140-2 is not limited thereto, and the above-described clearance between the plating plates that are adjacent to the upper and lower sides in combination with the insulating silicon layer 140-1 formed on the middle plate 120 ( on the premise to form d).

Finally, the holes 111 of the CCL film 110 having the insulating silicon layer 140-2 formed thereon are injected and cured by injecting and curing the conductive silicon compound 114 containing the conductive metal fine balls. The top plate 110 is obtained (g).

7 (g ') forms a thick gold plating on the upper surface of the hole 111' to form a plated plate 113 ', and then injects and hardens the conductive silicon compound 114' inside the hole 111 '. It is. In this case, the plate 113 'may be formed such that the hole h1 is formed at the inner center in accordance with the thickness formed through the electroless gold plating process.

Since the manufacturing process of the lower plate 130 is almost the same as the case of the upper plate 110 described above it will be omitted herein.

As described above, when the individual manufacturing processes of the upper, middle, and lower plates 110, 120, and 130 are completed, the semiconductor device test contactors (100 of FIG. 1) are completed by laminating and bonding each other. At this time, the upper and lower sides of each plate is attached to the insulating silicon layers 140-1 and 150-1 formed on the upper and lower surfaces of the middle plate 120, and the insulating silicon layer 140-2 of the upper plate 110 to be interviewed thereto. The lower plate 130 is bonded to each other by applying and curing a silicone primer between the insulating silicon layer 150-2.

Of course, due to the thickness of the insulating silicon layer (140, 150) formed during the adhesion between the upper, middle, lower plate (110, 120, 130) between the upper and lower plating plates (between 113 and 123 and between 123 and 133) (D) of FIG. 1 is formed.

In the manufacturing process of the middle plate 120, the central hole 121 is formed to have a smaller size than the upper hole 111 and the lower hole 131, and the insulating silicon is formed on each of the plates 110, 120, and 130. The thicknesses of the layers 140-1, 150-1, 140-2, and 150-2 are the same as those of the plated plate, and then the respective plates 110, 120, and 130 are adhered to each other. The contactor 100 " shown in FIG.

Meanwhile, the above-described semiconductor device test contactors 100, 100 ′, 100 ″, 100 ′ ″ and a method of manufacturing the same are only those described for better understanding of the present invention, and thus the technical scope and scope of the present invention are limited. It should not be understood as

The scope of the invention to the technical scope is defined by the claims and equivalents described below.

1 is a side cross-sectional view showing a state of use of a semiconductor device test contactor according to an embodiment of the present invention;

FIG. 2 is a side cross-sectional view illustrating a modification of the contactor for testing semiconductor devices of FIG. 1; FIG.

3 is a side cross-sectional view showing another modified example of the semiconductor device test contactor of FIG. 1;

4 is a side cross-sectional view showing another modified example of the semiconductor device test contactor of FIG. 1;

5 is a plan view of the semiconductor device test contactor of FIG.

FIG. 6 is a process flowchart for explaining a method for manufacturing a heavy plate of the contactor for semiconductor device test of FIG. 1;

FIG. 7 is a flowchart illustrating a method of manufacturing the upper plate of the contactor for semiconductor device test of FIG. 1.

        <Explanation of symbols for the main parts of the drawings>

10: semiconductor element 11: ball lead

20: test socket board 21: contact pad

100: contactor 110 for semiconductor device test: top plate

111, 121, 131: holes 112, 122, 132: plating film

113, 123, 133: plated 114, 124, 134: conductive silicon compound

120: middle plate 130: lower plate

140, 150: insulating silicon layer

Claims (20)

In the contactor for semiconductor element test, Copper Clad Laminate (CCL) film in which copper thin films are formed on both sides of polyimide or prepreg material, and a plurality of center holes are formed corresponding to the ball leads of the semiconductor device, and the inner wall of each center hole is formed. A middle plate having a first plated film containing a conductive metal and having a first plated plate extending from the first plated film around a top surface and a bottom surface of each central hole with a predetermined width; A CCL film formed by stacking the upper surface of the middle plate and having a copper thin film formed on both sides of a polyimide or prepreg material. A plurality of top holes are formed to correspond to the plurality of center holes, A top plate having a second plated film containing a conductive metal on a wall surface thereof, and having a second plated plate extending from the second plated film around a top surface and a bottom surface of each top hole by a predetermined width; A CCL film laminated on the lower surface of the middle plate and having a copper thin film formed on both sides of a polyimide or prepreg material. A plurality of lower holes are formed to coincide with the plurality of central holes. A lower plate on which a third plating film containing a conductive metal is formed, and a third plating plate extending from the third plating film to a predetermined width around at least an upper surface of each lower hole; And It characterized in that it comprises a conductive silicon compound (Compound) formed in the center hole, the upper hole and the lower hole, The upper plate and the lower plate are laminated on the upper and lower surfaces of the middle plate via a silicon layer, the contactor for testing a semiconductor device. delete The method of claim 1, And a gap is formed between the first plated plate and the second plated plate and between the first plated plate and the third plated plate due to the thickness of the silicon layer. The method according to claim 1 or 3, And the silicon layer is an insulated silicon layer. The method according to claim 1 or 3, And the silicon layer is a heat-dissipating silicon layer. The method of claim 1, The upper hole and the lower hole is the same size, the central hole is smaller than the upper hole and the lower hole, The contactor for testing a semiconductor device, wherein the first plated plate and the second plated plate and the first plated plate and the third plated plate are in contact with each other. The method of claim 6, The lower plate is a contactor for testing a semiconductor device, characterized in that the third plate is formed extending from the third plated film around a lower surface of each lower hole with a predetermined width. The method of claim 7, wherein The second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate respectively protrude to a predetermined thickness, and a hole is formed in the center thereof, respectively, so that one end of the conductive silicon compound is moved outward through the hole. A contactor for testing semiconductor devices, wherein the contactor is exposed. The method of claim 1, The plated film is a contactor for testing a semiconductor device, characterized in that copper, nickel, gold is sequentially formed by an electroless plating process. The method of claim 1, The lower plate is a contactor for testing a semiconductor device, characterized in that the third plate is formed extending from the third plated film around a lower surface of each lower hole with a predetermined width. The method of claim 10, The second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate respectively protrude to a predetermined thickness, and a hole is formed in the center thereof, respectively, so that one end of the conductive silicon compound is moved outward through the hole. A contactor for testing semiconductor devices, wherein the contactor is exposed. In the manufacturing method of the contactor for semiconductor element test, A plurality of central holes corresponding to the ball leads of the semiconductor device are formed in a middle plate, which is a CCL (Copper Clad Laminate) film in which copper thin films are formed on both sides of a polyimide or prepreg material, and each inside of each central hole is formed. Forming a first plated film containing a conductive metal on a wall surface, and forming a first plated plate extending from the first plated film around a top surface and a bottom surface of each central hole by a predetermined width; A plurality of top holes corresponding to the plurality of center holes are formed on the top plate, which is a CCL film having a copper thin film formed on both sides of polyimide or prepreg material, and a conductive metal is contained on the inner wall of each top hole. Forming a second plated film, the second plated plate extending from the second plated film around a top surface and a bottom surface of each upper hole by a predetermined width; A plurality of lower holes corresponding to the plurality of center holes are formed on the lower plate, which is a CCL film having a copper thin film formed on both sides of a polyimide or prepreg material, and a conductive metal is contained on the inner wall of each lower hole. Forming a third plated film, the third plated plate extending from the third plated film to a predetermined width around at least an upper surface of each lower hole; Implanting conductive silicon compound into the central hole, the upper hole and the lower hole; And And laminating and adhering the upper plate, the middle plate, and the lower plate, On the upper and lower surfaces of the middle plate, a silicon layer having a predetermined thickness is formed on the lower surface of the upper plate and the upper surface of the lower plate, respectively. The upper plate, the middle plate and the lower plate is a method for manufacturing a semiconductor device test contactor, characterized in that formed by laminating each other through the adhesion between the respective silicon layer. delete The method of claim 12, A semiconductor characterized in that the gap is formed between the first plate and the second plate and between the first plate and the third plate by adjusting the thickness of the silicon layer of the upper plate, the middle plate and the lower plate, respectively. Method for manufacturing a contactor for device testing. The method according to claim 12 or 14, wherein The upper hole and the lower hole is the same size, the central hole is smaller than the upper hole and the lower hole, The method of claim 1, wherein the first plated plate and the second plated plate and the first plated plate and the third plated plate are in contact with each other. The method of claim 15, The lower plate is a method for manufacturing a contactor for a semiconductor device test, characterized in that the third plate is formed extending from the third plated film around a lower surface of each lower hole with a predetermined width. The method of claim 16, The second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate respectively protrude to a predetermined thickness, and a hole is formed in the center thereof, respectively, so that one end of the conductive silicon compound is moved outward through the hole. A method of manufacturing a contactor for testing a semiconductor device, characterized in that exposed. The method of claim 12, The plating film is a method of manufacturing a contactor for a semiconductor device test, characterized in that the copper, nickel, gold is sequentially laminated through an electroless plating process. The method of claim 12, The lower plate is a method for manufacturing a contactor for a semiconductor device test, characterized in that the third plate is formed extending from the third plated film around a lower surface of each lower hole with a predetermined width. The method of claim 19, The second plated plate formed on the upper surface of the upper plate and the third plated plate formed on the lower surface of the lower plate respectively protrude to a predetermined thickness, and a hole is formed in the center thereof, respectively, so that one end of the conductive silicon compound is moved outward through the hole. A method of manufacturing a contactor for testing a semiconductor device, characterized in that exposed.

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