KR100966998B1 - Method for processing optical proximity correction - Google Patents

Abstract

The optical proximity effect compensation method of the present invention comprises the steps of designing a target layout, performing a first optical proximity effect compensation for the target layout, and manufacturing a first exposure mask reflecting the result of the first optical proximity effect compensation. Performing after development inspection (ADI) using the first exposure mask, performing after etched inspection (AEI) using the ADI, extracting OPC parameters using a final pattern and the target layout And performing a second optical proximity effect compensation using the OPC parameter, and manufacturing a second exposure mask reflecting the OPC parameter.

OPC, DBM

Description

Method for processing optical proximity correction

The present invention relates to an optical proximity effect compensation method, and to an optical proximity effect compensation method using design based metrology (DBM).

As the degree of integration of semiconductor devices increases, design rules of the devices decrease, and many studies for this have been conducted.

In the exposure process to realize a fine pattern, an exposure source with a short wavelength is used as an effort to increase resolution. Since an exposure source with a very short wavelength, such as extreme ultraviolet rays, has a size similar to that of a pattern. In the exposure process, the effect of light diffraction and interference is greatly increased, and the distortion of the pattern is intensified, so it is difficult to implement the pattern according to the design layout.

This phenomenon is called the optical proximity effect, and light from an optical path other than the optical path to produce a layout, such as a designed layout, is generated that affects certain patterns and adjacent patterns, which are not implemented on the wafer as designed. It can not be implemented in a distorted form.

Since the distorted patterns degrade the yield and performance of the semiconductor device, an optical proximity effect compensation method has been developed to compensate for this.

The optical proximity effect compensation method models for optical proximity effect compensation by predicting an image transferred onto a wafer based on mask pattern information and wafer processing conditions or by measuring an image of an actual patterned test pattern.

However, this method has information on the CD and the up, down, left, and right space of the target pattern for the target pattern, but the information about the target pattern and the neighboring pattern, that is, the interval between the CD of the neighboring pattern or the neighboring pattern. It does not contain information such as asymmetry.

In addition, since information collection about the neighboring pattern is performed through the test pattern, a difference may be generated from the actual implementation pattern.

Therefore, when the optical proximity effect compensation is performed and the pattern is formed by the above-described method, it may inevitably occur when the target layout does not exactly match.

If the target layout and the layout implemented after performing optical proximity effect compensation do not exactly match, it is not necessary to check whether the target layout matches the implemented layout after performing optical proximity effect compensation in a 1: 1 manner. impossible.

If the pattern on which the optical proximity effect compensation is performed is present in a distorted state, the overlap with the upper layer formed by the subsequent process may not be accurately performed, causing problems of the device or affecting the characteristics of the device.

The optical proximity effect compensation method of the present invention provides an optical proximity effect compensation method for solving a problem in which a layout implemented on a wafer cannot confirm the degree of overlap with an actual target layout.

The optical proximity effect compensation method of the present invention comprises the steps of designing a target layout;

Performing first optical proximity effect compensation for the target layout;

Fabricating a first exposure mask reflecting the result of the first optical proximity effect compensation;

Performing after development inspection (ADI) using the first exposure mask;

Performing after etched inspection (AEI) using the ADI;

Extracting OPC parameters using the final pattern and the target layout;

Performing a second optical proximity effect compensation using the OPC parameter; and

And manufacturing a second exposure mask in which the OPC parameter is reflected.

In this case, performing the after development inspection (ADI) includes applying a photoresist film on the semiconductor substrate on which the etched layer is formed, and forming the photoresist pattern by an exposure process and a development process using the first exposure mask. It is characterized by.

The after-etched inspection (AEI) may include forming the final pattern by etching the etched layer using the photoresist pattern formed in the ADI as an etching mask.

The OPC parameter may be extracted by aligning the final pattern with the target layout.

The final pattern may be aligned with the target layout by using a design based metrology (DBM) device.

The DBM apparatus may include extracting a contour image from the final pattern, and aligning the target image with the contour image for the final pattern.

The OPC parameter may include a shift degree of the final pattern and the target layout.

The performing of the second optical proximity effect compensation may include shifting the final pattern and the target layout to '0'.

In addition, the shift degree is characterized in that the degree of deviation of the contour image for the final pattern in the target layout or the deviation of the target layout in the contour image for the final pattern is calculated.

The first exposure mask may include the first optical proximity effect compensated OPC layout.

The optical proximity effect compensation method of the present invention has the advantage of performing precise optical proximity effect compensation for the layout of a device vulnerable to CD variation and overlap margin by predicting the limitation of the optical proximity effect compensation, that is, distortion or aberration variation. have.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

1 is a flowchart schematically showing an optical proximity effect compensation method according to the present invention.

First, a target layout is designed (S1).

Next, the first optical proximity effect compensation is performed on the target layout (S2).

In this case, the first optical proximity effect compensation is a task to realize the final pattern in the form of the target layout, and according to the conventional optical proximity effect compensation method, the first optical proximity effect compensation may not be implemented on the wafer in the same form as the target layout. After performing calibration using the final pattern implemented in a distorted form, simulation modeling may be performed to obtain an image of the final pattern close to the target layout.

Next, a first exposure mask reflecting the OPC layout for which the first optical proximity effect compensation has been completed is manufactured (S3).

That is, the first exposure mask may include an OPC layout on which first optical proximity effect compensation is performed to implement the target layout.

Subsequently, in the after development inspection (ADI) step, the photoresist film is coated on the semiconductor substrate on which the etched layer is formed, and then the photoresist pattern is formed by an exposure process and a development process using a first exposure mask having an OPC layout.

Subsequently, in the after etched inspection (AEI) step, the etched layer is etched using the above-described photoresist pattern as an etch mask (S5).

Next, the information on the target layout and the information of the wafer 201 having the final pattern formed in the design based metrology (DBM) are accurately aligned (S6).

In this case, in order to accurately align the final pattern formed on the wafer with the target layout 202, an alignment mark 203 must be accurately formed at the corner of the chip as shown in FIG. The target layout 202 can be matched with the final pattern formed on the actual wafer.

Next, information about the final pattern formed on the wafer and the target layout is measured using a DBM device (S7).

In this case, the DBM device may extract the contour image of the final pattern, and may extract various information related to the final pattern by using a database of the target layout.

In this case, the information on the final pattern and the target layout includes information on the degree of shift of the final pattern and the target layout.

3 is a photograph showing a pattern image measured by using the DBM equipment.

Referring to FIG. 3, the final pattern implemented on the actual wafer may be represented by a line pattern 301 and a space pattern 302 divided into solid lines, and the shape of the pattern to be originally implemented is a target layout 303 represented by a dotted line. )

In this case, although the line-and-space pattern is used as an embodiment, the present invention is not limited thereto and may be applied to a hole pattern or a pillar pattern.

The line pattern 301 implemented on the actual wafer should have the same pitch and shape as the target layout 303, but the effects of distortion, aberration, etc. occurring in various fluctuation indexes, for example, lenses of exposure equipment, during the exposure process By this, although the optical proximity effect compensation is completed, the pattern may not be formed identically with the target layout 303 and the pattern may be deformed or the difference in displacement may occur.

Information on the final pattern can be obtained by forming a line on the outer portion of the line pattern 301 through the DBM equipment and measuring the size thereof, which will be the contour image 304 of the line pattern 301. It may be represented by a one-dotted line shown in FIG.

As described above, CD measurement of the line pattern 301 and the space pattern 302 may be performed using the contour image 304 represented by one dotted line.

As a result, information about the final pattern and information about the target layout 303 may be compared to obtain information about an offset of up, down, left, and right, that is, a degree of shift.

Then, the OPC parameters are extracted (S8).

In this case, the OPC parameter includes the degree of shift of the target layout 303 and the line pattern 301 obtained through the process of S7.

That is, the shift degree is preferably obtained by calculating the deviation of the contour image for the final pattern from the target layout or the deviation of the target layout from the contour image for the final pattern for a portion that does not match the final pattern. .

Then, the second optical proximity effect compensation is performed with the OPC parameter (S9).

In this case, the second optical proximity effect compensation may include causing the shift degree of the pattern to be '0'.

Next, a second exposure mask reflecting the OPC parameters is prepared (S10).

Through the above-described process, the first optical proximity effect correction is completed, and the top, bottom, left and right offsets between the final pattern formed by using the first exposure mask having the OPC layout and the target layout are obtained, and the OPC parameters are obtained. By performing accurate calibration, the optical proximity effect compensation can be performed accurately.

1 is a flow chart schematically showing the optical proximity effect compensation method according to the present invention.

2 is a diagram illustrating alignment of a final pattern and a target layout.

3 is a photograph showing a pattern image measured by DBM.

Claims (10)

Designing a target layout; Performing first optical proximity effect compensation for the target layout; Fabricating a first exposure mask that reflects a result of the first optical proximity effect compensation; Performing after development inspection (ADI) using the first exposure mask; Performing after etched inspection (AEI) using the ADI; Extracting an OPC parameter using a final pattern and the target layout; Performing a second optical proximity effect compensation using the OPC parameter; And Manufacturing a second exposure mask reflecting the OPC parameters, The OPC parameter is extracted through the alignment of the final pattern and the target layout, Alignment of the final pattern and the target layout is optical proximity effect compensation method characterized in that performed using a design based metrology (DBM) equipment. The method of claim 1, Performing the after development inspection (ADI) Applying a photosensitive film on the semiconductor substrate on which the etched layer is formed; And And forming a photoresist pattern in an exposure process and a developing process using the first exposure mask. The method of claim 1, The performing of the after etched inspection (AEI) comprises etching the layer to be etched using the photoresist pattern formed in the ADI as an etching mask to form the final pattern. delete delete The method of claim 1, And the DBM device extracts a contour image from the final pattern and aligns the target image with the contour image for the final pattern. The method of claim 1, And the OPC parameter comprises a degree of shift of the final pattern and the target layout. The method of claim 7, wherein The performing of the second optical proximity effect compensation may include shifting the final pattern and the target layout to '0'. The method of claim 8, The shift degree is an optical proximity effect compensation method characterized in that the deviation of the contour image for the final pattern in the target layout or the deviation of the target layout in the contour image for the final pattern is calculated. The method of claim 1, And the first exposure mask comprises the first optical proximity effect compensated OPC layout.

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