KR100965583B1 - ESD protecting circuit in liquid crystal display device and method for manufacturing the same - Google Patents

Abstract

The present invention relates to an antistatic circuit and a method of manufacturing the liquid crystal display for stabilizing the ripple component of the floating line connected to the data line end, and a gate line and a data line arranged in a direction perpendicular to each other; And an antistatic element formed with a resistance component and a capacitor component between the floating line and the common voltage applying line formed at one side of the gate line and the data line, and the common voltage applying line and the floating line.

LCD, Antistatic Circuit

Description

ESD protection circuit in liquid crystal display device and method for manufacturing the same

1 is a plan view of a typical TN mode liquid crystal display device

FIG. 2 is a cross-sectional view taken along line II ′ of FIG. 1.

3 is a plan view of a unit pixel of a general transverse electric field type liquid crystal display device

4 is a cross-sectional view taken along line II-II 'of FIG.

5A is a layout view of a conventional transverse electric field type liquid crystal display device.

FIG. 5B is an equivalent circuit diagram of the antistatic element of FIG. 5A

6 is a timing diagram illustrating pixel voltages of gate lines driven in a general polarity inversion scheme;

FIG. 7 is an explanatory diagram illustrating polarity variation of common voltages for each pixel of each conventional transverse electric field type liquid crystal display for each odd frame / even frame. FIG.

8 is a distortion waveform diagram of a result of checking a DC voltage of a floating line with an oscilloscope in a conventional transverse electric field liquid crystal display device.

9 is a layout view of a transverse electric field type liquid crystal display device according to the present invention.

10A to 10B are equivalent circuit diagrams of an antistatic device according to the present invention.                 

11A to 11D are plan views showing the manufacturing process of the antistatic device according to the present invention.

12 is a plan view of the manufacturing process of another embodiment of the present invention.

Explanation of symbols for the main parts of the drawings

112: gate line 115: data line

125: common line 128: common voltage application line

129: floating line 130a, 130b, 130c, 130d: antistatic element

128a: lower electrode of the capacitor

128b, 128c, 128d: gate electrode

133a, 133b, 133c: semiconductor layer

134a, 134b, 134c, 134d: contact hole

135a, 135b, 135c: source / drain electrodes

130d: upper electrode of the capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an antistatic circuit of a liquid crystal display device, and more particularly, to an antistatic circuit for stabilizing the residual component ripple of a floating line connected to an end of a data line and a manufacturing method thereof.

One of the flat panel display devices is a liquid crystal display device that changes the optical anisotropy by applying an electric field to a liquid crystal that combines the liquidity and the optical properties of the crystal, and has lower power consumption and volume than the conventional cathode ray tube. It is small and is widely used because it can be enlarged and fixed.

Such a liquid crystal display is largely divided into a liquid crystal panel displaying an image and a driving circuit unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel has a predetermined space and is bonded to the first and second substrates, 1 and a liquid crystal layer injected between the second substrates.

Such a liquid crystal display device has a variety of modes depending on the nature of the liquid crystal and the structure of the pattern.

That is, TN mode (Twisted Nematic Mode) that controls the liquid crystal director by arranging the liquid crystal directors to be twisted by 90 °, and divides one pixel into several domains, thereby realizing a wide viewing angle. Multi-Domain Mode, OCB Mode (Optically Compensated Birefringence Mode), which compensates the phase change of light according to the direction of light by attaching a compensation film to the outer peripheral surface of the substrate, and two electrodes on one substrate. In-plane switching mode in which the directors of the liquid crystal are twisted in parallel planes of the alignment layer, and VA mode in which the long axis of the liquid crystal molecules is vertically aligned with the alignment layer plane using a negative liquid crystal and a vertical alignment layer. Vertical Alignment).

The most representative TN mode liquid crystal display and transverse electric field type liquid crystal display are described as follows.                         

1 is a plan view of a general TN mode liquid crystal display device, and FIG. 2 is a cross-sectional view taken along line II ′ of FIG. 1.

That is, the plurality of gate lines 12 arranged in one direction at regular intervals on the first substrate 11 and the plurality of gate lines 12 arranged at regular intervals in a direction perpendicular to the gate lines 12 to define pixel regions. A plurality of data lines 15, a plurality of pixel electrodes 17 formed in a matrix form in each pixel region, and a portion where the gate lines 12 and the data lines 15 cross each other to form the gate And a plurality of thin film transistors (TFTs) which are switched by the signals of the lines 12 and transfer the signals of the data lines 15 to the pixel electrodes 17.

The thin film transistor TFT may include a gate electrode 12a protruding from the gate line 12, and a gate insulating layer 13 formed on an entire surface of the first substrate including the gate electrode 12a and the gate line 12. ), A semiconductor layer 14 formed on the upper gate insulating layer 13 of the gate electrode 12a, a source electrode 15a protruding from the data line 15 to the semiconductor layer 14, and A drain electrode 15b formed on the other side of the semiconductor layer 14 opposite to the source electrode 15a is provided.

The passivation layer 16 may have a contact hole on the drain electrode 15b on the upper surface of the thin film transistor, and a passivation layer 16 may be formed on the entire surface of the substrate, and may be connected to the drain electrode 15b through the contact hole. A pixel electrode 17 is formed in each pixel region on the pixel 16, and a first alignment layer 18 is formed on the entire surface of the substrate including the pixel electrode 17 and subjected to rubbing.                         

 The second substrate 20 includes a black matrix layer 21 for blocking light in portions other than the pixel region, and R, G, and B color filter layers 22 for expressing color in each pixel region. ) And a common electrode 24 and a second alignment layer 23 are formed on the entire surface of the substrate including the color filter layer 22.

The first and second substrates 11 and 20 as described above are held by a spacer (not shown) and held together by a sealant (not shown). The liquid crystal layer 19 is formed between the two substrates 11 and 20.

The liquid crystal display of the TN mode has difficulty in securing a wide viewing angle because the liquid crystal layer is driven by an electric field between the pixel electrode formed on the lower substrate and the common electrode formed on the upper substrate. Accordingly, a transverse electric field type liquid crystal display device has been developed to secure a wide viewing angle.

In the transverse electric field system, a pixel electrode and a common electrode are formed on the same substrate, a gate line and a data line defining a unit pixel on a first substrate, a switching element formed at an intersection point of the gate line and the data line, A common electrode and a pixel electrode are formed to cross each other and generate a transverse electric field.

3 is a plan view of a unit pixel of a general transverse electric field type liquid crystal display, and FIG. 4 is a cross-sectional view taken along line II-II 'of FIG. 3.

That is, the gate line 12 and the data line 15 and the intersection portion of the gate line 12 and the data line 15 are arranged on the first substrate 11 in a direction perpendicular to each other to define a pixel. A thin film transistor (TFT) disposed on the substrate, a common line 25 disposed in the pixel to be parallel to the gate line 12, and a branch branched from the common line 25 to be parallel to the data line 15. A plurality of common electrodes 24 formed in the pixel, a plurality of pixel electrodes 17 connected to drain electrodes of the thin film transistor TFT and interposed in parallel with the common electrode between the common electrodes 24; The capacitor electrode 26 extends from the pixel electrode 17 and is formed on the common line 25.

The thin film transistor TFT may include a gate electrode 12a branching from the gate line 12, a gate insulating layer 13 formed on the entire surface including the gate electrode 12a, and an upper portion of the gate electrode 12a. A semiconductor layer 14 formed on the gate insulating film 13 and a source electrode 15a and a drain electrode 15b branched from the data line 15 and formed at both ends of the semiconductor layer 14, respectively. .

The protective layer 16 has a contact hole on the drain electrode 15b on the front surface of the substrate including the thin film transistor, and a protective film 16 is formed on the front surface of the substrate, and is connected to the drain electrode 15b through the contact hole. A pixel electrode 17 is formed in each pixel region on the 16, and a first alignment layer 18 is formed on the entire surface of the substrate including the pixel electrode 17 and subjected to rubbing.

 The second substrate 20 includes a black matrix layer 21 for blocking light in portions other than the pixel region, and R, G, and B color filter layers 22 for expressing color in each pixel region. ) Is formed, and an overcoat layer 27 is formed on the entire substrate including the color filter layer 22.                         

The first and second substrates 11 and 20 as described above are held by a spacer (not shown) and held together by a sealant (not shown). The liquid crystal layer 19 is formed between the two substrates 11 and 20.

In this case, the common line 25 and the common electrode 24 are integrally formed, the gate line 12 and the gate electrode 12a are integrally formed, and the common line 25 and the gate line 12 are integrally formed. ) Can be formed simultaneously using a low resistance metal as a material.

The pixel electrode 17 is made of a transparent conductive metal having a relatively high transmittance of light, such as indium-tin-oxide (ITO), as a material, so that the pixel electrode 17 can cross the common electrode 24 alternately. It is formed in the form of two branches, is connected to the drain electrode (15b) receives a data voltage.

As described above, the common voltage is applied to all the liquid crystal display devices regardless of the mode of the liquid crystal display device, and electrostatic discharge (ESD) is generated during the manufacturing process or the test of the liquid crystal display device, thereby causing the gate line 12 or the data line ( When static electricity is applied to 15), the elements of the thin film transistor array are destroyed or damaged, which is likely to cause defects.

Therefore, in order to protect the internal circuit from the static electricity, an antistatic circuit is provided between the common voltage application line for applying the common voltage and the ends of the gate line and the data line. When the antistatic circuit is installed as described above, even if static electricity is applied to the gate line or the data line, an equipotential is formed through the common voltage applying line by the static electricity protection circuit, thereby protecting the elements inside the thin film transistor array due to static electricity.

The antistatic circuit of the conventional liquid crystal display will be described with reference to the accompanying drawings.

FIG. 5A is a layout view of a conventional transverse electric field type liquid crystal display, and FIG. 5B is an equivalent circuit diagram of the antistatic element of FIG. 5A.

As described above, the gate line 12 and the data line 15 are arranged in a direction perpendicular to each other in the display region AR, and the common line 25 is arranged in a direction parallel to the gate line 12. Is arranged.

In addition, a gate pad portion and a data pad portion for applying a driving signal are formed at one side of the gate line 12 and one side of the data line 15 of the non-display area around the display area, respectively. The common voltage applying line 28 and the floating line 29 for applying the common voltage are formed in the non-display area opposite to the data pad portion.

In addition, the other end of each gate line 12 and the common voltage application line 28 are connected by an antistatic element 30a, and the other end of the data line 15 and the floating line 29 are also The common voltage applying line 28 and the floating line 29 are also connected by an antistatic element 30b, and the common voltage applying line 28 and the floating line 29 are also connected by the antistatic element 30c, and the common voltage is applied to the floating line 29. The terminal 31 is also connected by the antistatic element 30d.

Here, the antistatic elements 30a, 30b, 30c, and 30d may be formed in the same structure or have different structures, for example, formed between the common voltage applying line 28 and the floating line 29. The configuration of the antistatic element 30c is as shown in FIG. 5B.

That is, a first transistor Q1 having a gate terminal and a source terminal connected to the common voltage application line 28, a gate terminal and a drain terminal connected to the floating line 29, and the first transistor Q1. A second transistor Q2 having a source terminal connected to a drain terminal of the source terminal, and a source terminal and a drain terminal connected to the common voltage applying line 28 and the following floating line 29, respectively, and having a source of the second transistor Q2 The third transistor Q3 has a gate terminal connected to the terminal. The antistatic elements 30a, 30b, 30c, and 30d thus constructed each have a high resistance characteristic.

On the other hand, in such a liquid crystal display, when each pixel is arranged in a matrix form and a scan signal is input to one gate line, an image signal is applied to the pixel corresponding to the line.

However, since the deterioration of characteristics occurs when the DC voltage is applied for a long time, the liquid crystal injected between the first and second substrates is driven by periodically changing the polarity of the applied voltage, and this method is called a polarity inversion method. .

The polarity inversion scheme includes frame inversion, line inversion, column inversion, and dot inversion.

Among them, the dot inversion method is a polarity inversion driving method that realizes the best image quality at present, and is applied to high resolutions (XGA, SXGA, UXGA), and polarities of data voltages between adjacent pixels are reversed in all directions. Therefore, the flicker phenomenon can be minimized by the spatial averaging method, but it has the disadvantage of using a high voltage source driver and having a large current consumption.

FIG. 6 is a timing diagram illustrating pixel voltages of gate lines driven in a general polarity inversion scheme, and FIG. 7 illustrates polarity change of common voltages for each pixel of a conventional transverse electric field type liquid crystal display. FIG. 1 shows each frame.

As shown in FIG. 6, the voltage applied to the data line is inverted in one vertical period, and the data lines crossing each gate line have different polarities in each pixel so as to have a positive polarity or (−) relative to a common voltage. The data voltage is applied to have polarity.

The common voltage Vcom continues to maintain a predetermined level even when a pixel, a gate line, or a frame changes. At this time, the predetermined level state is an intermediate level between voltages of two levels applied to the data line.

As shown in FIG. 7, the conventional transverse electric field type liquid crystal display device driven by dot inversion has different polarities (data voltages for common voltages) in adjacent pixels, and each time the frame is changed, the polarity of each pixel is changed. Is reversed.

In this case, the polarities of the charges charged to the adjacent pixels are different from each other by (+), (-), ..., etc. of the polarities of the charges charged to each pixel, so that high quality images can be obtained at high speed. have.

In this way, since the polarity of the data voltage is inverted and applied, the driving IC applies a common voltage of the DC voltage. However, as shown in FIG. 5A, each data line 15 is connected through the antistatic element 30b. The DC voltage of line 29 has a large amount of ripple.

FIG. 8 illustrates a distortion waveform of a result obtained by checking a DC voltage of a floating line with an oscilloscope in a conventional transverse electric field liquid crystal display.

That is, although the common voltage of the DC component as shown in FIG. 8 (a) is applied, the common voltage is distorted by the polarity inversion of the applied data voltage as shown in FIG. 8c, and thus has a ripple as shown in FIG. 8b.

As such, since the potential of the floating line connected to the unstable common voltage is not stable, there is a problem in that the thin film transistors of pixels at the bottom of the panel to which these noise peaks are applied for a long time differ in operating characteristics from other regions.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. An electrostatic prevention of a liquid crystal display device in which a low pass filter including an antistatic element and a capacitor is provided between a common voltage applying line and a floating line to stabilize a ripple of a common voltage is provided. Its purpose is to provide a circuit and a method of manufacturing the same.

In order to achieve the above object, an electrostatic prevention circuit of a liquid crystal display device includes a gate line and a data line arranged in a direction perpendicular to each other, and a floating line and a common voltage formed on one side of the gate line and the data line. And an antistatic element formed between an applying line and the common voltage applying line and the floating line with a resistance component and a capacitor component.

Here, an antistatic device having a resistance component and a capacitor component is further formed between the gate line and the common voltage applying line.

An antistatic device having a resistance component and a capacitor component is further formed between the data line and the floating line.

The capacitor of the antistatic device is characterized in that the lower electrode is formed of the gate line material of the liquid crystal display device, and the upper electrode is made of the data line material.

The capacitor of the antistatic device is characterized in that the lower electrode is formed of the gate line material of the liquid crystal display device, and the upper electrode is formed of the pixel electrode material.

In addition, a method of manufacturing an antistatic circuit of a liquid crystal display device according to the present invention for achieving the above object, by depositing and patterning a metal layer to form a gate line in the display area, a common voltage application line and Simultaneously forming a floating line, a lower electrode of a capacitor of the antistatic element, and each gate electrode of the first, second, and third transistors, and a substrate including the common voltage applying line, the floating line, the lower electrode, and the gate electrode. Forming a gate insulating film on the entire surface, forming a semiconductor layer on the gate insulating film on the gate electrode of each transistor, and selectively removing the gate insulating film on each of the gate electrode and the floating line of each transistor. Forming second, third, and fourth contact holes, and depositing and patterning a metal layer Forming a data line in the display area and forming a source / drain electrode of each transistor and an upper electrode of the capacitor in the non-display area.

Here, the lower electrode of the capacitor and the gate electrode of the first transistor protrude from the common voltage application line, the gate electrode of the second transistor protrude from the floating line, and the gate electrode of the third transistor includes the first, It is characterized in that it is formed to be located between the second transistor.

The lower electrode of the capacitor and the gate electrode of the first transistor protrude from the gate line, the gate electrode of the second transistor protrude from the common voltage application line, and the gate electrode of the third transistor is the first and second It is characterized in that it is formed between the transistors.

The lower electrode of the capacitor and the gate electrode of the first transistor protrude from the data line, the gate electrode of the second transistor protrude from the floating line, and the gate electrode of the third transistor is between the first and second transistors. It is characterized in that it is formed to be located in.

The source electrodes of the first and third transistors are formed to be connected to the gate electrodes of the first transistor through the first contact hole, and the drain electrodes of the second and third transistors are formed through the second contact hole. And the source and drain electrodes of the first and second transistors are connected to the gate electrode of the third transistor through a third contact hole, and the upper electrode of the capacitor is connected to the fourth contact. It is characterized in that it is formed to be connected to the floating line through a hole.

The upper electrode of the capacitor is characterized in that formed of a pixel electrode material.

An antistatic circuit and a method of manufacturing the same according to the present invention having the features as described above will be described in more detail with reference to the accompanying drawings.

9 is a layout view of a transverse electric field type liquid crystal display device according to the present invention, and FIGS. 10A to 10B are equivalent circuit diagrams of the antistatic element according to the present invention.

As described above, the gate line 112 and the data line 115 are arranged in a direction perpendicular to each other in the display region AR, and the common line 125 is arranged in a direction parallel to the gate line 112. Is arranged.

In addition, a gate pad portion and a data pad portion for applying a driving signal are formed on one side of the gate line 112 and one side of the data line 115 in the non-display area around the display area, respectively. A common voltage applying line 128 and a floating line 129 for applying a common voltage are formed in the non-display area opposite to the data pad part.

In addition, the other end of each gate line 112 and the common voltage application line 128 are connected by an antistatic element 130a, and the other end of the data line 115 and the floating line 129 are also The common voltage applying line 128 and the floating line 129 are also connected by the antistatic element 130c, and are connected by the antistatic element 130b, and the common voltage is applied to the floating line 129. The terminal 131 is also connected by the antistatic element 130d.

Here, the antistatic elements 130a, 130b, 130c, and 130d may have the same structure or have different structures, for example, formed between the common voltage applying line 128 and the floating line 129. The configuration of the antistatic element 130c is the same as that of FIGS. 10A and 10B.

That is, between the common voltage applying line 128 and the floating line 129, as shown in FIG. 10A, a resistor having a low pass filter connected in parallel with the resistor R1 and the capacitor C1 is configured. An antistatic element is constructed.

Here, the resistor R1 is composed of three transistors. More specifically, as shown in FIG. 10B, a first transistor Q1 having a gate terminal and a source terminal connected to the common voltage applying line 128 is illustrated. A second transistor Q2 having a gate terminal and a drain terminal connected to the floating line 129, and a source terminal connected to the drain terminal of the first transistor Q1, and the common voltage applying line 128. A source transistor and a drain terminal are respectively connected to the following floating line 129, and a third transistor Q3 is connected to the source terminal of the second transistor Q2. The antistatic elements 130a, 130b, 130c, and 130d configured as described above have high resistance characteristics, respectively.                     

Referring to the manufacturing method of the antistatic device according to the present invention as follows.

11A to 11D are plan views showing the manufacturing process of the antistatic device according to the present invention, and FIG. 12 is a plan view of another embodiment.

A method of forming an antistatic device in parallel with a cell array process is as follows.

That is, as shown in FIG. 11A, a material for forming gate lines and gate electrodes (12 and 12a of FIGS. 3 and 4) of the cell array portion is deposited and patterned to form a common voltage applying line 128 and a floating line 129. At the same time, the lower electrode 128a of the capacitor C1 of the antistatic element 130c and the gate electrodes 128b, 128c, and 128d of the first, second, and third transistors Q1, Q2, and Q3 are connected. At the same time.

Here, the lower electrode 128a of the capacitor and the gate electrode 128b of the first transistor Q1 protrude from the common voltage application line 128, and the gate electrode 128c of the second transistor Q2. ) Is formed to protrude from the floating line 129, and the gate electrode 128d of the third transistor Q3 is formed to be positioned between the first and second transistors Q1 and Q2.

A gate insulating film (not shown in the figure, see 13 in FIG. 4) is formed over the substrate formed as described above.

As shown in FIG. 11B, the semiconductor layers 133a, 133b, and 133c are simultaneously formed on the gate insulating film on the gate electrodes 128b, 128c, and 128d of the respective transistors.

As shown in FIG. 11C, each of the gate electrodes 128b, 128c, and 128d of the transistor and the gate insulating layer on the floating line 129 may be selectively removed to form first, second, third, and fourth contact holes 134a, 134b, 134c, and 134d).

As shown in FIG. 11D, materials such as the data line of the cell array unit (see 15 of FIG. 3) are deposited and selectively removed, so that the source / drain electrodes 135a, 135b, and 135c of each transistor and the capacitor C1 may be removed. The upper electrode 135d is formed.

That is, the source electrodes 135a of the first and third transistors Q1 and Q3 are formed to be connected to the gate electrodes 128b of the first transistor Q1 through the first contact hole 134a, and the second Drain electrodes 135b of the second and third transistors Q2 and Q3 are formed to be connected to the gate electrode 128c of the second transistor Q2 through the contact hole 134b, and the third contact hole 134c. Source / drain electrodes 135c of the first and second transistors Q1 and Q2 are formed to be connected to the gate electrode 128d of the third transistor Q3 through the second contact hole 134d. An upper electrode 135d of the capacitor C1 is formed so as to be connected to the floating line 129 through.

In another embodiment, as shown in FIG. 12, the capacitor may be formed using the gate electrode material as the lower electrode and the pixel electrode material ITO as the upper electrode.

As described above, the antistatic circuit and the manufacturing method of the liquid crystal display according to the present invention have the following effects.

First, since the antistatic element formed between each signal line, the floating line, and the common voltage application line is composed of a low pass filter having a resistance component and a capacitor component, even if a ripple occurs in the common voltage applied to the floating line, Since it is stabilized by the pass filter, it is possible to stabilize the common voltage.

Second, since the common voltage is stabilized as described above, the characteristics of the thin film transistors of the pixels at the lower end of the panel near the floating line do not change, thereby improving image quality.

Claims (11)

A gate line and a data line arranged in a direction perpendicular to each other, A floating line and a common voltage applying line formed at one side of the gate line and the data line; An antistatic device is formed between the common voltage applying line and the floating line, including a resistor component and a capacitor component. And the capacitor of the antistatic element forms a lower electrode from a gate line material of the liquid crystal display and an upper electrode from a data line material or a pixel electrode material. The method of claim 1, And an antistatic device having a resistance component and a capacitor component between the gate line and the common voltage applying line. The method of claim 1, And an antistatic element having a resistance component and a capacitor component between the data line and the floating line. delete delete A metal layer is deposited and patterned to form a gate line in the display area, a common voltage applying line and a floating line in the non-display area, a lower electrode of the capacitor of the antistatic element, and each gate electrode of the first, second, and third transistors. Forming the same time, Forming a gate insulating film on an entire surface of the substrate including the common voltage applying line, the floating line, the lower electrode, and the gate electrode; Forming a semiconductor layer over the gate insulating film on the gate electrode of each transistor; Selectively removing each gate electrode of each transistor and the gate insulating film on the floating line to form first, second, third, and fourth contact holes; Forming a data line in the display area by depositing and patterning a metal layer, and forming a source / drain electrode of each transistor and an upper electrode of the capacitor in the non-display area. Method of manufacturing the circuit. The method of claim 6, The lower electrode of the capacitor and the gate electrode of the first transistor protrude from the common voltage applying line, the gate electrode of the second transistor protrudes from the floating line, and the gate electrode of the third transistor is the first and second. A method of manufacturing an antistatic circuit of a liquid crystal display device, characterized in that it is formed between the transistors. The method of claim 6, The lower electrode of the capacitor and the gate electrode of the first transistor protrude from the gate line, the gate electrode of the second transistor protrude from the common voltage application line, and the gate electrode of the third transistor is the first and second A method of manufacturing an antistatic circuit of a liquid crystal display device, characterized in that it is formed between the transistors. The method of claim 6, The lower electrode of the capacitor and the gate electrode of the first transistor protrude from the data line, the gate electrode of the second transistor protrude from the floating line, and the gate electrode of the third transistor is between the first and second transistors. And an antistatic circuit for the liquid crystal display device. The method of claim 6, Source electrodes of the first and third transistors are formed to be connected to gate electrodes of the first transistor through the first contact hole, and drain electrodes of the second and third transistors are formed through the second contact hole. The source and drain electrodes of the first and second transistors are connected to the gate electrode of the third transistor through a third contact hole, and the upper electrode of the capacitor is a fourth contact hole. Method of manufacturing an anti-static circuit of the liquid crystal display device characterized in that it is formed to be connected to the floating line through. The method of claim 6, And the upper electrode of the capacitor is formed of a pixel electrode material.

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