KR100941576B1 - Method for driving a plasma display panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel of a selective erasure method in which one frame includes a plurality of subfields and each subfield includes a reset section, an address section, and a sustain discharge section. The first subfield of the fields applies a reset pulse having a double ramp waveform to charge wall charges enough to perform sustain discharge for all cells, and wall charges between electrodes in order to make the address conditions of all cells the same. And a first reset period for adjusting a condition, wherein the second to Nth subfields maintain a sustain discharge voltage to charge wall charges sufficient to perform sustain discharge on cells discharged from a previous subfield, and In order to make the address condition of cells sustained in the subfield the same, a reset pulse having a falling ramp waveform is obtained. And a second reset period for adjusting the wall charge condition between each electrode, thereby forming an operation margin by forming the same wall charge condition of each electrode in all subfields for the cells to be discharged at the beginning of the address period. It can be sufficiently secured, and the reset period of the first subfield can be performed only by weak discharge without strong discharge, thereby improving contrast in black color expression.

Description

Method for driving a plasma display panel

1 is a cross-sectional view showing the structure of a general plasma display panel.

Figure 2 is a waveform diagram showing a plasma display panel driving method according to the prior art.

3 is a waveform diagram showing a method for driving a plasma display panel according to the present invention;

Figure 4 is a waveform diagram showing another embodiment of a plasma display panel driving method according to the present invention.

Figure 5 is a waveform diagram showing another embodiment of a plasma display panel driving method according to the present invention.

The present invention relates to a method of driving a plasma display panel, and more particularly, a wall charge condition is adjusted by using a ramp waveform in a reset section, and the subfield is driven to the same address condition in all subfields to sufficiently secure an operation margin. The present invention relates to a method of driving a plasma display panel of a selective erasure method capable of improving contrast.

In general, a plasma display panel (PDP) is a light emitting device in which ultraviolet rays generated by discharge of an inert gas excite phosphors to display an image, and are lighter, thinner, and larger than conventional CRT (Cathode Ray Tube). Because of its easy characteristics, it is used for video conferencing, advertising and publicity, and large screen wall-mounted televisions.

1 is a cross-sectional view showing the structure of a general plasma display panel.

In the plasma display panel, the front substrate 1 on which the X electrode and the Y electrode are formed and the rear substrate 4 on which the address electrode is formed are sealed in parallel with a predetermined distance therebetween.

In the front substrate 1, an X electrode and a Y electrode are formed to maintain light emission of a cell by mutual discharge in one pixel. Each of the X and Y electrodes includes metal electrodes Xb and Yb made of metal on the transparent electrodes Xa and Ya formed of a transparent ITO material. Here, the transparent electrodes Xa and Ya are also called ITO electrodes.

In addition, a dielectric layer 2 is formed on the X electrode and the Y electrode to limit the discharge current of the X electrode and the Y electrode, and to insulate the electrode pairs, and a protective layer 3 is formed on the upper surface thereof.

The rear substrate 4 has a plurality of discharge spaces, that is, a stripe type (or dot type) partition wall 5 for forming a cell C in parallel and vertically arranged. The address electrodes A intersecting the X and Y electrodes are arranged in parallel to the partition wall 5, and a dielectric layer 6 is formed thereon.

In addition, the upper surface of the rear substrate 4 is coated with R, G, and B fluorescent layers 7 that emit visible light for image display during address discharge in an area except the upper surface of the partition 5.

Among the driving methods of the plasma display panel configured as described above, the selective writing method and the selective erasing method may be classified according to the addressing method.

First, the selective write method generates wall charge between X-Y electrodes of a cell to be turned on by an address discharge in an address period. Thereafter, sustain discharge is performed on the cells that have performed the address discharge in the sustain discharge period.

On the other hand, the selective erasing method generates wall charges to be sustained and discharged between the X-Y electrodes of all the cells in the reset period, and erases the wall charges between the X-Y electrodes of the cells to be turned off by the address discharge in the address period.

Subsequently, in the sustain discharge period, cells that do not perform address discharge perform sustain discharge.

Among the driving methods using the selective erasing method, for example, in a plurality of subfields constituting one frame, sustain discharge can be performed between XY electrodes of all cells in the reset period of the first subfield. There is a method of stacking the wall charges and maintaining sustain discharge in the sustain period of each subfield unless address discharge is performed.                         

In this case, once the wall charge is erased between the X-Y electrodes by the address discharge in the address period of a certain subfield, it is no longer turned on in the subsequent subfield. That is, in the subfields other than the subfield in which the address discharge has been performed, there is no reset period for accumulating wall charges enough to sustain discharge between the X-Y electrodes of all the cells.

In addition, each subfield constituting one frame may be continuously arranged by forming a group for each subfield having a mutual relationship. At this time, only the first subfield of each group has a reset period for forming wall charges on the X-Y electrodes of all cells.

Such a plasma display panel driving method according to the prior art is described in European Patent Publication EP 0952569 A2.

2 is a waveform diagram illustrating a selective erasing method in the plasma display panel driving method according to the related art.

In the plasma display panel driving method according to the related art, in the selective erasing method, there is a reset period R for charging wall charges enough to perform sustain discharge on the XY electrodes of all cells only in the first subfield of one frame. .

In the reset section R, a negative exponential waveform RPy is applied to the Y electrode, and a positive exponential waveform RPx is applied to the X electrode to cause discharge between the XY electrodes, thereby causing a positive discharge to the Y electrode. Charge the negative electrode and charge the negative electrode to the X electrode.

Afterwards, a strong pulse is generated by applying a rectangular pulse PP having a sustain voltage magnitude to the Y electrode, and the width of the pulse is increased to sustain sustain discharge to the X and Y electrodes at a sustain period. Build up enough wall charge.

This is the same as the operation of the long last sustain pulse IPP applied to the Y electrode in the sustain section S in each subfield, so that the wall charge between the electrodes immediately before the address section A of each subfield is performed. Conditions are formed under similar conditions.

Thereafter, the cell which performed the address discharge in the address period A performs the sustain discharge in the cell in which the address discharge has not been performed in the sustain period S that follows.

In this case, the cell which has performed the address discharge in any subfield can no longer sustain discharge in the subfield.

In the address section A, the scan pulse SP is applied at the same timing as the data pulse DP.

The last subfield includes an erase period E formed by applying erase pulses AP and EP to the address electrode D and the Y electrode, respectively.

However, in the plasma display panel driving method according to the related art, the pulse PP applied to the Y electrode in the reset period R and the last sustain pulse IPP of the sustain period S of each subfield are generated. The magnitude of the wall charges formed between the XY electrodes of each cell by the discharge may vary depending on the minute discharge characteristics of each cell, and varies depending on the number of sustain discharges.

In addition, the magnitude of the wall charges between the Y electrode and the Z electrode, which plays an important role in the address discharge, may vary depending on the characteristics of each cell.                         

Therefore, since the address discharge condition is set differently for each cell, a wide operating margin cannot be secured, and the contrast becomes bad because strong discharge occurs in the reset section R when the black color is expressed. have.

An object of the present invention for solving the above problems is to ensure sufficient operating margin by adjusting the wall charge condition by ramp waveform in the reset period and setting the same address condition in all subfields.

Another object of the present invention for solving the above problems is to improve the contrast by performing a weak discharge by the ramp waveform in the reset period.

According to an aspect of the present invention, there is provided a plasma display panel driving method of a selective erasure method in which one frame includes a plurality of subfields, and each subfield includes at least a reset section, an address section, and a sustain discharge section. At least one of the first subfields of the subfields applies a pulse having a rising ramp waveform to the first electrode (Y electrode) to charge wall charges sufficient to perform sustain discharge for all cells, and the entire cells are the same. And a first reset period in which a wall charge between each electrode of all cells is adjusted by applying a pulse having a falling ramp waveform to the first electrode (Y electrode) to have an address condition, wherein the first reset period is included in the first subfield. The second subfields other than the subfield maintain the sustain voltage at the first electrode (Y electrode) for a predetermined period and then move to the previous subfield. Charges the wall charges enough to perform the sustain discharge in the cells discharged at and has a down ramp waveform on the first electrode (Y electrode) to ensure that the cells discharged in the previous subfield have the same address condition. And a second reset period for adjusting the wall charge between the electrodes of the cells sustained and discharged in the previous subfield by applying a pulse, wherein the wall charge conditions of the electrodes at the beginning of the address period are the same in all subfields. And the second reset section has a voltage equal to that of the sustain pulse of the sustain discharge section and is wider than the sustain pulse to the first electrode to sustain cells in the previous subfield. A second front surface writing period for charging wall charges sufficient to perform sustain discharge on the second battery; And a second adjustment section for adjusting wall charge between each electrode of cells sustained and discharged in the previous subfield by applying a falling ramp waveform pulse to the first electrode, and in the second adjustment section, a second electrode (X electrode). ), A voltage lower than the voltage applied to the address electrode (Z electrode) is applied.

The above and other objects and features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a waveform diagram illustrating a method of driving a plasma display panel according to the present invention.

In the first reset period, a wall charge pulse RPy1 is applied to the Y electrode to form wall charges between the X and Y electrodes to be sustained and discharged.

Therefore, the first reset period R1 can be divided into a writing period by an up ramp wave and an adjustment period by a down ramp wave.

First, in the writing period, an up ramp waveform (rising slope wave) pulse rising to a constant voltage Vyr is applied to the Y electrode while maintaining the voltage of the X electrode, and discharged to all display cells. To generate wall charge.

Thereafter, in the adjustment period, a down ramp waveform (falling slope wave) pulse that reaches a constant voltage Vyn is applied to the Y electrode while a pulse RPz1 having a constant voltage Vdr is applied to the Z electrode. Is authorized. At this time, weak discharge occurs between both the X-Y electrode and the Z-Y electrode.

The final voltage in the first reset period R1 is Vyn, Y electrode is the ground voltage (GND), and Z electrode is Vdr. Where Vyn is a negative voltage and Vdr is a positive voltage.

Therefore, for each cell after the first reset period R1, the final voltage Vyn of the Y electrode in the first reset period R1 is determined from the discharge start voltage when the X electrode is the positive electrode and the Y electrode is the negative electrode. Subtracted wall charges are formed between the XY electrodes, and for each cell, the final voltage of the Z electrode and the final voltage of the Y electrode in the first reset period from the discharge start voltage when Z is the anode and Y is the cathode. Wall charges are formed by subtracting the added voltage (Vdr + Vyn).

This phenomenon occurs equally for all cells regardless of non-uniformity between cells. The wall charge between the X-Y electrodes is large enough to sustain sustain the discharge of the cells which have not performed the address discharge in the address section A by the sustain pulse IP. Thereafter, cells that do not perform address discharge perform sustain discharge.

The last sustain pulse RPy2 applied to the Y electrode of the sustain period S performs sustain discharge and at the same time, resets the second and subsequent subfields.

That is, the last sustain pulse RPy2 applied to the Y electrode is set long enough to form sufficient wall charge between the X-Y electrodes of the sustain discharge cells. At this time, after the last sustain discharge is performed, a pulse RPz2 having a constant voltage Vdr is applied to the Z electrode before the wall charge is sufficiently charged, so that a greater amount of charge is applied to the X electrode than when the Z electrode is grounded (GND). Is charged.

Then, when the voltage of the Y electrode drops slowly to the ramp waveform, weak discharge occurs between the X-Y electrodes and the Z-Y electrodes. That is, after the last sustain pulse RPy2 applied to the Y electrode maintains the sustain voltage Vsus for a predetermined period, a falling slope waveform is formed to fall to the constant voltage Vyn. Therefore, the same operation as that of the adjustment period R1 of the first reset period is performed.

Here, the values of the voltages at the last point in the reset period R2 of the second and subsequent subfields are the same as the conditions when the first reset period R1 ends.

Therefore, even when the reset period R2 of the second and subsequent subfields is over, the address condition after the first reset period R1 is the same as described above regardless of the number of unevenness or sustain discharge between the cells. Therefore, the address discharge condition in all subfields has the same condition.

In addition, since only weak discharge by the ramp waveform is performed in the reset period, the luminance is lowered when the black color is expressed, thereby improving contrast.

In the plasma display panel driving method, applying the pulses RPz1 and RPz2 having a constant voltage Vdr applied to the Z electrode in the reset periods R1 and R2 of the first and second subfields is applied. Depending on the characteristics of the plasma display panel, the time of application and the magnitude of the voltage may vary.

That is, in the plasma display panel, the discharge start voltage between the XY and ZY electrodes may vary according to the structure of the cell, and the time for the wall charge to be charged to the electrode after the sustain discharge may vary. Pulses RPz1 and RPz2 with (Vdr) can be used. In addition, depending on the system used, pulses RPz1 and RPz2 having a constant voltage Vdr may not be applied to the Z electrode.

In addition, in the above method, the first reset period R1 for forming wall charges enough to sustain discharge between the X-Y electrodes of all the cells may be inserted into a plurality of subfields in one frame.

When the first reset section R1 is inserted in a plurality of subfields, the driving method in the subfield after applying the first reset pulse is the same as the method described above until the reset pulse of the other first reset section is applied. Is performed.

4 is a waveform diagram illustrating another embodiment of a plasma display panel driving method according to the present invention.

Referring to FIG. 4, the voltage of the Y electrode may be rapidly dropped before the down ramp wave reset pulse in the second and subsequent reset periods such that the self-erasing discharge does not occur. Therefore, the reset period is minimized so that the remaining time can be used to increase the luminance. Since other working principles are the same as the above-described embodiments, detailed description thereof will be omitted herein.

5 is a waveform diagram illustrating yet another embodiment of a method of driving a plasma display panel according to the present invention.

Referring to FIG. 5, a pulse RPx having a constant voltage Vxr may be applied to the X electrode in the reset periods R1 and R2. The constant voltage Vxr is a voltage lower than the constant voltage Vdr of the pulses RPz1 and PRz2 applied to the Z electrode.

In this case, the wall charge state between the electrodes after the reset periods R1 and R2 is adjusted by the voltages Vdr, Vyn, and Vxr applied to each electrode. That is, the constant voltages Vxr and Vyn of the applied pulses may be adjusted to appropriate values according to the characteristics of the applied panel. However, if the sum of the two voltages (Vxr, Vyn) is too large, since the sustain discharge is not performed in the sustain period, an appropriate design for each is necessary. Since other working principles are the same as the above-described embodiments, detailed description thereof will be omitted herein.

As described above, in the plasma display panel driving method according to the present invention, the wall charge condition is adjusted by the ramp waveform in the reset period, and the operating conditions can be sufficiently secured by setting the same address condition in all subfields. It works.

In addition, the plasma display panel driving method according to the present invention has the effect of improving the contrast by performing a weak discharge by the ramp waveform in the reset period.

In addition, the preferred embodiment of the present invention for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (9)

delete delete delete delete In a method of driving a plasma display panel of a selective erasing method in which one frame includes a plurality of subfields, each subfield includes at least a reset section, an address section, and a sustain discharge section. At least one first subfield of the subfields Applying a pulse having a rising ramp waveform to the first electrode (Y electrode) to charge the wall charges enough to perform sustain discharge for all cells, and to equalize the address conditions of all the cells (Y electrode) And a first reset section for applying a pulse having a falling ramp waveform to each electrode to perform weak discharge between all electrodes to adjust wall charge. The second subfields other than the first subfield are The first electrode (Y electrode) maintains a sustain voltage for a predetermined period of time to charge wall charges sufficient to perform sustain discharge on cells discharged in the previous subfield, and address conditions of cells sustained and discharged in the previous subfield. In order to be equal to the first electrode (Y electrode) by applying a pulse having a down ramp waveform to perform a weak discharge at each electrode includes a second reset period for adjusting the wall charge, The wall charge conditions of the electrodes at the start of the address period are the same in all subfields, The second reset period, By applying a pulse having the same voltage as that of the sustain pulse in the sustain discharge section and having a width wider than that of the sustain pulse, the wall charges are sufficient to perform sustain discharge on the cells discharged in the previous subfield. A second full write interval for charging; And And a second adjustment period for applying a falling ramp waveform pulse to the first electrode to adjust wall charge between each electrode of cells sustained and discharged in a previous subfield. And applying a voltage lower than a voltage applied to the address electrode (Z electrode) to the second electrode (X electrode) in the second adjustment section. The method of claim 5, wherein And said falling ramp waveform pulse starts at the same voltage as said sustain pulse in said second adjustment section. delete delete delete

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