KR100941203B1 - Wafer for adjusting beam source and method of manufacturing it - Google Patents

Wafer for adjusting beam source and method of manufacturing it Download PDF

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KR100941203B1
KR100941203B1 KR1020070122190A KR20070122190A KR100941203B1 KR 100941203 B1 KR100941203 B1 KR 100941203B1 KR 1020070122190 A KR1020070122190 A KR 1020070122190A KR 20070122190 A KR20070122190 A KR 20070122190A KR 100941203 B1 KR100941203 B1 KR 100941203B1
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wafer
light source
inspection
calibration
measurement
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KR1020070122190A
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Korean (ko)
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KR20090055325A (en
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김재동
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주식회사 동부하이텍
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/93—Detection standards; Calibrating baseline adjustment, drift correction
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501—Semiconductor wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means

Abstract

본 발명은 반도체 웨이퍼의 표면 검사 또는 측정시 반도체 웨이퍼의 표면에 검사 또는 측정에 따른 광원에서 발생되는 빔의 스폿 사이즈를 교정하기 위한 웨이퍼에 있어서, 표면에 다수의 초점 교정용 홈이 형성된 광원 교정용 웨이퍼를 제공하고, 또한, 상기 광원 교정용 웨이퍼는 웨이퍼의 표면에 설정 두께의 산화막 물질을 증착하여 산화막 층을 형성하는 단계와, 상기 웨이퍼의 상면에 증착된 산화막 층에서 동일 간격으로 다수의 원형 홈 형상의 패턴이 형성되도록 식각 공정을 수행하는 단계로 이루어지는 제조방법에 의해 제조된다. 이와 같이 제조된 광원 교정용 웨이퍼에 의하면 광원에서 발생되는 빔의 초점부분에 해당되는 스폿 사이즈를 용이하게 조절할 수 있어 반도체 장비의 검사 또는 측정 데이터의 정확성을 향상시켜 검사 또는 측정 장비의 신뢰도를 확보하는 효과가 있다.The present invention is a wafer for correcting the spot size of the beam generated from the light source according to the inspection or measurement on the surface of the semiconductor wafer during the surface inspection or measurement of the semiconductor wafer, the light source for calibration of the light source formed with a plurality of focus correction grooves on the surface The wafer for light source calibration includes: depositing an oxide material having a predetermined thickness on a surface of a wafer to form an oxide layer, and a plurality of circular grooves at equal intervals in the oxide layer deposited on an upper surface of the wafer. It is produced by a manufacturing method comprising the step of performing an etching process to form a pattern of the shape. According to the light source calibration wafer manufactured as described above, the spot size corresponding to the focal portion of the beam generated from the light source can be easily adjusted, thereby improving the accuracy of the inspection or measurement data of the semiconductor device to secure reliability of the inspection or measurement device. It works.

반도체 웨이퍼, 초점 교정용 홈, 산화막 층 Semiconductor Wafer, Focus Correction Groove, Oxide Layer

Description

광원 교정용 반도체 웨이퍼 및 그 제조방법{Wafer for adjusting beam source and method of manufacturing it}Semiconductor wafer for light source calibration and its manufacturing method {Wafer for adjusting beam source and method of manufacturing it}

본 발명은 반도체 검사 및 측정 장비에 사용되는 광원의 스폿 사이즈를 교정가능하도록 한 광원 교정용 반도체 웨이퍼 및 그 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer for light source calibration and a method of manufacturing the same, wherein the spot size of a light source used in semiconductor inspection and measurement equipment can be corrected.

일반적으로 반도체 검사 장비 또는 반도체 측정 장비에 의해 반도체 웨이퍼의 표면을 검사하는 경우에 광원을 사용하게 된다. 이때 사용되는 광원에서 발생되는 빔은 정확하게 포커싱된 초점부분(spot size; 이하 '스폿 사이즈'로 칭함)을 형성하여야 정확도가 높은 측정 및 검사 결과를 얻을 수 있게 된다.Generally, a light source is used when inspecting a surface of a semiconductor wafer by a semiconductor inspection device or a semiconductor measurement device. In this case, the beam generated from the light source used must form a precisely focused spot size (hereinafter, referred to as a 'spot size') to obtain high accuracy measurement and inspection results.

그러나 종래에는 웨이퍼의 표면이 평탄한 상태이기 때문에 광원에서 조사되는 빔이 웨이퍼의 표면 상에서 정확한 초점을 구현한 상태인지 확인할 수 없어 측정 결과 데이터의 오류가 빈번하게 발생된다.However, in the related art, since the surface of the wafer is flat, it is not possible to determine whether the beam irradiated from the light source is the correct focus on the surface of the wafer, so that errors in the measurement result data frequently occur.

즉, 종래에는 광원에서 조사되는 빔이 웨이퍼의 표면에서 정확하게 초점이 맞추어지 지지 않고 산란광이 발생되는 상태에서 검사 및 측정이 이루어지는 경우가 빈번하게 발생되는 문제가 있다.That is, conventionally, there is a problem that the inspection and measurement are frequently performed in a state where the beam irradiated from the light source is not accurately focused on the surface of the wafer and scattered light is generated.

본 발명의 목적은 반도체 검사 또는 측정 장비의 광원에서 조사되는 빔이 초점되는 부분인 스폿 사이즈를 용이하게 조절할 수 있어 검사 및 측정시 포커싱의 정확도를 구현하는데 있다.An object of the present invention is to realize the accuracy of focusing during inspection and measurement by easily adjusting the spot size that is the portion of the beam that is irradiated from the light source of the semiconductor inspection or measurement equipment is focused.

상기의 목적을 달성하기 위한 본 발명에 따른 광원 교정용 웨이퍼는 반도체 웨이퍼의 표면 검사 또는 측정시 반도체 웨이퍼의 표면에 검사 또는 측정을 위하여 광원에서 발생되는 빔의 스폿 사이즈를 교정하기 위한 웨이퍼에 있어서, 표면에 다수의 초점 교정용 홈이 일정 간격을 갖고 사방으로 형성된 것을 특징으로 한다.In the wafer for light source calibration according to the present invention for achieving the above object in the wafer for correcting the spot size of the beam generated from the light source for inspection or measurement of the surface of the semiconductor wafer during the surface inspection or measurement of the semiconductor wafer, A plurality of focus correction grooves on the surface is characterized in that formed in all directions at regular intervals.

상기 초점 교정용 홈은 원형인 것이 바람직하다.The focus correction groove is preferably circular.

또한, 상기 초점 교정용 홈은 지름 1㎛, 높이 1㎛인 것이 바람직하다.In addition, the focus correction groove is preferably 1 μm in diameter and 1 μm in height.

상기 초점 교정용 홈은 상기 웨이퍼의 표면에 증착된 산화막 층에 형성된 것이 바람직하다.The focus calibration groove is preferably formed in the oxide film layer deposited on the surface of the wafer.

그리고, 본 발명에 따른 광원 교정용 웨이퍼의 제조방법은 웨이퍼의 표면에 설정 두께의 산화막 물질을 증착하여 산화막 층을 형성하는 단계와, 상기 웨이퍼의 상면에 증착된 산화막 층에서 동일 간격으로 다수의 원형 홈 형상의 패턴이 형성되도록 식각 공정을 수행하는 단계를 포함하는 것을 특징으로 한다.In addition, the method of manufacturing a light source calibration wafer according to the present invention comprises the steps of forming an oxide layer by depositing an oxide material having a predetermined thickness on the surface of the wafer, and a plurality of circular shapes at equal intervals in the oxide layer deposited on the upper surface of the wafer. And performing an etching process to form a groove-shaped pattern.

본 발명에 의하여 반도체 장치의 검사 또는 측정 장비에 사용되는 광원에서 발생되는 빔의 초점부분에 해당되는 스폿 사이즈를 용이하게 조절할 수 있어 반도체 장비의 검사 또는 측정 데이터의 정확성을 향상시켜 검사 또는 측정 장비의 신뢰도를 확보하는 효과가 있다.According to the present invention, the spot size corresponding to the focus portion of the beam generated from the light source used in the inspection or measurement equipment of the semiconductor device can be easily adjusted, thereby improving the accuracy of the inspection or measurement data of the semiconductor device. It is effective to secure reliability.

본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 본 발명을 용이하게 실시할 수 있을 정도로 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 상세하게 설명한다.Exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

도 1은 본 발명에 의한 광원 교정용 웨이퍼의 평면도이고, 도 2는 도 1의 단면도이며, 도 3은 본 발명에 의한 광원 교정용 웨이퍼에 의해 광원이 교정되는 상태도이다.1 is a plan view of a light source calibration wafer according to the present invention, FIG. 2 is a cross-sectional view of FIG. 1, and FIG. 3 is a state diagram in which a light source is calibrated by the light source calibration wafer according to the present invention.

도 1 및 도 2를 참조하면, 본 발명에 따른 일 실시예에 의한 광원 교정용 웨이퍼(100)는 반도체 웨이퍼의 표면 검사 또는 측정시 광원에서 발생되는 빔의 스폿 사이즈를 형성하기 위하여 표면에 다수의 초점 교정용 홈(112)이 형성된다. 이러한 초점 교정용 홈(112)은 웨이퍼(100)의 표면에 증착되는 산화막 층(110)에 다수의 패턴이 형성되어 이루어진다.1 and 2, the light source calibration wafer 100 according to an embodiment of the present invention has a plurality of surfaces on the surface to form the spot size of the beam generated from the light source during the surface inspection or measurement of the semiconductor wafer; The focus correction groove 112 is formed. The focus calibration groove 112 is formed by forming a plurality of patterns on the oxide layer 110 deposited on the surface of the wafer 100.

이처럼 웨이퍼(100)의 표면에 형성되는 다수의 초점 교정용 홈(112)은 동일 간격을 갖고 형성되며, 상하 및 좌우방향을 향하여 사방으로 형성된다. 이때, 초점 교정용 홈(112)은 각각 원형으로 형성되는 것이 바람직하다. 이는 빛이 집중되어 초점이 맺혀지는 형상이 원형으로 형성되기 때문이다.As described above, the plurality of focus correction grooves 112 formed on the surface of the wafer 100 are formed at equal intervals, and are formed in all directions toward the top, bottom, left, and right directions. At this time, the focus correction grooves 112 are preferably formed in a circular shape. This is because the shape where the light is concentrated and focused is formed in a circular shape.

본 발명에 따른 광원 교정용 웨이퍼의 제조방법은 다음과 같다.A method of manufacturing a light source calibration wafer according to the present invention is as follows.

먼저 준비된 웨이퍼(100)의 표면에 기설정 두께의 산화막 물질을 증착하여 산화막 층(110)을 형성하게 된다. First, the oxide layer 110 is formed by depositing an oxide material having a predetermined thickness on the prepared surface of the wafer 100.

그리고 산화막 층(110)의 상면에서 다수의 원형 홈(112)이 형성되도록 식각 공정을 수행하게 된다.An etching process is performed to form a plurality of circular grooves 112 on the upper surface of the oxide layer 110.

이처럼 형성된 원형 홈(112)들이 웨이퍼(100)의 표면에 다수의 초점 교정용 홈(112)으로 광원의 초점을 교정하는 작용을 실시하게 된다. 이때, 초점 교정용 홈(112)은 지름 1㎛, 높이 1㎛인 것이 바람직하나, 이에 한정될 필요는 없다.The circular grooves 112 formed as described above serve to correct the focus of the light source with a plurality of focus correction grooves 112 on the surface of the wafer 100. In this case, the focus correction groove 112 is preferably 1 μm in diameter and 1 μm in height, but is not limited thereto.

이와 같이 형성되는 광원 교정용 반도체 웨이퍼에 의하여 반도체의 검사 및 측정을 실시하는 방법을 설명한다.A method of inspecting and measuring a semiconductor by the light source calibration semiconductor wafer thus formed will be described.

먼저 표면에 다수의 초점 교정용 홈(112)이 일정 간격을 갖고 사방으로 형성된 교정용 웨이퍼(100)를 준비하게 된다.First, a plurality of focus calibration grooves 112 are prepared on the surface at a predetermined interval to prepare the calibration wafer 100 formed in all directions.

그리고 반도체 장치의 광원(미도시)에 발생되는 빔을 교정용 웨이퍼(100)의 표면에 조사하게 된다.The beam generated by the light source (not shown) of the semiconductor device is irradiated onto the surface of the calibration wafer 100.

이처럼 광원에서 발생되는 빔은 도 3에 도시한 바와 같이, 교정용 웨이퍼(100)의 표면에 형성된 산화막 층(110)과 간섭되지 않고 초점 교정용 홈(112)의 내부에 포커싱하도록 광원의 교정을 실시하게 된다. As shown in FIG. 3, the beam generated from the light source does not interfere with the oxide layer 110 formed on the surface of the calibration wafer 100, and the beam is calibrated to focus on the inside of the focus calibration groove 112. Will be implemented.

만약 도 4에서와 같이, 조사되는 빔이 초점 교정용 홈(112)의 외곽으로 벗어나게 되면 초점 교정용 홈(112)의 에지(edge) 부분인 산화막 층(110)에 의해 빔이 산란을 일으키게 되므로 포커싱된 빔의 스폿 사이즈가 조절되지 않은 상태임을 용이하게 감지할 수 있게 된다.As shown in FIG. 4, when the beam to be irradiated is out of the focus correction groove 112, the beam is scattered by the oxide layer 110, which is an edge portion of the focus correction groove 112. It is easy to detect that the spot size of the focused beam is not adjusted.

본 발명은 도시된 실시예를 중심으로 설명되었으나 이는 예시적인 것에 불과하며, 본 발명이 본 발명의 기술분야에서 통상의 지식을 가진 자가 할 수 있는 다양한 변형 및 균등한 타 실시예를 포괄할 수 있음을 이해할 것이다.Although the present invention has been described with reference to the illustrated embodiments, it is merely exemplary, and the present invention may encompass various modifications and equivalent other embodiments that can be made by those skilled in the art. Will understand.

도 1은 본 발명에 의한 광원 교정용 웨이퍼의 평면도.1 is a plan view of a wafer for light source calibration according to the present invention;

도 2는 도 1의 측면도.2 is a side view of FIG. 1;

도 3은 본 발명에 의한 광원 교정용 웨이퍼에 의한 광원에서 조사된 빔이 스폿 사이즈의 내측으로 교정된 상태도.Figure 3 is a state diagram in which the beam irradiated from the light source by the light source calibration wafer according to the present invention is corrected to the inside of the spot size.

도 4는 광원에서 조사된 빔의 스폿 사이즈를 벗어나 산란광이 발생된 상태도.4 is a state in which scattered light is generated outside a spot size of a beam irradiated from a light source.

< 도면의 주요 부분에 대한 부호의 설명 ><Description of Symbols for Main Parts of Drawings>

100 ; 웨이퍼100; wafer

110 ; 산화막 층110; Oxide layer

112 ; 초점 교정용 홈112; Focus Correction Groove

Claims (5)

반도체 웨이퍼의 표면 검사 또는 측정시 반도체 웨이퍼의 표면에 검사 또는 측정을 위하여 광원에서 발생되는 빔의 스폿 사이즈를 교정하기 위한 웨이퍼에 있어서, A wafer for correcting the spot size of a beam generated from a light source for inspection or measurement on the surface of a semiconductor wafer during surface inspection or measurement of the semiconductor wafer, 표면에 다수의 초점 교정용 홈이 일정 간격을 갖고 사방으로 형성된 것을 특징으로 하는 광원 교정용 웨이퍼.A light source calibration wafer, characterized in that a plurality of focus correction grooves are formed on the surface at regular intervals. 제 1 항에 있어서,The method of claim 1, 상기 초점 교정용 홈은 원형인 것을 특징으로 하는 광원 교정용 웨이퍼.The focus calibration groove is a light source calibration wafer, characterized in that the circular. 제 1 항에 있어서,The method of claim 1, 상기 초점 교정용 홈은 지름 1㎛, 높이 1㎛인 것을 특징으로 하는 광원 교정용 웨이퍼.The focus correction groove is a light source calibration wafer, characterized in that the diameter 1㎛, 1㎛ height. 제 1 항에 있어서,The method of claim 1, 상기 초점 교정용 홈은 상기 웨이퍼의 표면에 증착된 산화막 층에 형성된 것을 특징으로 하는 광원 교정용 웨이퍼.The focus calibration groove is a light source calibration wafer, characterized in that formed in the oxide film layer deposited on the surface of the wafer. 웨이퍼의 표면에 설정 두께의 산화막 물질을 증착하여 산화막 층을 형성하는 단계;Depositing an oxide material having a predetermined thickness on a surface of the wafer to form an oxide layer; 상기 웨이퍼의 상면에 증착된 산화막 층에서 동일 간격으로 다수의 원형 홈 형상의 패턴이 형성되도록 식각 공정을 수행하는 단계;을 포함하는 것을 특징으로 하는 광원 교정용 웨이퍼의 제조방법.And performing an etching process such that a plurality of circular groove-shaped patterns are formed at equal intervals in the oxide film layer deposited on the upper surface of the wafer.
KR1020070122190A 2007-11-28 2007-11-28 Wafer for adjusting beam source and method of manufacturing it KR100941203B1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010036462A (en) * 1999-10-08 2001-05-07 윤종용 Method for inspecting the focus change of a lithographic exposure apparatus and reticle being used in the method
KR20020039348A (en) * 2000-08-31 2002-05-25 와다 다다시 Methods of inspecting and manufacturing silicon wafer, method of manufacturing semiconductor device, and silicon wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010036462A (en) * 1999-10-08 2001-05-07 윤종용 Method for inspecting the focus change of a lithographic exposure apparatus and reticle being used in the method
KR20020039348A (en) * 2000-08-31 2002-05-25 와다 다다시 Methods of inspecting and manufacturing silicon wafer, method of manufacturing semiconductor device, and silicon wafer

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